JPS62159444A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JPS62159444A
JPS62159444A JP185586A JP185586A JPS62159444A JP S62159444 A JPS62159444 A JP S62159444A JP 185586 A JP185586 A JP 185586A JP 185586 A JP185586 A JP 185586A JP S62159444 A JPS62159444 A JP S62159444A
Authority
JP
Japan
Prior art keywords
silicon
substrate
carbide
polishing
silicon carbide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP185586A
Other languages
Japanese (ja)
Inventor
Fumitake Mieno
文健 三重野
Yuji Furumura
雄二 古村
Masahiko Toki
雅彦 土岐
Tsutomu Nakazawa
中沢 努
Kikuo Ito
伊藤 喜久雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP185586A priority Critical patent/JPS62159444A/en
Publication of JPS62159444A publication Critical patent/JPS62159444A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To obtain a substrate which is improved in its heat dissipation by growing a silicon carbide by a CVD method on a silicon, polishing the silicon and forming the substrate which mainly contains the silicon carbide. CONSTITUTION:A silicon carbide 12 having 500mum of thickness is grown by a CVD method on a silicon substrate 11. The carbide 12 is not necessarily crystallized, but may be polycrystalline SiC. Then, the substrate 11 is mechanically or chemically polished. The mechanical polishing is by polishing powder, and the chemical polishing is by etchant such as caustic potash. Then, the substrate 11 which has wrong thermal conduction is formed thinly, and the carbide 12 having good thermal conduction is formed thickly. Thus, the substrate 11 which is improved in the heat dissipation is obtained.

Description

【発明の詳細な説明】 [概要〕 化学気相成長法によってシリコンカーバイドをシリコン
板上に成長し、次いで、そのシリコン板を裏面から研磨
して、シリコンカーバイド上にシリコン層を積層した構
造の基板、あるいは、シリコンカーバイド内にシリコン
層を埋没させた構造の基板を作成し、そのシリコン層に
半導体素子を形成する。このような基板は熱伝導性が良
い。
[Detailed Description of the Invention] [Summary] A substrate with a structure in which silicon carbide is grown on a silicon plate by chemical vapor deposition, and then the silicon plate is polished from the back side to stack a silicon layer on the silicon carbide. Alternatively, a substrate having a structure in which a silicon layer is buried in silicon carbide is created, and a semiconductor element is formed in the silicon layer. Such a substrate has good thermal conductivity.

[産業上の利用分野] 本発明は半導体装置の製造方法のうち、特に、基板の形
成方法に関する。
[Industrial Field of Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of forming a substrate.

周知のように、IC,LSIなどの半導体装置は極めて
微細化され、高度に集積化されており、それは、高集積
化するほど、高速動作など高性能化される利点があるた
めである。
As is well known, semiconductor devices such as ICs and LSIs are becoming extremely fine and highly integrated, and this is because the higher the integration, the higher the performance, such as high-speed operation.

しかし、高集積化・高密度化すれば、それだけ動作時に
発熱量が増加する問題があり、従って、その放熱につい
ては、十分に配慮されなければらない。
However, the higher the degree of integration and density, the more heat generated during operation, and therefore sufficient consideration must be given to heat dissipation.

[従来の技術と発明が解決しようとする問題点コさて、
従来、高集積化・高密度化したLSIなどの半導体装置
は、シリコン基板に形成したLSI素子を、熱伝導性の
良い基板、例えば、ダイヤモンド板などに密着させて、
熱が放散し易い構造にしている。このような構造をヒー
トシンク構造と呼んでいる。
[Problems that the conventional technology and invention try to solve]
Conventionally, highly integrated and highly dense semiconductor devices such as LSIs are produced by attaching LSI elements formed on a silicon substrate to a substrate with good thermal conductivity, such as a diamond plate.
It has a structure that allows heat to dissipate easily. Such a structure is called a heat sink structure.

また、半導体素子間を誘電体で分離する誘電体分離構造
のrcが良く知られているが、電子機器のrc化と共に
絶縁耐圧が高くて信転性の高いICが要求され、例えば
、電話機の電子化に伴なって加入者線回路に用いるLS
I  (SLIC)は、数百ボルトの高耐圧が必要であ
る。このようなICのシリコン基板は第3図(a)〜(
d)に示すような工程で形成されている。
In addition, RC with a dielectric isolation structure is well known, in which semiconductor elements are separated by a dielectric, but as electronic equipment becomes more RC, ICs with high dielectric strength and high reliability are required, for example, for telephones. LS used in subscriber line circuits due to computerization
I (SLIC) requires a high withstand voltage of several hundred volts. The silicon substrate of such an IC is shown in Figures 3(a) to (
It is formed by the process shown in d).

まず、第3図(a)に示すように、シリコン基板1を選
択的にエツチングして、島状領域2を形成する。面方位
(100)のシリコン基板にマスクを設けて、苛性カリ
溶液で選択的に異方性エツチング(Vカットと云う)す
ると、容易に図示のような形状に形成される。次いで、
同図(b)に示すように、全面を熱酸化して膜厚2〜3
μmの酸化シリコン(Si02)膜3を生成する。
First, as shown in FIG. 3(a), a silicon substrate 1 is selectively etched to form an island region 2. Then, as shown in FIG. By providing a mask on a silicon substrate with a plane orientation of (100) and performing selective anisotropic etching (referred to as V-cutting) using a caustic potash solution, the shape shown in the figure can be easily formed. Then,
As shown in Figure (b), the entire surface is thermally oxidized to a film thickness of 2 to 3.
A silicon oxide (Si02) film 3 having a thickness of μm is produced.

次いで、第3図(C1に示すように、化学気相成長(C
VD)法によって膜厚数百μmの多結晶シリコン膜4を
被着する。次いで、同図(d)に示すように、シリコン
基板1を機械的または化学的に研磨除去して、膜厚50
μm程度のシリコンの島状領域2を5i02膜3を介し
て多結晶シリコン膜4上に形成した基板に形成する。こ
のような、第3図(dlに示すような基板は島状領域2
が結晶欠陥が少ないバルク(溶融シリコンからシードを
用いて引き上げ又は帯域溶融して作成した結晶基板)で
あるから、その島状領域に形成した半導体素子は高耐圧
が得られ、信幀性の高いICになる。
Next, as shown in FIG. 3 (C1), chemical vapor deposition (C
A polycrystalline silicon film 4 having a thickness of several hundred μm is deposited by the VD method. Next, as shown in FIG. 4(d), the silicon substrate 1 is mechanically or chemically polished to a film thickness of
A silicon island region 2 of about μm size is formed on a substrate formed on a polycrystalline silicon film 4 via a 5i02 film 3. Such a substrate as shown in FIG.
Since it is a bulk (crystalline substrate made by pulling or band-melting molten silicon using a seed) with few crystal defects, the semiconductor element formed in the island-like region can obtain a high breakdown voltage and is highly reliable. Become an IC.

ところが、第3図1d)に示す高耐圧ICの基板は多結
晶シリコンであるから、熱伝導性が十分でないのが欠点
である。且つ、シリコン基板1を研磨除去する際、シリ
コン基板と多結晶シリコン膜とが同材質のために、研磨
終点の検出が難しいと云う問題がある。
However, since the substrate of the high voltage IC shown in FIG. 3 1d) is made of polycrystalline silicon, it has a disadvantage of insufficient thermal conductivity. Furthermore, when removing the silicon substrate 1 by polishing, there is a problem in that it is difficult to detect the end point of polishing because the silicon substrate and the polycrystalline silicon film are made of the same material.

また、前者のヒートシンク構造のICは、シリコン基板
上にICを設けており、熱伝導性の良い板を密着させて
も、分厚いシリコン基板を介在させているために、熱放
散は必ずしも十分ではない。
In addition, in the former type of heat sink structure IC, the IC is mounted on a silicon substrate, and even if a plate with good thermal conductivity is closely attached, heat dissipation is not necessarily sufficient due to the thick silicon substrate. .

本発明は、これらの問題点を軽減させて、熱放散の良い
ICを形成するための半導体装置の製造方法、即ち、基
板の製造法を提案するものである。
The present invention proposes a method for manufacturing a semiconductor device, that is, a method for manufacturing a substrate, for alleviating these problems and forming an IC with good heat dissipation.

[問題点を解決するための手段] その目的は、シリコン板上に、CVD法によってシリコ
ンカーバイド(SzC;絶縁体)を成長し、次いで、前
記シリコン板を研磨して、シリコンカーバイド上にシリ
コン層を設けた構造の基板を形成する工程、あるいは、
島状領域を設けたシリコン板上に、CVD法によってシ
リコンカーバイドを成長し、次いで、前記シリコン板を
研磨して、シリコンカーバイド内に前記島状領域をシリ
コン層として埋没させた構造の基板を形成する工程が含
まれる半導体装置の製造方法によって達成される。
[Means for solving the problem] The purpose is to grow silicon carbide (SzC; insulator) on a silicon plate by CVD method, and then polish the silicon plate to form a silicon layer on the silicon carbide. A process of forming a substrate with a structure provided with, or
Silicon carbide is grown by a CVD method on a silicon plate provided with an island-like region, and then the silicon plate is polished to form a substrate having a structure in which the island-like region is buried as a silicon layer in the silicon carbide. This is achieved by a method of manufacturing a semiconductor device that includes the steps of:

[作用] 即ち、本発明は、シリコン上にCVD法によってシリコ
ンカーバイドを成長し、シリコンを研磨して、シリコン
カーバイド(絶縁体)を主体にした基板を形成する。
[Operation] That is, in the present invention, silicon carbide is grown on silicon by the CVD method, and the silicon is polished to form a substrate mainly made of silicon carbide (insulator).

そうすると、熱転4性の悪いシリコンが薄く、熱伝導性
の良いシリコンカーバイドが厚くなって、放熱性が向上
する。
In this case, silicon, which has poor heat transfer properties, becomes thinner, and silicon carbide, which has good thermal conductivity, becomes thicker, improving heat dissipation.

[実施例] 以下、図面を参照して実施例によって詳細に説明する。[Example] Hereinafter, embodiments will be described in detail with reference to the drawings.

第1図(al〜(C)は本発明にがかる一実施例の形成
工程順断面図を示しており、従来のヒートシンク構造I
Cに代わる基板の形成方法である。
FIGS. 1A to 1C show cross-sectional views in the order of the formation process of an embodiment of the present invention, and show a conventional heat sink structure I.
This is a method of forming a substrate in place of C.

第1図(a)は膜厚600μm程度のシリコン基板11
の断面を示しており、次いで、同図(b’lに示すよう
に、その上にCVD法によって膜厚500μmのシリコ
ンカーバイド12を成長する。尚、シリコンカ−バイド
12は結晶化する必要なく、多結晶SiCでよい。成長
条件は、公知のCVD装置を用い、基板を1360℃に
加熱して、反応ガスとして四塩化シリコン(SiC1a
 )とプロパン(COH8) 、又は、モノシラン(S
iH4)とプロパン(C3H[l)とを流入させ、常圧
にて成長する。
FIG. 1(a) shows a silicon substrate 11 with a film thickness of about 600 μm.
Next, as shown in FIG. Polycrystalline SiC may be used.The growth conditions are as follows: Using a known CVD device, the substrate is heated to 1360°C, and silicon tetrachloride (SiC1a) is used as a reaction gas.
) and propane (COH8), or monosilane (S
iH4) and propane (C3H[l) are introduced to grow at normal pressure.

次いで、第1図(C)に示すように、機械的または化学
的にシリコン基板11を研磨して、膜厚約100μmの
シリコン層11に形成する。機械的研磨は研磨パウダー
による研磨で、また、化学的研磨は苛性カリなどのエツ
チング剤による研磨である。
Next, as shown in FIG. 1C, the silicon substrate 11 is mechanically or chemically polished to form a silicon layer 11 having a thickness of about 100 μm. Mechanical polishing is polishing with abrasive powder, and chemical polishing is polishing with an etching agent such as caustic potash.

かくして、作成された同図(C1の基板上のシリコン層
11に半導体素子を形成すれば、熱伝導性の良い基板の
ため、従来より一層信顛性の高いrcが得られる。
In this way, if a semiconductor element is formed on the silicon layer 11 on the substrate shown in FIG.

次に、第2図(a)〜(dlは本発明にかかる他の実施
例の形成工程順断面図を示しており、第3図で説明した
高耐圧ICに代わる基板の形成方法である。
Next, FIGS. 2(a) to 2(dl) show sequential cross-sectional views of the forming steps of another embodiment according to the present invention, which is a method of forming a substrate in place of the high voltage IC described in FIG. 3.

第2図[a)は膜厚600μm程度のシリコン基板21
の断面で、次いで、同図(′b)に示すように、シリコ
ン基板21をマスク (図示せず)を用いて、選択的に
異方性エツチングして、島状領域22を形成する。
Figure 2 [a] shows a silicon substrate 21 with a film thickness of about 600 μm.
Then, as shown in FIG. 2('b), the silicon substrate 21 is selectively anisotropically etched using a mask (not shown) to form island regions 22.

次いで、第2図(C)に示すように、その上にCVD法
によって膜厚500μmのシリコンカーバイド23を成
長する。成長条件は、第1図に説明した実施例と同様で
ある。次いで、同図(d)に示すように、機械的または
化学的にシリコン基板21を研磨して除去し、膜厚約5
0μmの島状領域22のみを残存させる。この際、この
研磨工程では、シリコンカーバイドの硬度がシリコンの
硬度より高いために、研磨の終点検出が大変容易になる
Next, as shown in FIG. 2(C), silicon carbide 23 with a thickness of 500 μm is grown thereon by CVD. The growth conditions are similar to the example described in FIG. Next, as shown in FIG. 3(d), the silicon substrate 21 is mechanically or chemically polished and removed, resulting in a film thickness of approximately 5.
Only the island-like regions 22 of 0 μm are left. At this time, in this polishing step, since the hardness of silicon carbide is higher than that of silicon, it becomes very easy to detect the end point of polishing.

このようにして作成された第2図(d)に示す基板を用
いて、その上に半導体素子を形成すると、第3図(C)
に示す基板と比べて、熱伝導性の良い基板のために、I
Cの信頼性が一層向上する。
When a semiconductor element is formed on the substrate shown in FIG. 2(d) created in this way, the result is shown in FIG. 3(C).
Because the substrate has better thermal conductivity than the substrate shown in
The reliability of C is further improved.

[発明の効果] 以上の説明から明らかなように、本発明によれば熱伝導
性の良い基板が得られるから、高密度ICが一層高信頼
化されるものである。
[Effects of the Invention] As is clear from the above description, according to the present invention, a substrate with good thermal conductivity can be obtained, so that a high-density IC can be made even more reliable.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(C)および第2図(a)〜(d)は本
発明にかかる実施例の形成工程順断面図、 第3図fa)〜(d)は従来の形成工程順断面図である
。 図において、 1、11.21はシリコン基板、 2.22は島状領域、 3は5i02膜、 4は多結晶シリコン膜、 12、23はシリコンカーパイト ン1玉4−KB74H;スフ・スフ・39■シラ Lろ
(′工程1ヅQ15す1うデJ@(T〕flit  図 n≦EJfi lJ7? S ’F’、’F’i’ I
 i”II$ffiゴIID   (1)@ 2図 佑り形ハ゛T糎+′tilt跡面図 @ 3 図
Figures 1 (a) to (C) and Figures 2 (a) to (d) are cross-sectional views in the order of forming steps of the embodiment according to the present invention, and Figures 3 fa) to (d) are sectional views in order of forming steps in the conventional example. FIG. In the figure, 1, 11.21 is a silicon substrate, 2.22 is an island region, 3 is a 5i02 film, 4 is a polycrystalline silicon film, 12, 23 is a silicon carpaiton 1 ball 4-KB74H; ■Shira Lro ('Process 1ヅQ15S1UdeJ@(T)flit Figure n≦EJfi lJ7? S 'F', 'F'i' I
i”II $ffiGo IID (1) @ Figure 2 Open-circuit high T glue + 'tilt trace diagram @ Figure 3

Claims (2)

【特許請求の範囲】[Claims] (1)シリコン板上に、化学気相成長法によつてシリコ
ンカーバイドを成長し、次いで、前記シリコン板を研磨
して、シリコンカーバイド上にシリコン層を設けた構造
の基板を形成する工程が含まれてなることを特徴とする
半導体装置の製造方法。
(1) A step of growing silicon carbide on a silicon plate by chemical vapor deposition, and then polishing the silicon plate to form a substrate having a structure in which a silicon layer is provided on the silicon carbide. A method of manufacturing a semiconductor device, characterized in that:
(2)島状領域を設けたシリコン板上に、化学気相成長
法によつてシリコンカーバイドを成長し、次いで、前記
シリコン板を研磨して、シリコンカーバイド内に前記島
状領域をシリコン層として埋没させた構造の基板を形成
する工程が含まれてなることを特徴とする半導体装置の
製造方法。
(2) Silicon carbide is grown by chemical vapor deposition on a silicon plate provided with island-like regions, and then the silicon plate is polished to form the island-like regions as a silicon layer within the silicon carbide. A method for manufacturing a semiconductor device, comprising the step of forming a substrate with a buried structure.
JP185586A 1986-01-07 1986-01-07 Manufacture of semiconductor device Pending JPS62159444A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP185586A JPS62159444A (en) 1986-01-07 1986-01-07 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP185586A JPS62159444A (en) 1986-01-07 1986-01-07 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS62159444A true JPS62159444A (en) 1987-07-15

Family

ID=11513156

Family Applications (1)

Application Number Title Priority Date Filing Date
JP185586A Pending JPS62159444A (en) 1986-01-07 1986-01-07 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS62159444A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03290948A (en) * 1989-12-20 1991-12-20 Nec Corp Semiconductor device
EP0916750A1 (en) * 1997-11-17 1999-05-19 Nippon Pillar Packing Co. Ltd. Single crystal SiC and a method of producing the same
EP0964081A2 (en) * 1998-04-13 1999-12-15 Nippon Pillar Packing Co. Ltd. Single crystal SiC and a method of producing the same
CN103088426A (en) * 2013-01-23 2013-05-08 保定科瑞晶体有限公司 Method for reducing seed crystal growth face defects of silicon carbide crystals

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03290948A (en) * 1989-12-20 1991-12-20 Nec Corp Semiconductor device
EP0916750A1 (en) * 1997-11-17 1999-05-19 Nippon Pillar Packing Co. Ltd. Single crystal SiC and a method of producing the same
EP0964081A2 (en) * 1998-04-13 1999-12-15 Nippon Pillar Packing Co. Ltd. Single crystal SiC and a method of producing the same
EP0964081A3 (en) * 1998-04-13 2000-01-19 Nippon Pillar Packing Co. Ltd. Single crystal SiC and a method of producing the same
CN103088426A (en) * 2013-01-23 2013-05-08 保定科瑞晶体有限公司 Method for reducing seed crystal growth face defects of silicon carbide crystals

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