JPS62123811A - Optical reception circuit - Google Patents

Optical reception circuit

Info

Publication number
JPS62123811A
JPS62123811A JP60264352A JP26435285A JPS62123811A JP S62123811 A JPS62123811 A JP S62123811A JP 60264352 A JP60264352 A JP 60264352A JP 26435285 A JP26435285 A JP 26435285A JP S62123811 A JPS62123811 A JP S62123811A
Authority
JP
Japan
Prior art keywords
differential amplifier
photodiode
bias power
input terminal
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60264352A
Other languages
Japanese (ja)
Inventor
Keizo Kashiwagi
柏木 慶三
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP60264352A priority Critical patent/JPS62123811A/en
Publication of JPS62123811A publication Critical patent/JPS62123811A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve the in-phase signal rejection ratio of a differential amplifier by making an impedance between a bias power supply of a photo diode and a couple of input terminals of the differential amplifier equal to each other. CONSTITUTION:A photo diode 2 applying photoelectric conversion to a received optical signal is connected to one input terminal of the differential amplifier 1 and a parallel circuit comprising a resistor 5 (10MOMEGA) and a capacitor 6 (3pF) is connected between the other input terminal and the bias power supply of the photo diode 2. In this circuit, the AC impedance among the bias power terminal 7 of the photo diode 2 and a couple of input terminals of the differential amplifier 1 is made equal. As a result, the in-phase signal rejection ratio of the differential amplifier 1 is improved by 20dB.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は光受信回路に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to an optical receiving circuit.

〔従来の技術〕[Conventional technology]

従来、この種の光受信回路は第2図に示すように、差動
増幅器lと、フォトダイオード2と、差動増幅器1のD
C動作点を定めるために差動増幅器1の入力端子にDC
バイアスを印加する固定バイアス回路3,4とから構成
されていた。
Conventionally, this type of optical receiving circuit has a differential amplifier l, a photodiode 2, and a differential amplifier D, as shown in FIG.
DC to the input terminal of differential amplifier 1 to determine the C operating point.
It consisted of fixed bias circuits 3 and 4 that apply bias.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の光受信回路においては、フォトダイオー
ド2により光−電気変換された受信信号は差動増幅器1
に入力され、増幅される。しかし、フォトダイオード2
のバイアス電源端子7に雑音が重畳された場合、この雑
音電圧がフォトダイオード2を介して差動増幅器1に入
力されるため、受信信号の信号対雑音比が劣化するとい
う欠点がある。
In the conventional optical receiving circuit described above, the received signal that has been optical-to-electrically converted by the photodiode 2 is sent to the differential amplifier 1.
input and amplified. However, photodiode 2
When noise is superimposed on the bias power supply terminal 7, this noise voltage is input to the differential amplifier 1 via the photodiode 2, which has the disadvantage that the signal-to-noise ratio of the received signal deteriorates.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の光受信回路は、受信光信号を光−電気変換する
フォトダイオードと、フォトダイオードの出力信号を増
幅する差動増幅器とから構成され、差動増幅器の一方の
入力端子にはフォトダイオードが接続され、上記入力端
子とフォトダイオードのバイアス電源の間のインピーダ
ンスに等しいインピーダンスを持つ回路が、差動増幅器
の他方の入力端子とフォトダイオードのバイアス電源と
の間に接続されている。
The optical receiver circuit of the present invention is composed of a photodiode that performs optical-to-electrical conversion of a received optical signal, and a differential amplifier that amplifies the output signal of the photodiode, and the photodiode is connected to one input terminal of the differential amplifier. A circuit having an impedance equal to the impedance between the input terminal and the photodiode bias power supply is connected between the other input terminal of the differential amplifier and the photodiode bias power supply.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例を示す回路図である。FIG. 1 is a circuit diagram showing one embodiment of the present invention.

この実施例では、差動増幅器1の一方の入力端子には受
信光信号を光−電気変換するためのフォトダイオード2
が接続され、他方の入力端子にはフォトダイオード2の
バイアス電源との間KIOMΩの抵抗器5と39Fのコ
ンデンサ6の並列回路が接続されている。この回路では
、7tトダイオード2のバイアス電源端子7と差動増幅
器1の一対の入力端子間の交流インピーダンスが等しく
なっている。この結果、差動増幅器1の同相信号除去比
が20dB改善された。
In this embodiment, one input terminal of the differential amplifier 1 has a photodiode 2 for optical-to-electrical conversion of the received optical signal.
is connected to the other input terminal, and a parallel circuit of a KIOMΩ resistor 5 and a 39F capacitor 6 is connected between the bias power source of the photodiode 2 and the other input terminal. In this circuit, the AC impedance between the bias power supply terminal 7 of the 7t diode 2 and the pair of input terminals of the differential amplifier 1 is equal. As a result, the common mode signal rejection ratio of the differential amplifier 1 was improved by 20 dB.

〔発明の効果〕 以上説明したように本発明は、フォトダイオードのバイ
アス電源と差動増幅器の一対の入力端子との間のインピ
ーダンスを等しくすることができるため、差動槽mWの
同相信号除去比を向上させることができる。その結果、
フォトダイオードのバイアス電源に雑音が混入しても、
受信感度が大きく低下することを防止できるという効果
がある。
[Effects of the Invention] As explained above, the present invention makes it possible to equalize the impedance between the bias power supply of the photodiode and the pair of input terminals of the differential amplifier. ratio can be improved. the result,
Even if noise enters the photodiode bias power supply,
This has the effect of preventing a large drop in reception sensitivity.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例を示す回路図、第2図は従来の
光受信回路を示す回路図である。 1・・・・・・差動増幅器、2・・・・・・フォトダイ
オード、3.4・・・・・・固定バイアス回路、5・・
・・・・抵抗器、6・・・・・・コンデンサ、7・・・
・・・バイアス電源端子。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional optical receiving circuit. 1...Differential amplifier, 2...Photodiode, 3.4...Fixed bias circuit, 5...
...Resistor, 6...Capacitor, 7...
...Bias power supply terminal.

Claims (1)

【特許請求の範囲】 受信光信号を光電気変換するフォトダイオードと、前記
フォトダイオードの出力信号を増幅する差動増幅器とを
含む光受信回路において、 前記差動増幅器の一方の入力端子に前記フォトダイオー
ドが接続されると共に前記入力端子と前記フォトダイオ
ードのバイアス電源との間のインピーダンスに等しいイ
ンピーダンスを有する回路が、前記差動増幅器の他方の
入力端子と前記フォトダイオードのバイアス電源との間
に接続されていることを特徴とする光受信回路。
[Scope of Claims] An optical receiving circuit including a photodiode that photoelectrically converts a received optical signal, and a differential amplifier that amplifies an output signal of the photodiode, wherein one input terminal of the differential amplifier is connected to the photodiode. A circuit to which the diode is connected and having an impedance equal to the impedance between the input terminal and the bias power supply for the photodiode is connected between the other input terminal of the differential amplifier and the bias power supply for the photodiode. An optical receiving circuit characterized by:
JP60264352A 1985-11-22 1985-11-22 Optical reception circuit Pending JPS62123811A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60264352A JPS62123811A (en) 1985-11-22 1985-11-22 Optical reception circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60264352A JPS62123811A (en) 1985-11-22 1985-11-22 Optical reception circuit

Publications (1)

Publication Number Publication Date
JPS62123811A true JPS62123811A (en) 1987-06-05

Family

ID=17401959

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60264352A Pending JPS62123811A (en) 1985-11-22 1985-11-22 Optical reception circuit

Country Status (1)

Country Link
JP (1) JPS62123811A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0376440A (en) * 1989-08-18 1991-04-02 Nec Corp Optical receiver
JP2014192895A (en) * 2013-03-26 2014-10-06 Excelitas Canada Inc DIFFERENTIAL OPTICAL RECEIVER FOR AVALANCHE PHOTODIODE AND SiPM

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6242603A (en) * 1985-08-20 1987-02-24 Seiko Epson Corp Operational amplifier circuit for photosensor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6242603A (en) * 1985-08-20 1987-02-24 Seiko Epson Corp Operational amplifier circuit for photosensor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0376440A (en) * 1989-08-18 1991-04-02 Nec Corp Optical receiver
JP2014192895A (en) * 2013-03-26 2014-10-06 Excelitas Canada Inc DIFFERENTIAL OPTICAL RECEIVER FOR AVALANCHE PHOTODIODE AND SiPM

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