JPS62112320A - Heat-treatment device for semiconductor - Google Patents

Abstract

PURPOSE:To assure the rapid temperature falling down in the case a device is subject to a ramp down by a method wherein a reaction vessel for wafer processing is formed of dual quartz tube; a refrigerant gas leading-in port and an exhaust port are provided respectively at low and upper ports and multiple insulation branch pipes branched out of a gas leading-in pipe from a gas leading-in port are provided. CONSTITUTION:A refrigerant gas leading-in pipe 12 is led-in from a refrigerant gas leading-in port at lower part of a reaction vessel 11 comprising dual quartz pipes. The leading-in pipe 12 horizontally circulating inside the dual walls branches out into multiple branch pipes 22 rising upward. The branch pipes 22 with irregular length jet off refrigerating gas in relatively lower part from shorter pipes while in relatively higher part from a longer pipe. The branch pipes 22 made of insulation material such as ceramics etc. can prevent the temperature of refrigerating gas from rising up while assuring even and rapid cooling by properly arranging the branch pipes with irregular length. In such a constitution, the refrigerant gas passing through dual pipes for heat exchange is exhausted from an upper refrigerant gas exhaust pipe 32 through a radiator 42.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a heat treatment apparatus for semiconductors, and is particularly used in the process of forming an oxide film, diffusing impurities, etc. on a semiconductor wafer.

[Technical background of the invention]

Vertical heat treatment equipment is widely used, which heats semiconductor wafers in an oxidizing atmosphere to form an oxide film on the surface, and also heats and diffuses impurities to form a diffusion region. 2. A cylindrical quartz reaction vessel is placed vertically. In this, multiple semiconductor wafers are almost completely water-filled.
A semiconductor wafer support jig having a multi-stage wafer support section for supporting the wafer is installed approximately coaxially with the reaction vessel to perform heat treatment.

In FIG. 7 illustrating a conventional vertical heat treatment apparatus in FIG. 2, 101 is a cylindrical quartz reaction vessel whose upper end is closed with a lid 102. Reaction vessel 1011: A reaction gas is introduced from an end of the reaction gas inlet 103a. The reaction gas discharge D 103b that discharges the reaction gas that has been discharged is 1. It is provided in the writing lid section 102. Further, a semiconductor wafer support jig 104 is placed inside the reaction container 101 . , second support jig 10
As shown in the horizontal cross section in Figure 2 (1), the main part of 4 is a semiconductor wafer support, which is a plurality of wafer supports arranged perpendicularly on the circumference of a semicircle with a diameter approximately equal to that of L-C. rod 104
Horizontal notch 104b, 1 inside of a, 104a...
04b... are provided, and semiconductor wafers ioo, tooo... are supported by inserting their peripheral parts into these cuts. Next, a soaking tube and a heat exchanger 105 are arranged outside one reaction vessel with a gap surrounding them, and a cooling gas injection port 106a at the bottom and a cooling gas exhaust port 106b at the top are provided in the first gap to form a 1-inch reaction vessel. This reduces the ramp down time.

[Problems with background technology]

Although the above conventional equipment can shorten the ramp-down time by blowing cooling gas against the outer wall of the reaction vessel during ramp-down, the heat capacity of the furnace is large due to the use of soaking tubes.
It is difficult to increase the ramp down rate to 10° C./min or more. On the other hand, if a soaking tube is not used, a ramp down rate of about 15°C/min can be obtained, but because there is no soaking tube, impurity contamination from the heater to the reaction vessel increases, which can eventually contaminate the wafers. There are serious problems.

Next, during cooling, cooling gas is flowed from the bottom of the furnace to the top to cool the reaction vessel, but as soon as the cooling gas is injected, it is immediately warmed at the bottom of the reaction vessel, and the top of the furnace reaches a considerably high temperature. It has become. For this reason, the upper part of the furnace has little cooling effect, and the furnace is not cooled uniformly. Due to the temperature difference between the upper and lower parts of the furnace, the semiconductor wafers set on the wafer support jig may, for example, spread due to the upper and lower parts of the setting position. There is a problem that the depth of the layers is different and the device characteristics are not constant.

[Purpose of the invention]

In view of the above-mentioned conventional problems, the present invention provides a semiconductor heat treatment apparatus having an improved structure so that a uniform and rapid temperature drop during ramp-down can be achieved in a vertical semiconductor heat treatment apparatus.6 [Summary of the Invention] The present invention relates to a vertical heat treatment apparatus for semiconductors, in which the reaction vessel has a double structure, between which an inlet pipe for cooling gas to be injected is branched off from a plurality of branch pipes made of heat insulating material, and each part of the furnace is provided with a double structure. Cooling gas is ejected to uniformly ramp down the entire furnace.

Thereby, it is possible to eliminate the upper and lower parts of the set portion for the processing effect of the semiconductor wafer set in the reaction container.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIG. In addition, in the description, parts that are the same as in the prior art are indicated by the same reference numerals as in the prior art in the drawings, and the description thereof will be omitted.

In the figure, reference numeral 11 denotes a double-walled reaction vessel, and a cooling gas inlet is provided at the bottom of this double-walled portion 21, from which a cooling gas inlet pipe 12 is introduced. This cooling gas introduction pipe 12 circulates horizontally within the double wall and branches into a plurality of branch pipes 2.
2.22... is stretched upward.

For example, there are 12 branch pipes with different lengths,
Short ones inject cooling gas at a relatively lower part, and long ones inject cooling gas at a relatively upper part. Furthermore, since the bipedal branch pipe is made of a heat insulating material, such as ceramics, the temperature of the cooling gas ejected from the end of the branch pipe is approximately equal to that of the gas source, so that it has sufficient cooling capacity.

By appropriately arranging the long and short lengths, uniform and rapid cooling can be achieved. The number and dimensions of the branch pipes may be determined appropriately depending on the size of the device, but in order to prevent contamination of the reaction vessel (quartz tube), especially the inner pipe, it is recommended that the cooling gas be a highly pure gas, such as nitrogen. Suitable, the introduction rate is set at 500 Q/min as standard, and a temperature deviation of 5°C or less and a ramp down rate of 15°C/min can be achieved.

Next, the cooling gas passes through the above-mentioned double pipe and undergoes heat exchange, and then is cooled down through the cooling gas exhaust pipe 32 at the top, passes through the radiator 42 outside the container, and is discharged into a duct (not shown).

Next, in the device of the present invention, the heater 13 does not require a soaking tube.

〔Effect of the invention〕

According to this invention, first, since the reaction vessel has a double-walled structure, contamination of semiconductor wafers by the heater is drastically reduced compared to the conventional method, and the heat capacity of the furnace is small because no soaking tube is used. Ramp up and down can be done quickly.

The time required for ramping down to 1000 to 800'C is compared with the conventional one, as shown in the following table, and is shown in FIG.

This significantly improves the processing amount/time (throughput) of the device.

Next, an insulating branch pipe is used in the cooling gas ejection pipe to prevent the temperature of the ejected gas from rising, and the reaction vessel can be cooled uniformly, so the semiconductor wafers housed in the wafer support jig are placed on top. The temperature difference between the lower part and the lower part is significantly reduced. This has the remarkable advantage of achieving a uniform and desired thickness of the impurity diffusion layer that determines the electrical characteristics of the semiconductor device.

[Brief explanation of drawings]

FIG. 1 is a side sectional view showing an apparatus according to an embodiment of the present invention;
FIG. 2 shows a conventional apparatus, FIG. 1] Reaction vessel 12 Cooling gas inlet pipe 13 Heater 21 Double wall tube of reaction vessel 22 Branch pipe 32 Cooling gas exhaust pipe 100 Semiconductor wafer 104... Semiconductor wafer support lot agent Patent attorney Inoue - Male Figure 1 (-fton 2nd cause)

Claims (1)

[Claims] In a cylindrical quartz reaction vessel having a reaction gas inlet at the lower end and a reaction gas outlet at the upper end, a semiconductor wafer support jig for supporting a plurality of semiconductor wafers in multiple stages almost horizontally is placed approximately along the axis of the reaction vessel. In a semiconductor heat treatment equipment that heat-treats semiconductor wafers by storing them in parallel and circulating a reaction gas, the reaction vessel is made of double quartz tubes,
This double wall has a cooling gas inlet at the bottom and a cooling gas outlet at the top, and the gas inlet pipe introduced from the cooling gas inlet branches from this and has multiple branch pipes made of heat insulating material. A heat treatment device for semiconductors, which is characterized by: