JPS6172341A - Fault processing system - Google Patents

Abstract

PURPOSE:To avoid such a case where a device is hung up owing to a retry enable fault by monitoring the regeneration of the retry-enable fault within a prescribed period of time and discontinuing the processing when said fault occurs again. CONSTITUTION:An error register group 14 which detected a retry enable fault is set while a timer is not working. Then the prescribed initial value is loaded to a timer logic 22, and a count-down action is started by a time counting clock 23. The fault is reported to a processing control part 13 via an AND circuit 26 in the form of a fault to which the retry is permitted since the timer output signal 24 is set at '0'. When a retry fault once occurs and the group 14 is set while the timer 22 is working, the signal 24 shows '1' and therefore an indication is given to the part 13 to discontinue the processing through an AND circuit 25.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a fault handling method that retries depending on the type of fault detected within a device, and in particular, a fault processing method suitable for preventing a device from hanging up due to retry. Regarding the method.

[Background of the invention]

When a conventional device detects a failure within the device, it immediately interrupts processing, resets the entire device, and then restarts the process, or detects the failure as described in Japanese Patent Laid-Open No. 15935.3/1982. The method used was to continue the entire process by retrying depending on the type of process.

However, if a failure occurs again in a process that has been continued through retry, the process of the device will not proceed and the device will hang up.

[Purpose of the invention]

SUMMARY OF THE INVENTION In view of the problems of the prior art described above, an object of the present invention is to provide a fault handling method that provides flexibility in handling faults when a fault occurs and prevents the device from hanging up, with a small amount of hardware.

[Summary of the invention]

A feature of the present invention is that in order to prevent the device from hanging up due to frequent occurrence of failures that are classified as being retried, timer monitoring is used to monitor the recurrence of the failure, and to prevent the recurrence of the failure within a certain period of time. It is characterized by sometimes interrupting the process.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIGS. 1 to 5.

FIG. 1 shows a fault handling circuit of a conventional device; 11 is a group of 22 registers set by a fault that interrupts processing;
Reference numeral 14 represents an error register 9, which is set by a failure to retry processing; 15 represents an OR circuit; and 13 represents a processing control unit. In conventional device failure handling, when any of the error registers 11 is set due to a detected failure, the error detection signal is reported to the processing control section 13 through the OR circuit 12, and the processing control section 13 immediately interrupts the processing. Then, the device and error register group 11 were cleared and the process started again from the beginning. In addition to the error register group 11 for failures that interrupt processing, there is also an error register group 14 for failures that retry processing. When this occurs, the signal in the error register group 14 becomes a signal node that interrupts processing.
Separately from the processing control unit 13Vc, the processing control [1
3, a system was adopted in which the process in which a failure was detected was re-executed.

However, if the failure occurs frequently, the processing 'J)' will be repeated, but the method described in m does not take into account the damage to the device due to repeated retries.

FIG. 2 is a diagram showing an embodiment of the present invention.

In the figure, 11 to 15 are V of the same number in Figure 1.
This corresponds to this.

Further, 21 is an OR circuit 25, 26 is an AND circuit, 25 is a clock for time counting, 22 is initialized to a predetermined value by the output signal of the OR circuit 15, and is counted down by the time counting clock 25. The timer logic 24 that stops when the timer times out is "1" when the timer is operating, and the timer output signal 27 that indicates '0' when the timer is not operating or after timeout is an inverting circuit.Retry is performed when the timer is not operating. When a fault is detected and the error latch details 14 is set, the timer logic 22 is loaded with a predetermined initial value and the timer output signal 24 starts counting down by the time counting clock 2'5. Since it is "0", it is reported to the processing control unit as a failure that allowed the processing to be retried through the AND circuit 26.As mentioned above, once a retry failure occurs and the timer 22 is operating, the error register group 14 When is set, the timer output signal 24 indicates 1", so the processing controller is notified to interrupt the entire process of the antenna circuit 25.

Figure 5 shows a time chart.

A timer monitors for a certain period of time from the time when a fault that can be redo 2 occurs in c4, and when it times out, monitoring is canceled, but processing is controlled so that if the same type of fault occurs again within a certain period of time, processing is interrupted. Report to the department.

In addition, in this example, the present invention was implemented with one timer cooking for all retryable failures, but individual IJ)
By implementing the present invention for retryable failures and changing the initial value of each timer using a dip switch, etc., it is also possible to change the attributes of each retryable failure. ] As described above, according to the present invention, by monitoring the recurrence of a retryable failure within a predetermined period of time and interrupting processing when it occurs again, it is possible to avoid being bound by a retryable failure. This can prevent the device from hanging up. Further, by adding a means for changing the setting of the initial value of the timer, it is possible to easily change the recurrence monitoring time for retriable failures.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of failure processing in a conventional method, FIG. 2 is a block diagram of failure handling in an embodiment of the present invention, and FIG. 5 is a time chart diagram as well.
5...OR circuit, 21...OR circuit 2
2... Timer logic 23... Time count clock, 24... Timer output signal,

Claims (1)

[Claims] 1. When executing a retry in a device that detects a failure within the device and retries the process depending on the type of failure,
A fault handling method characterized by providing a timer that starts with a predetermined initial value, and interrupting processing of the device when the fault recurs while the timer is running.