JPS6161521A - Electric field drive type pnpn switch circuit - Google Patents

Electric field drive type pnpn switch circuit

Info

Publication number
JPS6161521A
JPS6161521A JP18266584A JP18266584A JPS6161521A JP S6161521 A JPS6161521 A JP S6161521A JP 18266584 A JP18266584 A JP 18266584A JP 18266584 A JP18266584 A JP 18266584A JP S6161521 A JPS6161521 A JP S6161521A
Authority
JP
Japan
Prior art keywords
switch
pnpn switch
pnpn
field effect
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18266584A
Other languages
Japanese (ja)
Inventor
Junjiro Kitano
北野 純二郎
Yoshitaka Sugawara
良孝 菅原
Yasunobu Inabe
井鍋 泰宣
Masaaki Tanabe
田辺 雅秋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Nippon Telegraph and Telephone Corp filed Critical Hitachi Ltd
Priority to JP18266584A priority Critical patent/JPS6161521A/en
Priority to DE8585107682T priority patent/DE3583897D1/en
Priority to EP85107682A priority patent/EP0166390B1/en
Priority to EP89123184A priority patent/EP0367301A3/en
Priority to US06/748,199 priority patent/US4794441A/en
Publication of JPS6161521A publication Critical patent/JPS6161521A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/567Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16Modifications for eliminating interference voltages or currents

Abstract

PURPOSE:To prevent current leakage to a load from a drive circuit by using either of an anode or a cathode terminal of a PNPN switch as a source terminal of a field effect transistor (TR) to drive the field effect TR. CONSTITUTION:SWP, SWN are closed at on-operation and voltage sources VP, VN are applied respectively to gates GP, GN of PMOS MP and NMOS MN. When the anode potential VA of the PNPN switch is higher than the VP, the MP is turned on, the QN is driven and the PNPN switch is triggered. When the cathode potential VK is lower than the VN conversely, the MN is turned on, the QP is driven and the PNPN switch is triggered. Thus, it is not always required for the VP, VN to give them a larger absolute value than the voltage amplitude of the signal at load side. Further, since the PNPN switch is triggered by voltage drive, no current leakage to the load from the drive circuit exists.

Description

【発明の詳細な説明】 〔発明のネ1」用分野〕 本発明は電界駆動型PNPNスイッチ回路に係り、特に
駆rMJt流が問題となる回路に好適なスイッチ回路に
関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to an electric field driven PNPN switch circuit, and particularly to a switch circuit suitable for a circuit in which driving rMJt current is a problem.

〔発明の背景〕[Background of the invention]

リレー等の電磁部品の半導体化にPNPNスイッチ等が
駆動の容易性から従来良く用いられていた。矛1図にP
NPNスイッチ1とこれをオン駆動する定電流源IGK
、  IOAを示す。GAおよびGKはそれぞれ定電流
源IGKおよびIc人からの入力を表わす。第2図は第
1図に示す装置の等価回路図で、QPおよびQKはそれ
ぞれPNPトランジスタおよびNPNトランジスタであ
る。第1図に示す装置は、PNPNスイッチのアノード
(A)を位や、カソード(K)電位に依らずにオン駆動
できるが、反流電流を負荷側へ供給しようとする場合に
し1、第1図に示す回路を逆並列に接続して、定電流源
IGK、IC人を常時駆動する必要がある。さもなけれ
ば、電流反転時にPNi’Nスイッチがオフする。従っ
て負荷側には駆動電流か流れ込み、この電流が問題とな
る回路には応用できないという問題があった。
Conventionally, PNPN switches and the like have been widely used for converting electromagnetic parts such as relays into semiconductors because of their ease of driving. P for spear 1
NPN switch 1 and constant current source IGK that turns it on
, indicates IOA. GA and GK represent inputs from constant current sources IGK and Ic, respectively. FIG. 2 is an equivalent circuit diagram of the device shown in FIG. 1, where QP and QK are PNP and NPN transistors, respectively. The device shown in FIG. 1 can turn on the anode (A) of the PNPN switch without depending on the potential or the cathode (K) potential, but when trying to supply a counter current to the load side, It is necessary to connect the circuits shown in the figure in antiparallel to constantly drive the constant current source IGK and IC. Otherwise, the PNi'N switch turns off during current reversal. Therefore, there is a problem in that the drive current flows into the load side, and it cannot be applied to circuits where this current is a problem.

〔発明の目的〕[Purpose of the invention]

本発明の目的は上記した欠点を解決し、負荷側への駆動
回路からの電流漏洩のない、半導体集積化に適した電子
スイッチ回路を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned drawbacks and to provide an electronic switch circuit suitable for semiconductor integration that does not cause current leakage from the drive circuit to the load side.

〔発明の概要〕[Summary of the invention]

上記目的を達成するために、本発明による電界駆動型P
NPNスイッチ回路は一方のコレクタを他方のペースに
接続しあった互いに相補な1対のトランジスタによりな
る等価PNPNスイッチと、前記1対の相補なトランジ
スタにそれぞれに並列に接@された、当該トランジスタ
と同一導電型の1対の相補な電界効果トランジスタと、
当該電界トランジスタをオン−オフ制御する駆動回路よ
り構成され、前記PNPNスイッチのアノードまたはカ
ソード端子を前記電I    弁効果トランジスタのソ
ース端子として、前記電界効果トランジスタを駆動する
ことにより、前記PN)’Nスイッチがオン−オフ制御
されることを要旨とする。
In order to achieve the above object, an electric field driven type P according to the present invention
The NPN switch circuit includes an equivalent PNPN switch consisting of a pair of mutually complementary transistors whose collectors are connected to the other pace, and transistors connected in parallel to the pair of complementary transistors. a pair of complementary field effect transistors of the same conductivity type;
The field effect transistor is configured by a drive circuit that controls on/off the field effect transistor, and the field effect transistor is driven by using the anode or cathode terminal of the PNPN switch as the source terminal of the field effect transistor. The gist is that the switch is controlled on-off.

すなわち、本発明は、PNPNスイッチと電界効果トラ
ンジスタを組み合せて電界駆動形のスイッチ回路を構成
することにより負荷側に駆動回路からの漏洩″電流が流
れないよ5にオン−オフ制御が可能となるという本発明
者等の知見に基すいてなされたものである。駆動回路の
電源電圧より高い信号のスイッチ動作を可能とするよう
に、本発明によるPNJ’Nスイッチ回路においては、
1対の相補な電界効果トランジスタが、PNPNスイッ
チのアノードまたはカソードがそれぞれのソースとなる
よ5に、電圧駆動される。
That is, in the present invention, by combining a PNPN switch and a field effect transistor to form an electric field drive type switch circuit, it is possible to perform on-off control without leakage current from the drive circuit flowing to the load side. This was done based on the knowledge of the inventors of the present invention.In order to enable switching operation of a signal higher than the power supply voltage of the drive circuit, the PNJ'N switch circuit according to the present invention has the following characteristics:
A pair of complementary field effect transistors are voltage driven 5 with their respective sources being the anodes or cathodes of the PNPN switches.

以下に1図面を参照しながら、実施例を用いて本発明を
一層詳細に説明するが、それらに例示に過ぎず、本発明
の枠を越えることなしにいろいろな変形や改良があり得
ることは勿識である。
The present invention will be described in more detail below using examples with reference to one drawing, but these are merely illustrative and it is understood that various modifications and improvements may be made without going beyond the scope of the present invention. It's obvious.

〔発明の実施例〕[Embodiments of the invention]

矛3図は本発明の基本回路構成を示す第1の実施例の回
路図で、第4図はその等価回路図である。1はPNPN
スイッチ、2はPNPNスイッチのNベース4上に設け
たゲート電極で、第4図のPMO8(Mp)のゲート電
極(Gp)、3はPNPNスイッチ1のPペース5上に
設けた電極で、第4図のNMO8(MN)のゲート電極
(GN)に相轟する。QPはl’Ni’Nスイッチ1の
PNPトランジスタ部分であり、QNはNPNトランジ
スタ部分である。VpはPMO8(Mp)Jln勤用の
電圧源でありδWpはオン制御用のスイッチである。V
NはNMO8(MN )駆動用の電圧源であり、SWN
はオン制御用のスイッチである。SWP、SWNは接点
として表示したが、実際にはトランジスタで電子的に構
成する。矛4図に示す回路はつぎのように動作する。オ
ン動作にはSWP、SWNを閉じて電圧源Vp、 VN
’i (;i’LぞれPMO8(Mp)、NMO8(M
N)のゲートGp、GNに印加する。
Figure 3 is a circuit diagram of the first embodiment showing the basic circuit configuration of the present invention, and Figure 4 is its equivalent circuit diagram. 1 is PNPN
The switch, 2 is a gate electrode provided on the N base 4 of the PNPN switch, the gate electrode (Gp) of PMO8 (Mp) in FIG. 4, 3 is the electrode provided on the P pace 5 of the PNPN switch 1, There is a resounding effect on the gate electrode (GN) of NMO8 (MN) in Figure 4. QP is the PNP transistor part of the l'Ni'N switch 1, and QN is the NPN transistor part. Vp is a voltage source for PMO8 (Mp)Jln operation, and δWp is a switch for ON control. V
N is a voltage source for driving NMO8 (MN), and SWN
is a switch for on control. Although SWP and SWN are shown as contacts, they are actually configured electronically using transistors. The circuit shown in Figure 4 operates as follows. For on operation, close SWP and SWN and use voltage sources Vp and VN.
'i (;i'L PMO8 (Mp), NMO8 (Mp)
N) gates Gp and GN.

PNPNスイッチのアノード電位MAがVpより高い場
合はPM(JS (Mp )がオンしてQNが駆動され
ることによりPNPNスイッチが点弧する。逆に、カソ
ード電位VKがVNより低い場合はNMO8(MN)が
オンしてQPが駆動されること和よりPNPNスイッチ
が点弧する。
When the anode potential MA of the PNPN switch is higher than Vp, PM(JS (Mp) is turned on and QN is driven, causing the PNPN switch to fire. Conversely, when the cathode potential VK is lower than VN, NMO8( MN) turns on and QP is driven, which causes the PNPN switch to fire.

すなわち二つのMOSトランジスタMpおよびMNはそ
れぞれアノード端子Aおよびカソード端子Kをソースと
してオン動作する。従って、二つの駆動用電圧源V−P
、VNは特に負荷側の信号の電圧振幅より絶対値の大き
な電源にする必要がな(、駆動回路が著しく何事となる
。例■ えばVp−0・VN−□Vでもオン駆動が可能である。
That is, the two MOS transistors Mp and MN are turned on using the anode terminal A and the cathode terminal K as sources, respectively. Therefore, two driving voltage sources V-P
, it is not necessary for VN to be a power supply whose absolute value is larger than the voltage amplitude of the signal on the load side (this will cause significant damage to the drive circuit. For example, it is possible to turn on the voltage at Vp-0 and VN-□V). .

また、電圧駆動によりPNPNスイッチを点弧させるの
で負4rfr側への駆動回路からの電流漏洩はないので
、理想的なスイッチが実現可能となる。オフ動作は二つ
のスイッチS〜’vp。
Furthermore, since the PNPN switch is fired by voltage drive, there is no current leakage from the drive circuit to the negative 4rfr side, so an ideal switch can be realized. The off operation is performed by two switches S~'vp.

SWNを開放にすれは二つのMO8Mp、MNへの電圧
駆動は停止するのでMP、MNはオフする。
When SWN is opened, the voltage drive to the two MO8Mp and MN is stopped, so MP and MN are turned off.

PNPNスイッチは自己保持慎能があるので、通電電流
が0となった時点でPNPNスイッチはオフし、この後
はオン駆動は停止しているので信号電圧が印力口されて
もオフ状態を維持し・つづける。
Since the PNPN switch has a self-holding function, the PNPN switch turns off when the current flows to 0, and since the on-drive stops after this, it maintains the off state even if the signal voltage is applied. Continue.

矛5図は本発明の具体的な回路構成を示す矛2の実施例
の等価回路図で、図中第4図と共通する部分には同一の
記号を付しである。MlばNMO8で牙4図のスイッチ
8Wpに相当する。
Figure 5 is an equivalent circuit diagram of the embodiment of Figure 2 showing a specific circuit configuration of the present invention, in which parts common to those in Figure 4 are given the same symbols. Ml is NMO8 and corresponds to switch 8Wp in Fig. 4.

M2はPMQ8で、矛4凶のSWNに相当する。M2 is PMQ8, which corresponds to SWN of 4 swords.

■1はNMO3(Ml )駆動用の電源であり、SWl
により印加される。■、はPMQ8(M2)駆動用の電
源であり、SW、により印加されろ。Dl、Dlはそれ
ぞれNMO8(Ml )、PMQ:03(M2)の逆電
圧印加阻止用のダイオードである。PGp、RGNはそ
れぞれPMC)8(〜IP)。
■1 is the power supply for driving NMO3 (Ml), and SWl
is applied by (2) is a power supply for driving PMQ8 (M2), and is applied by SW. Dl and Dl are diodes for blocking reverse voltage application of NMO8 (Ml) and PMQ:03 (M2), respectively. PGp and RGN are each PMC)8 (~IP).

NMO8(MN)のゲート電位固定用の高抵抗である。This is a high resistance for fixing the gate potential of NMO8 (MN).

基本的な動作は矛4図と同じである。The basic movement is the same as the 4th figure.

オン動作時にはNMO8(Ml)、PMQ8 (M2)
は共にオン状態となるので、PMQ8(1・ Mp)とNMO8(MN)のゲートは接地電位となる。
During ON operation, NMO8 (Ml), PMQ8 (M2)
Since both are in the on state, the gates of PMQ8 (1.Mp) and NMO8 (MN) are at ground potential.

PNl’Nスイッチのアノード(A)が正電位の場合は
PMQ8(Mp)がオンすることによりPNPNスイッ
チは点弧し、カソード(K)が負電位の場合はNMO8
(Mp )がオンすることによりPNPNスイッチは点
弧する。
When the anode (A) of the PNl'N switch is at a positive potential, PMQ8 (Mp) is turned on, causing the PNPN switch to fire, and when the cathode (K) is at a negative potential, the NMO8
(Mp) turns on, the PNPN switch fires.

抵抗RGP、RGNはゲート電位固定用のため極めて太
き(することが可能であるので、PNPNスイッチのオ
ン時に駆動回路より負荷側へ漏洩する電流を極めて小さ
くすることが可能であり、実使用上問題とならない。ダ
イオードD1およびDlは負荷側の信号振幅電圧によっ
ては省略することも可能である。
The resistors RGP and RGN are extremely thick for fixing the gate potential (as it is possible to do so, the current leaking from the drive circuit to the load side when the PNPN switch is turned on can be extremely small, making it difficult for practical use. There is no problem. The diodes D1 and Dl can be omitted depending on the signal amplitude voltage on the load side.

第6図は、本発明の他の一つの具体的な回路構成を示す
等価回路図である。矛5図の駆動用のNMO8(Ml)
の代りにNPNトランジスタQ14用い、これを電流源
工、でオン駆動するよう変え、矛5図の駆動用の)’M
O8(M2)の代りにPNP)ランジスタQ2を用い、
これを電流源工、でオン駆動するよう変えたものである
。トランジスタを用いてオン駆動するので高感度なオン
制御が可能となる。
FIG. 6 is an equivalent circuit diagram showing another specific circuit configuration of the present invention. NMO8 (Ml) for driving spear 5
Use an NPN transistor Q14 instead of Q14, change it to ON drive with a current source, and use it for driving (Figure 5)
Using PNP) transistor Q2 instead of O8 (M2),
This was modified to be turned on with a current source. Since it is turned on using a transistor, highly sensitive turn-on control is possible.

第7図は本発明の第4の実施の態様によるス、インチ回
路の等価回路図で、オフ状態でのPNPNスイッチの誤
点弧防止用の改善を施したものである。抵抗RGKはP
NPNスイッチを構成スルN P N Q Nのペース
・エミッタ間に接続され、PN接合を通して流れてくる
リーク電流による誤点弧を防止する効果がある。容1c
cp。
FIG. 7 is an equivalent circuit diagram of a square inch circuit according to a fourth embodiment of the present invention, which has been improved to prevent erroneous firing of a PNPN switch in the OFF state. Resistor RGK is P
It is connected between the pace and emitter of the NPN switch that constitutes the NPN switch, and has the effect of preventing erroneous firing due to leakage current flowing through the PN junction. Volume 1c
cp.

CG NはそれぞれPMQ8 (MP )、NMO8(
MN)のゲート・ソース間に+Ij続され、急峻な豆上
りt持つ電圧の印加からi’ MU 8 (tvl p
)NMO8(MN)が駆動回路側の容tv通して駆動さ
れて、PNPNスイッチが誤点弧するのを防止する効果
がある。
CG N are PMQ8 (MP) and NMO8 (
+Ij is connected between the gate and source of MN), and from the application of a voltage with a steep rise t, i' MU 8 (tvl p
) NMO8 (MN) is driven through the capacitor tv on the drive circuit side, which has the effect of preventing the PNPN switch from erroneously firing.

第8図は第6図に示す回路を半導体集積回路化した場合
の駆動回路を除(断面図である。周知の誘電体分離技術
によりシリコン多結晶7の中に酸化)漢8でアイソレー
トされたN型の単結晶の島4の中にに’NPN構造を作
る。)’MO8(MP)のゲート電極GpはNペース4
上に酸化膜6を介して作成される。NMO3(MN)の
ゲート電極GNはPベース5上に酸化膜6を介して作成
される。抵抗RGP、RGNは酸化膜上に形成される多
結晶シリコンにより作成可能である。このように、本発
明によるPNk#スイッチ回路は容易に半導体集積化す
ることができる。
FIG. 8 is a cross-sectional view of the circuit shown in FIG. 6 when it is made into a semiconductor integrated circuit, excluding the drive circuit (oxidized into polycrystalline silicon 7 using well-known dielectric isolation technology). An 'NPN structure is created in the N-type single crystal island 4. )'The gate electrode Gp of MO8 (MP) is N pace 4
An oxide film 6 is formed thereon. The gate electrode GN of NMO3 (MN) is formed on the P base 5 with an oxide film 6 interposed therebetween. Resistors RGP and RGN can be made of polycrystalline silicon formed on an oxide film. In this way, the PNk# switch circuit according to the present invention can be easily integrated into a semiconductor.

〔発明の効果〕〔Effect of the invention〕

以上説明した通り、本発明によれば、負荷側への駆動回
路からの電流漏洩のない1.半導体集積化に適した電界
駆動型)’NPNスイッチ回路を得ることができる。
As explained above, according to the present invention, 1. there is no current leakage from the drive circuit to the load side; An electric field driven NPN switch circuit suitable for semiconductor integration can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のPNPNスイッチ回路の模式図、第2図
は第1図に示す回路の等価回路図、第5図は本発明の基
本回路荷電を示す回路図、第4図は第6図に示す回路の
等価回路図、第5図から第7図までは本発明の三つの異
った実施の態様によるPNPNスイッチ回路の等価回路
図、第8図は第6図に示す等価回路を半導体集積化した
場合の駆動回路を除(断面図である。 1・・・PNPNスイッチ、2.3・・・ゲート電極、
4・・・Nペース、5・・・Pペース、6.8・・・酸
化膜、7・・・多結晶シリコン、A・・・アノード、K
・・・カソード、Dl、1)2・・・ダイオード、QP
 、Q2・・・PNP)ランジスタ、QN、Ql・・・
N)’N)ランジスタ、MP、M2・・・PM(JSl
MN、Ml・・・NMO8 閉10      も20 躬3目       躬40 第 5幻 ム 第62 第70 に 第80
FIG. 1 is a schematic diagram of a conventional PNPN switch circuit, FIG. 2 is an equivalent circuit diagram of the circuit shown in FIG. 1, FIG. 5 is a circuit diagram showing the basic circuit charging of the present invention, and FIG. 5 to 7 are equivalent circuit diagrams of the PNPN switch circuit according to three different embodiments of the present invention, and FIG. 8 is an equivalent circuit diagram of the circuit shown in FIG. Excluding the drive circuit when integrated (this is a cross-sectional view. 1...PNPN switch, 2.3... Gate electrode,
4...N pace, 5...P pace, 6.8...Oxide film, 7...Polycrystalline silicon, A...Anode, K
...Cathode, Dl, 1)2...Diode, QP
, Q2...PNP) transistor, QN, Ql...
N)'N) Transistor, MP, M2...PM (JSl
MN, Ml...NMO8 Closed 10 Mo20 Tsumugi 3rd Tsumugi 40th 5th illusion 62nd 70th 80th

Claims (1)

【特許請求の範囲】[Claims] 一方のコレクタを他方のベースに接続しあった互に相補
な1対のトランジスタよりなる等価PNPNスイッチと
、前記1対の相補なトランジスタにそれぞれ並列に接続
された、当該トランジスタと同一導電型の1対の相補な
電界効果トランジスタと、当該電界効果トランジスタを
オン−オフ制御する駆動回路より構成され、前記PNP
Nスイッチのアノード端子、カソード端子の何れかを前
記電界効果トランジスタのソース端子として、前記電界
効果トランジスタを駆動することにより、前記PNPN
スイッチがオン−オフ制御されることを特徴とする電界
駆動型PNPNスイッチ回路。
An equivalent PNPN switch consisting of a pair of mutually complementary transistors whose collectors are connected to the base of the other, and transistors of the same conductivity type as the transistors, each connected in parallel to the pair of complementary transistors. The PNP is composed of a pair of complementary field effect transistors and a drive circuit that controls on/off the field effect transistors.
By driving the field effect transistor by using either the anode terminal or the cathode terminal of the N switch as the source terminal of the field effect transistor, the PNPN
An electric field-driven PNPN switch circuit characterized in that a switch is controlled on-off.
JP18266584A 1984-06-22 1984-09-03 Electric field drive type pnpn switch circuit Pending JPS6161521A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP18266584A JPS6161521A (en) 1984-09-03 1984-09-03 Electric field drive type pnpn switch circuit
DE8585107682T DE3583897D1 (en) 1984-06-22 1985-06-21 SEMICONDUCTOR SWITCH.
EP85107682A EP0166390B1 (en) 1984-06-22 1985-06-21 Semiconductor switch circuit
EP89123184A EP0367301A3 (en) 1984-06-22 1985-06-21 Semiconductor switch circuit
US06/748,199 US4794441A (en) 1984-06-22 1985-06-24 Semiconductor switch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18266584A JPS6161521A (en) 1984-09-03 1984-09-03 Electric field drive type pnpn switch circuit

Publications (1)

Publication Number Publication Date
JPS6161521A true JPS6161521A (en) 1986-03-29

Family

ID=16122290

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18266584A Pending JPS6161521A (en) 1984-06-22 1984-09-03 Electric field drive type pnpn switch circuit

Country Status (1)

Country Link
JP (1) JPS6161521A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5796501A (en) * 1980-12-09 1982-06-15 Ngk Spark Plug Co Moisture sensitive resistance element

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5346589A (en) * 1976-10-08 1978-04-26 Omron Tateisi Electronics Co Conveying body induction method
JPS5517310B2 (en) * 1977-09-22 1980-05-10
JPS59127491A (en) * 1983-01-10 1984-07-23 Sharp Corp White balance adjustment device of color camera

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5346589A (en) * 1976-10-08 1978-04-26 Omron Tateisi Electronics Co Conveying body induction method
JPS5517310B2 (en) * 1977-09-22 1980-05-10
JPS59127491A (en) * 1983-01-10 1984-07-23 Sharp Corp White balance adjustment device of color camera

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5796501A (en) * 1980-12-09 1982-06-15 Ngk Spark Plug Co Moisture sensitive resistance element

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