JPS6156594A - Optical time switch - Google Patents

Optical time switch

Info

Publication number
JPS6156594A
JPS6156594A JP17814484A JP17814484A JPS6156594A JP S6156594 A JPS6156594 A JP S6156594A JP 17814484 A JP17814484 A JP 17814484A JP 17814484 A JP17814484 A JP 17814484A JP S6156594 A JPS6156594 A JP S6156594A
Authority
JP
Japan
Prior art keywords
delay
time
optical
input
photo
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17814484A
Other languages
Japanese (ja)
Other versions
JPH0632492B2 (en
Inventor
Toru Matsunaga
亨 松永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP17814484A priority Critical patent/JPH0632492B2/en
Publication of JPS6156594A publication Critical patent/JPS6156594A/en
Publication of JPH0632492B2 publication Critical patent/JPH0632492B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/0001Selecting arrangements for multiplex systems using optical switching

Abstract

PURPOSE:To permit the exchange of optical signals with fewer number of photo delay elements than time division multiplex by connecting a photo delay circuit consisting of delay elements which use one time slot as a delay time unit and that consisting of delay elements which use n number of time slots as a deley time unit using a photo switch. CONSTITUTION:A delay circuit 8 conncects n pieces of delay elements in series which delay an input photo signal for t (one time slot time), and installs a photo switch in input or output side of each delay element. The time-dividing multiplexed (N-plexed) photo signal of each time slot which is input to the delay circuit 8 from an input highway 4 passes through thenecessary number of stages in the delay elements 11, is output by a photo switch 3i, and is input to the delay circuit 9 via n x m photo switch 2. The delay circuit 9 connects m pieces of delay elements 21 in series which delay input photo signal for n times t, and installs a photo coupler in input or output side of each delay element. The photo signal input from the photo coupler 4 passes through the delay element 21 for j stages, and is output from an output highway 5; provided that (m-1)n<N<=mn.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、光時間スイッチに関し、特に時分割多重され
た光(3号を光のまま交換する光時分割交換機め時間ス
イッチに閂するものでシうる。
[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to an optical time switch, and particularly to a time switch such as an optical time division switch that exchanges time division multiplexed light (No. 3) as it is. I can do it.

〔発明の背景〕[Background of the invention]

従来のこの種の!A置には、光遅延素子を用いるものと
、光双安定素子による光メモリを用いるものがあり、N
多重の光信号を交換するために、前者の場合にはN個の
光遅延素子が、また、後者の場合にはNQ個(2は1タ
イムスロツト中のビット数)の光メモリが必要であり1
時分割多重度Nが増すと遅延回路やメモリ回路のハード
ウェア量が多くなるという欠点があった。
This kind of conventional! In the A position, there are those that use an optical delay element and those that use an optical memory using an optical bistable element.
In order to exchange multiple optical signals, N optical delay elements are required in the former case, and NQ optical memories (2 is the number of bits in one time slot) are required in the latter case.
There is a drawback that as the time division multiplexing degree N increases, the amount of hardware for delay circuits and memory circuits increases.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、このような従来の欠点を改碧し、光遅
延素子の数を時分割多重数よりも少ない数で光(8号を
交換でき1時分割多重数が大きいほど経済的に有利な光
時間スイッチを提供することにある。
The purpose of the present invention is to improve upon such conventional drawbacks, and to make it possible to replace optical delay elements (No. The object of the present invention is to provide an advantageous optical time switch.

〔発明の概要〕[Summary of the invention]

上記目的を達成するため、本発明の光時間スイッチは、
N多重の時分割多重光信号を伝送するハイウェイ上のタ
イムスロットを入れ換える光時間スイッチにおいて、n
個の出力端子を持ち、1本の入力ハイウェイ上から入力
される光信号に出力端子に対応するn種類の遅延(0,
t、2 t、3 t、・・・。
In order to achieve the above object, the optical time switch of the present invention includes:
In an optical time switch that switches time slots on a highway that transmits N time-division multiplexed optical signals,
It has n types of delays (0, 0,
t, 2 t, 3 t,...

(n  I)t、ただし、口≦N、t= (Iタイムス
ロワ1−の時間))を′j・えた後遅延時間に対応した
「1個の出力端子・に遅延(r1号光を出力する第1の
光遅延回シ゛()と、 In圃の入力ψ11シ子を持ち
入力される光信号に入力端子に対応するrn種類の′、
Ji延(0,n。
(n I) t, where ≦N, t = (I time thrower 1- time)) is set to 'j', and then the delay (outputs the r1 light to one output terminal a first optical delay circuit ( ), an input optical signal having an input ψ11 circuit and an input terminal corresponding to an input optical signal;
Ji Nobu (0, n.

t、2n t、3n t、==、(m−1)n t、た
だし、(m−1)n<N5m11)を与えた後1本の出
力ハイウェイへ出力する第2の光遅延回路どを有し、第
1と第2の光遅延回路をn入力m出力のノンブロッキン
グなソロスイッチで接続することに特徴がある。
t, 2n t, 3n t, ==, (m-1)n t, where (m-1)n<N5m11), the second optical delay circuit outputs to one output highway. It is characterized in that the first and second optical delay circuits are connected by a non-blocking solo switch with n inputs and m outputs.

〔発明の実施例〕[Embodiments of the invention]

第1図は本発明の実施例を示す光時間スイッチのもか成
因であって、1はIXn光ス−(ソチ、2はnXm光ス
イッチ、3はmX1光結合器、4は入力ハイウェイ、5
は出力ハイウェイ、6は第1の遅延回路、7は第2の遅
延回路、  10,11,12゜−、1(n −1)は
第1の遅延素子群、20,21゜22、・・・・、2(
m−1)は第2の遅延索子群である。
FIG. 1 shows the components of an optical time switch showing an embodiment of the present invention, in which 1 is an IXn optical switch (Sochi), 2 is an nXm optical switch, 3 is an mX1 optical coupler, 4 is an input highway, and 5 is an optical time switch.
is the output highway, 6 is the first delay circuit, 7 is the second delay circuit, 10, 11, 12°-, 1(n-1) is the first delay element group, 20, 21° 22,... ..., 2(
m-1) is the second delay strand group.

第1の光時間スイッチは、光48号に与えるべき遅延を
、L(lタイムスロットの時間)を遅延の単位とする遅
延回路と、nt(tの整数倍)を遅延の単位とする遅延
回路の2種類の遅延回路の組合わせにより実現するもの
であり、これによって時分割多重数より少ない数の遅延
素子で光m号の交換が可能になる。
The first optical time switch includes a delay circuit whose delay unit is L (the time of l time slot) and a delay circuit whose delay unit is nt (an integral multiple of t) to give the delay to the optical No. 48. This is realized by a combination of two types of delay circuits, and this makes it possible to exchange m number of lights with a smaller number of delay elements than the number of time division multiplexers.

まず動作概要を説明する。入力ハイウェイ4から入力さ
れる時分割多重(N多重)された各タイムスロッ1−の
光信号は、光スイッチ1により第1の遅延素子群10〜
1(n−1)の中の適当な遅延素子に入力される。第1
の遅延素子群10〜l  (n−1)は1タイムスロツ
トの時間tを遅延の単位としており、遅延素子10は遅
延時間0,11は遅延時間t、12は遅延時間2 t 
、+・++、 1 (n −1)は遅延時間(n−1)
tであり、光スイッチlはこれらの中から各スロットタ
イム毎に必要な遅延時間に対応した遅延素子を選ぶ、第
1の遅延素子群で遅延を受けた光信号は、nXm光スイ
ツチ2により第2の遅延素子群20〜2(m−1)の中
の適当な遅延素子に再び入力される。第2の遅延素子群
20〜2(m−1)はn tを遅延の単位としており、
遅延素子20は遅延時間0.21は遅延時間nt、22
は遅延時間2nt、・・・・、2(m−1)は遅延時間
(ml)ntである。第2の遅延索子群で遅延を受けた
光(i号は、mXlXl光結合器上り1本の出力ハイウ
ェイ5上へ出力される。
First, an overview of the operation will be explained. The time-division multiplexed (N-multiplexed) optical signals of each time slot 1- inputted from the input highway 4 are sent to the first delay element group 10-1 by the optical switch 1.
1(n-1) to an appropriate delay element. 1st
The delay element groups 10 to 1 (n-1) have the time t of one time slot as a unit of delay, and the delay elements 10 have a delay time of 0, 11 have a delay time t, and 12 have a delay time of 2 t.
, +・++, 1 (n - 1) is the delay time (n - 1)
t, and the optical switch l selects a delay element corresponding to the required delay time for each slot time from among them. The signal is again input to an appropriate delay element in the delay element groups 20 to 2 (m-1). The second delay element group 20 to 2 (m-1) has a delay unit of nt,
The delay element 20 has a delay time of 0.21 and a delay time of nt, 22
is the delay time 2nt, . . . , 2(m-1) is the delay time (ml) nt. The light (i) which has been delayed by the second delay cable group is output onto the output highway 5 of one upstream mXlXl optical coupler.

次に、第1および第2の遅延素子の選択方法について説
明する。入力ハイウェーr4上のあるタイムスロットの
光信号に、X【の遅延を与える場合(Xは多重度Nより
小さい自然数)を考えると、Xはx =i + j n
で表せるので、xtの遅延を与えるかわりにiXtとj
Xntの遅延を別々にしかも連続して与えてもよい。こ
こに、 0≦X≦N−1 1≦n≦N であるx、nに対し、0≦1≦n−1+o≦jである’
I+Jは一意に定まるので、そのi、jを用いて第1お
よび第2の遅延素子の中から11および2jの索子を;
4択すればよい。nおよびjの最大値である(m−1)
は、 (rn −1)n <N≦mnを満足する自然数
である。
Next, a method for selecting the first and second delay elements will be explained. Considering the case where an optical signal in a certain time slot on input highway r4 is given a delay of X (X is a natural number smaller than the multiplicity N), X is x = i + j n
Therefore, instead of giving a delay of xt, iXt and j
The delays of Xnt may be applied separately and consecutively. Here, for x and n which are 0≦X≦N-1 1≦n≦N, 0≦1≦n-1+o≦j'
Since I+J is uniquely determined, use i and j to select the strings 11 and 2j from the first and second delay elements;
All you have to do is choose 4. is the maximum value of n and j (m-1)
is a natural number satisfying (rn −1)n <N≦mn.

遅延素子10〜1(n−1)および20−220−2(
は、遅延時間に対応した長さの光ファイバにより実現す
ることができる。
Delay elements 10-1 (n-1) and 20-220-2 (
can be realized using an optical fiber with a length corresponding to the delay time.

このような構成でN多重の光時間スイッチを作成すると
、遅延素子の数がn+m個になり、多重度Nが大きい場
合には遅延素子数を効果的に削減することができる。
When an N-multiplexed optical time switch is created with such a configuration, the number of delay elements becomes n+m, and when the multiplicity N is large, the number of delay elements can be effectively reduced.

第2図は1本発明の別の実施例を示す光時間スイッチの
構成図であり、8は第1の遅延回路、9は第2の遅延回
路、30 、31 、32、−−−=、 3(n−2)
、3(n−1)はIX2の光スイッチ、40゜・・・・
、4(m−2)、4(m −1)は2X1の光結合器。
FIG. 2 is a block diagram of an optical time switch showing another embodiment of the present invention, in which 8 is a first delay circuit, 9 is a second delay circuit, 30, 31, 32, ---=, 3(n-2)
, 3(n-1) is the optical switch of IX2, 40°...
, 4(m-2), and 4(m-1) are 2X1 optical couplers.

その他は第1図と同じである。以下で動作を説明する。Other details are the same as in Figure 1. The operation will be explained below.

第り図とは、第1および第2の遅延回路(6゜8および
7,9)内の構成のみが異なるので、その部分のみを説
明する。遅延回路8は、入力の光18号に先の遅延を与
える遅延索子11を直列に接続し、各遅延素子の入力ま
たは出力側のIX2の光スイッチを設けたもので、遅延
回路8に入力された光(3号は遅延素子11を必要な段
数だけ通過した後、光スイッチ31により出力される。
Since the difference from FIG. 1 is only in the configurations within the first and second delay circuits (6° 8 and 7, 9), only that portion will be explained. The delay circuit 8 is constructed by connecting delay elements 11 in series that give an earlier delay to the input optical signal 18, and providing an optical switch of IX2 on the input or output side of each delay element. The light (No. 3) is outputted by the optical switch 31 after passing through the delay element 11 for the required number of stages.

遅延回路9は、入力の光(n号にntの遅延を与える遅
延素子21を直列に接続し、各遅延素子の入力または出
力側に2Xlの光結合器を設けたもので、光結合器4j
から入力された光信号は遅延素子21をj段通過した後
、出力ハイウェイ5から出ていく9以上の動作により、
遅延回路8はtを単位とする遅延を、遅延回路9はn【
を単位とする遅延をそれぞれ与えることができる。
The delay circuit 9 has delay elements 21 which give a delay of nt to the input light (n) connected in series, and a 2Xl optical coupler is provided on the input or output side of each delay element, and the optical coupler 4j
After passing through the delay element 21 in j stages, the optical signal inputted from the output highway 5 outputs from the output highway 5.
The delay circuit 8 has a delay unit of t, and the delay circuit 9 has a delay unit of n[
Each can be given a delay in units of .

第2図の方式では、第1図に比較して遅延素子の爪をさ
らに削減することが可能となる。
In the method shown in FIG. 2, it is possible to further reduce the number of claws in the delay element compared to the method shown in FIG.

第11g、第2図ともに、第1と第2の遅延回路のrr
i番を入れ換えても以上の説明と同様の作用が得らJす
ることは明らかである。
In both Fig. 11g and Fig. 2, the rr of the first and second delay circuits is
It is clear that even if the number i is replaced, the same effect as described above can be obtained.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によればN多重の光時間ス
イッチti−構成するために、nおよびmを、(m−1
)n<N≦mn を汐1足するようにii”f当にj践ぶことにより、遅
延素子の数をNよりも1lll減でき、特に、Nが大き
い時にその目減効果が著しいという利点がある。
As explained above, according to the present invention, in order to configure N multiplexed optical time switches ti-, n and m are set as (m-1
)n<N≦mn by adding 1 to 1, the number of delay elements can be reduced by 1llll compared to N, and the advantage is that the reduction effect is particularly significant when N is large. There is.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1の実施例図、第2図は本発明の第
2の実施例図である。 1:IXn光スイッチ、2:nXm光スイッチ。 3 : rn X光結合器、4:入力ハイウェイ、5:
出力ハイウェイ、6,8:第1の遅延回路、7,9:第
2の遅延回路、I O,11,12,−,1(n−1)
:第1の遅延素子群、20,21.22.−.2(m−
1):第2の遅延素子群、30,31,32.・・・。 3(n−2)、3(n−1): 1 x2の光スイッチ
。 40、−4(m−2)、4(m−1):2X1の光結合
器。
FIG. 1 shows a first embodiment of the invention, and FIG. 2 shows a second embodiment of the invention. 1: IXn optical switch, 2: nXm optical switch. 3: rnX optical coupler, 4: Input highway, 5:
Output highway, 6, 8: first delay circuit, 7, 9: second delay circuit, I O, 11, 12, -, 1 (n-1)
: first delay element group, 20, 21.22. −. 2(m-
1): second delay element group, 30, 31, 32. .... 3(n-2), 3(n-1): 1 x 2 optical switch. 40, -4(m-2), 4(m-1): 2X1 optical coupler.

Claims (1)

【特許請求の範囲】[Claims] 時分割多重光信号を伝送するハイウェイ上のタイムスロ
ットを入れ換える光時間スイッチにおいて、1タイムス
ロットを遅延時間単位とする遅延素子を並列または直列
に接続した第1の光遅延回路と、nタイムスロット(n
:時分割多重数より小さい数)を遅延時間単位とする遅
延素子を、並列または直列に接続した第2の光遅延回路
と、該第1および第2の光遅延回路間を接続する光スイ
ッチとを有することを特徴とする光時間スイッチ。
In an optical time switch that switches time slots on a highway for transmitting time-division multiplexed optical signals, a first optical delay circuit in which delay elements each having one time slot as a delay time unit are connected in parallel or in series, and n time slots ( n
: a second optical delay circuit in which delay elements whose delay time unit is a number smaller than the number of time division multiplexed units are connected in parallel or in series, and an optical switch that connects the first and second optical delay circuits. An optical time switch characterized by having:
JP17814484A 1984-08-27 1984-08-27 Light time switch Expired - Lifetime JPH0632492B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17814484A JPH0632492B2 (en) 1984-08-27 1984-08-27 Light time switch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17814484A JPH0632492B2 (en) 1984-08-27 1984-08-27 Light time switch

Publications (2)

Publication Number Publication Date
JPS6156594A true JPS6156594A (en) 1986-03-22
JPH0632492B2 JPH0632492B2 (en) 1994-04-27

Family

ID=16043408

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17814484A Expired - Lifetime JPH0632492B2 (en) 1984-08-27 1984-08-27 Light time switch

Country Status (1)

Country Link
JP (1) JPH0632492B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2672173A1 (en) * 1991-01-29 1992-07-31 Cit Alcatel PHOTONIC TEMPORAL MULTIPLEXER, AND PHOTONIC TIME DEMULTIPLEXER.

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6534064B2 (en) * 2015-06-23 2019-06-26 学校法人北里研究所 Light source unit for optical coherence tomography and optical coherence tomography apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2672173A1 (en) * 1991-01-29 1992-07-31 Cit Alcatel PHOTONIC TEMPORAL MULTIPLEXER, AND PHOTONIC TIME DEMULTIPLEXER.
US5319484A (en) * 1991-01-29 1994-06-07 Alcatel Cit Photonic time-division multiplexer and demultiplexer

Also Published As

Publication number Publication date
JPH0632492B2 (en) 1994-04-27

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