JPS615500A - Memory integrated circuit - Google Patents

Memory integrated circuit

Info

Publication number
JPS615500A
JPS615500A JP59125500A JP12550084A JPS615500A JP S615500 A JPS615500 A JP S615500A JP 59125500 A JP59125500 A JP 59125500A JP 12550084 A JP12550084 A JP 12550084A JP S615500 A JPS615500 A JP S615500A
Authority
JP
Japan
Prior art keywords
circuit
bits
data
output
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59125500A
Other languages
Japanese (ja)
Inventor
Osamu Toyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP59125500A priority Critical patent/JPS615500A/en
Publication of JPS615500A publication Critical patent/JPS615500A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To improve the reliability of a memory integrated circuit with simple constitution by reading the same data written in the entire data width of plural bits, selecting the odd-number pcs. of data, stopping an output of an erroneous bit after the prescribed processing is applied and simultaneously selecting not- used bits.
CONSTITUTION: The same data written in the entire data width of four bits, etc., read out from a memory cell 14 is stored in a data output buffer 21. The data of three bits, etc., is selected through an output selection circuit 22 controlled by an erroneous bit memory circuit 27, and outputted through a majority decision circuit 24. When the data of three bits has errors, the circuit 22 controlled by the circuit 27 stops the output of bits where errors exist, and selects and outputs non-used bits. Thus the reliability of a memory integrated circuit can be improved with simple constitution where a code generator circuit, code decoding circuit, data correction circuit, etc., need not be made complicated along with an increase in bits.
COPYRIGHT: (C)1986,JPO&Japio
JP59125500A 1984-06-19 1984-06-19 Memory integrated circuit Pending JPS615500A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59125500A JPS615500A (en) 1984-06-19 1984-06-19 Memory integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59125500A JPS615500A (en) 1984-06-19 1984-06-19 Memory integrated circuit

Publications (1)

Publication Number Publication Date
JPS615500A true JPS615500A (en) 1986-01-11

Family

ID=14911644

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59125500A Pending JPS615500A (en) 1984-06-19 1984-06-19 Memory integrated circuit

Country Status (1)

Country Link
JP (1) JPS615500A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6037420A (en) * 1993-07-16 2000-03-14 Mazda Motor Corporation Polymer composite material and method for preparing the same
JP2011062317A (en) * 2009-09-16 2011-03-31 Olympia:Kk Game machine

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6037420A (en) * 1993-07-16 2000-03-14 Mazda Motor Corporation Polymer composite material and method for preparing the same
JP2011062317A (en) * 2009-09-16 2011-03-31 Olympia:Kk Game machine

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