JPS6154717A - Da converter circuit - Google Patents
Da converter circuitInfo
- Publication number
- JPS6154717A JPS6154717A JP17668284A JP17668284A JPS6154717A JP S6154717 A JPS6154717 A JP S6154717A JP 17668284 A JP17668284 A JP 17668284A JP 17668284 A JP17668284 A JP 17668284A JP S6154717 A JPS6154717 A JP S6154717A
- Authority
- JP
- Japan
- Prior art keywords
- resistance
- elements
- effect transistor
- saturated state
- mos field
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は、MOSg界効果トランジスタをスイッチング
素子とするDAコンバータ回路、特に当該スイッチング
素子に直列接続された抵抗素子を有スる・DAコンバー
タ回路に関する。Detailed Description of the Invention [Field of Application of the Invention] The present invention relates to a DA converter circuit using a MOSg field effect transistor as a switching element, and particularly to a DA converter circuit having a resistance element connected in series to the switching element. .
従来、例えば第1図に示されるような、スイッチと抵抗
網とで等何回路が構成てれる方式のDAコンバータ回路
は、スイッチはスイッチング素子、抵抗網は抵抗素子で
構成式れ、回路構成は最も単純でsbこれ以上簡略化す
る手段はないとされていた。なお、第1図は0MOS電
界効果トランジスタ(FET)をスイッチング素子とし
たR−2Bラダ一抵抗形DAコンバータ回路であシ、1
〜4がそれぞれPM03 F’ETIA〜4Aおよび
NMO5FETI B〜4Bからなる0MOSFET、
5〜1が抵抗仏凡の抵抗素子、8〜12が抵抗値2Rの
抵抗素子を示し、端子13〜16に最上位ビットから最
下位ビットまでの4ビツトのディジタル信号が入力され
端子11から対応するアナログ出力が得られる。またV
REFは電源で、圧である。Conventionally, in a DA converter circuit of the type shown in Fig. 1, in which several circuits are constructed of a switch and a resistor network, the switch is composed of a switching element, the resistor network is composed of a resistor element, and the circuit configuration is as follows. It was thought that there was no way to simplify it any further. Note that Fig. 1 shows an R-2B ladder one-resistance type DA converter circuit with a 0MOS field effect transistor (FET) as a switching element.
0 MOSFETs in which ~4 consists of PM03 F'ETIA~4A and NMO5FETI B~4B, respectively;
5 to 1 are resistance elements with a resistance value of 2R, 8 to 12 are resistance elements with a resistance value of 2R, and a 4-bit digital signal from the most significant bit to the least significant bit is input to terminals 13 to 16, and corresponding from terminal 11. An analog output is obtained. Also V
REF is the power supply, which is pressure.
本発明はこのような事情VC!みてな畜れたもので、そ
の目的は、従来不可能とてれていた回路構成の簡略化を
行なったDAコンバータ回路を提供することにある。The present invention addresses such circumstances as VC! The purpose of this invention is to provide a DA converter circuit whose circuit configuration has been simplified, which was thought to be impossible in the past.
このような目的を達成するために、本発明は、スイッチ
ング素子を構成するMOSfi界効果トランジスタの飽
和状態で動作する場合の定インピーダンス領域での出力
インピーダンスをこれに直列すべき抵抗の値に等しくす
ることによシ、当該MOS電界効果トランジスタを抵抗
素子としても兼用したものである。In order to achieve such an object, the present invention makes the output impedance in a constant impedance region equal to the value of the resistor to be series connected thereto when the MOSfi field effect transistor constituting the switching element operates in a saturated state. In particular, the MOS field effect transistor is also used as a resistance element.
第2図は、第1図の従来回路と同じ機能を有する回路に
適用した場合の本発明の一実施例を示す回路図である。FIG. 2 is a circuit diagram showing an embodiment of the present invention when applied to a circuit having the same function as the conventional circuit shown in FIG.
両図を対比して明らかなように、本実施例では各ディジ
タル信号の入力部に0MOSFET21〜24が接続さ
れるのみで、第1図において0MOSFET1〜4に直
列に接続された抵抗素子9〜12は独立の回路素子とし
ては接続されていない。代りに、本実施例においては、
0MOSFET21の製造ブ四セス中で、この0MOS
FET1〜構成するPMOSFB’l’21Aが飽和状
態で動作する定インピーダンス領域での出力インピーダ
ンスおよびNMOSFET21Bの同様の出力インピー
ダンスが抵抗素子9の抵抗値に等しくなるように制御し
である。同じく、0MOSFET22ないし24も、構
成要素のPM08 FET22Aないし24Aおよび
NMOSFET22Bないし24Bの飽和状態で動作す
る定インピーダンス領域での出力インピーダンスをそれ
ぞれ抵抗素子10ないし12の抵抗値に等しく設定し、
これによってそれぞれ独立の抵抗素子9ないし12?I
l−直列接続したと同様の効果を得ている。As is clear from comparing both figures, in this embodiment, only the 0MOSFETs 21 to 24 are connected to the input section of each digital signal, and the resistive elements 9 to 12 connected in series to the 0MOSFETs 1 to 4 in FIG. are not connected as independent circuit elements. Instead, in this example,
During the manufacturing process of 0MOSFET21, this 0MOS
The output impedance in a constant impedance region where FET1 to PMOSFB'l'21A constituting the transistor operate in a saturated state and the similar output impedance of NMOSFET21B are controlled so as to be equal to the resistance value of resistance element 9. Similarly, the output impedance of the 0MOSFETs 22 to 24 in a constant impedance region in which they operate in the saturated state of the component PM08 FETs 22A to 24A and NMOSFETs 22B to 24B is set equal to the resistance value of the resistance elements 10 to 12, respectively,
This results in independent resistance elements 9 to 12? I
The same effect as when connected in series is obtained.
以上、4ビツトの几−2几ラダ一抵抗形DCコンバータ
回路に適用した場合を例に説明したが、本発明はこれに
限定されるものではなく、ビット数の異なる回路や重み
抵抗方式のDAコンバータ回路などにも同様に適用でき
ることは言うまでもない。The above description has been made with reference to the case where the present invention is applied to a 4-bit ladder single-resistance type DC converter circuit, but the present invention is not limited to this, and is applicable to circuits with different bit numbers and weighted-resistance type DA converters. Needless to say, the present invention can be similarly applied to converter circuits and the like.
以上説明したよりく、本発明によれば、スイッチング素
子を構成するMOS電界効果トランジスタの飽和状態で
動作する場合の定インピーダンス領域での出力インピー
ダンスを直列に接続すべき抵抗の値に等しくし当該MO
SiO8電界効果トランジスタ素子を兼ねたことによシ
、MOS[界効果トランジスタで盆き換えられる抵抗素
子の数だけ、回路素子数の削減ができ回路構成が簡略化
される効果を有する。As explained above, according to the present invention, when the MOS field effect transistor constituting the switching element operates in a saturated state, the output impedance in the constant impedance region is made equal to the value of the resistor to be connected in series.
By also serving as a SiO8 field effect transistor element, the number of circuit elements can be reduced by the number of resistor elements that can be replaced with a MOS [field effect transistor], and the circuit configuration can be simplified.
第1図は従来のDCコンバータ回路の構成例を示す回路
図、第2図は本発明の一実施例を示す回路図である。FIG. 1 is a circuit diagram showing an example of the configuration of a conventional DC converter circuit, and FIG. 2 is a circuit diagram showing an embodiment of the present invention.
Claims (1)
と、このスイッチング素子に直列接続された抵抗素子と
含むDAコンバータ回路において上記MOS電界効果ト
ランジスタが飽和状態で動作する定インピーダンス領域
での出力インピーダンスを直列接続すべき抵抗の値に等
しく設定し当該MOS電界効果トランジスタを抵抗素子
として兼用したことを特徴とするDAコンバータ回路。A resistor to which the output impedance in a constant impedance region where the MOS field effect transistor operates in a saturated state is connected in series in a DA converter circuit including a switching element consisting of a MOS field effect transistor and a resistance element connected in series to the switching element. A DA converter circuit characterized in that the MOS field effect transistor is set equal to the value of , and the MOS field effect transistor is also used as a resistance element.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17668284A JPS6154717A (en) | 1984-08-27 | 1984-08-27 | Da converter circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17668284A JPS6154717A (en) | 1984-08-27 | 1984-08-27 | Da converter circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6154717A true JPS6154717A (en) | 1986-03-19 |
Family
ID=16017878
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17668284A Pending JPS6154717A (en) | 1984-08-27 | 1984-08-27 | Da converter circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6154717A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01285218A (en) * | 1988-05-13 | 1989-11-16 | Matsushita Electric Ind Co Ltd | Electric water heater |
EP1050970A2 (en) * | 1999-05-06 | 2000-11-08 | Texas Instruments Incorporated | Digital-to-analog converter |
-
1984
- 1984-08-27 JP JP17668284A patent/JPS6154717A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01285218A (en) * | 1988-05-13 | 1989-11-16 | Matsushita Electric Ind Co Ltd | Electric water heater |
EP1050970A2 (en) * | 1999-05-06 | 2000-11-08 | Texas Instruments Incorporated | Digital-to-analog converter |
EP1050970A3 (en) * | 1999-05-06 | 2003-10-08 | Texas Instruments Incorporated | Digital-to-analog converter |
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