JPS6149749B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a tape counter device installed in a tape recorder, and more particularly to a tape counter device that can display the running length and running time of a tape.

The most common tape counter uses a system that integrates the number of rotations of one reel shaft and displays the resulting value digitally. This method is convenient in that if you record the correspondence between positions on the tape and count values in advance, you can search for any position on the tape by fast forwarding or rewinding.
If the correspondence with the total length of the tape or the running time is not obtained in advance, it is not possible to obtain information such as how many more minutes of recording are possible during recording, for example. On the other hand, if the tape running time is displayed, it is advantageous for managing the recording time, but when the tape running speed changes, the correspondence with the tape position is lost.

SUMMARY OF THE INVENTION An object of the present invention is to provide a tape counter device that can selectively display either the running length or the running time of a tape without interfering with the mutual functions. That is, in this invention, a first counter that counts tape pulses corresponding to the running of the tape and a second counter that counts pulses corresponding to the passage of time are provided, and either one of the counts of these two counters is provided. The above objective is achieved by digitally displaying one on a display device.

Next, one embodiment of the present invention will be described with reference to the drawings. In FIG. 1, reference numeral 1 indicates counter A, and reference numeral 2 indicates counter B. After one of them is selected by a selection circuit 3, the count number of each is determined by a wrap circuit 4, a gate circuit 5, and a decoder 6. The information is supplied to the display device 7 and digitally displayed by a plurality of (four in this example) display elements 7a to 7d.

Tape pulses are supplied to the counter A1 via an inverter 8, a chattering prevention circuit 9, and a divider 10. This tape pulse consists of a series of pulse trains having a frequency corresponding to the running speed of the tape set in the tape recorder.For example, the tape pulse is passed from a light emitting element to a light receiving element through a slit provided in a disk that rotates with the reel shaft. It is obtained by converting an incident light pulse into an electrical pulse signal. Note that the divider 10
is for dividing the frequency of the tape pulse to obtain an appropriate frequency, and can be omitted if the frequency of the tape pulse itself is an appropriate value. Further, a direction command is given to the counter A1 to distinguish whether the running direction of the tape is the forward direction or the reverse direction.
is the content of this direction command (in this example, "H",
The tape pulse applied from the divider 10 is counted up or down depending on the difference in the level of "L". The count number is then supplied to the selection circuit 3.

On the other hand, the counter B2 performs an operation of counting the number of pulses of a pulse signal having a constant reference frequency, and therefore, the counted number corresponds to time. In this example, the means to obtain the reference frequency signal pulse is 50Hz (or 60Hz) from the commercial power supply.
Hz) is extracted through the chattering prevention circuit 11, and then first divided into 1/5 by the divider 12.
(or 1/6), and then use divider 13 to divide the frequency into 1/6.
A circuit is provided which generates a 1 Hz pulse by dividing the frequency by 10. If necessary, the dividers 12 and 13 each have a function of dividing the input signal to 1/8 so that it can also correspond to a 64Hz AC input obtained by dividing the oscillation signal from the crystal. This frequency division ratio selection is performed by supplying control signals to the dividers 12 and 13 from a control circuit 14 operated by a frequency selection signal. In addition, in order to obtain an operation in which the output of the divider 12 is supplied to the divider 13 only for the necessary time, the output of the divider 12 is used as the first input, and the start command supplied via the chattering prevention circuit 15 is used as the second input. An AND gate 16 is provided as an input. For example, an operation command such as a start command is set to the "H" level only while the tape is running at a constant speed during recording or playback, or while a push button is pressed to obtain the stopwatch function. Divider 1 is a signal that is
The output of 2 is input to the divider 13.

The counter A1 is a decimal counter that counts, for example, from 0 to 9999, and the counted number is supplied to the selection circuit 3, and the carry is taken out to the outside as necessary. Also counter B2
is a 4-digit sexagesimal counter that counts input pulses of 1 Hz, counts from 0 to 5959, and supplies the counted number to the selection circuit 3.

An example of a specific circuit configuration of the selection circuit 3 is shown in FIG. In this example, the selection circuit 3 selects the counter A
1, and a second select gate 3b connected to each output terminal of the counter B2, each output terminal of the first select gate 3a. is connected to one output terminal of the second select gate 3b, and the numerous connection points formed here are connected to one L input of a plurality of latch elements 4a constituting the wrap circuit 4. There is. In addition, the "H" or "L" level display selection command generated by the operation of a changeover switch (not shown) is sent to the control terminal of the first select gate 3a as is, and to the second select gate 3a.
are supplied to control terminals of select gates 3b through inverters 3c, respectively. Therefore, when the display selection command is at the "L" level, all the second select gates 3b are closed, but the first select gate 3a is open, so only the output of the counter A1 is applied to each latch of the wrap circuit 4. It is supplied to element 4a. Further, when the display selection command becomes "H" level, the first select gate 3a closes and the second select gate 3a closes.
b is open, so only the output of counter B2 is supplied to each latch element 4a. This provides an operation of selecting only one of the outputs of counter A1 and counter B2.

Furthermore, each latch element 4a of the wrap circuit 4, when the level of the wrap command accepted at its φ input is "H", outputs the input accepted at the L input as is as the Q output, but the level of the wrap command is "H". When the level changes from "H" to "L", an operation is performed to output the L input at the time of this change to the Q output.
Therefore, even if the counting operation of counter A1 and/or counter B2 is in progress, the count number when the wrap command reaches the "L" level is supplied to gate circuit 5. This lap directive is
As shown in FIG. 1, it is given as a pulse obtained by operating a suitable operating member (not shown), and this pulse is supplied to a T-flip-flop 18 via an anti-chattering circuit 17. Reverse this. This inversion causes the output level to become "L", and this "L" level signal is given to the wrap circuit 4 as a wrap command, and the wrap circuit 4 performs a wrap operation. When the operating member is operated again, a pulse is supplied to the T-flip-flop 18 to invert it, and this inversion causes the output level to become "H" and the wrap operation of the wrap circuit 4 to be released. Also T-
The flip-flop 18 receives a pulse sent from the selection circuit 3 when the display selection command is switched.
It is reset by being applied as a reset signal to the reset terminal via the OR gate 19, thereby canceling the wrap operation if the wrap circuit 4 is performing a wrap operation.

The output of the selection circuit 3 is divided into multiple digits (in this example, 4 digits, each digit consisting of a 4-bit binary code) indicating the count number of counter A1 or counter B2. The output is supplied to the decoder 6 and at the same time to the gate circuit 5, where a zero suppress signal is generated. This zero suppression signal is transmitted to the decoder 6 through the OR gate 21. In the gate circuit 5, when the counter A1 is selected, if the content is other than zero, a zero suppress signal is sent to erase the zero in the most significant digit, and when counter B2 is selected, the zero in only the most significant digit is generated. Creates a zero suppression signal that disappears. Each decoder 6 receives the input 4
The bit binary code is decoded according to a predetermined method, and the corresponding display elements 7a to 7d are
A signal is provided to cause only the segments needed to display the desired digits to emit light. As a result, the display device 7 digitally displays numbers from 0 to 9999 when the count number of counter A1 is selected, and numbers from 0 to 5959 when the count number of counter B2 is selected. be done. In addition, if a zero suppress signal is included, the decoder 6
The output of is turned off, and the display on the display device 7 disappears.
Also, the blanking command is applied to the inverter 20 and
applied to the decoder 6 through the OR gate 21,
This is for turning off all the display on the display device 7 by turning off the output.

Furthermore, a gate circuit 22 is provided to obtain a function of resetting one or both of counter A1 and counter B2. This gate circuit 22 includes AND gates 23 and 24
, OR gates 25 and 26, and inverter 2
7, AND gates 23, 24
A reset command is supplied to one input terminal of the , and the above-mentioned display selection command is supplied to the other input terminal. This display selection command indicates the count number of counter A1 when it is at the "L" level, and when it is at the "H" level.
This is to control the selection circuit 3 so that the count number of the counter B2 is displayed respectively when the level is high, and it is supplied as is to one AND gate 24, but the inverter 27 is supplied to the other AND gate 23. Supplied via. Therefore, when a reset command (which consists of one pulse) is supplied to the gate circuit 22 by operating an operating member (not shown) such as a pushbutton, this reset command is Selection command is “L”
If it is level, it passes through AND gate 23 and OR gate 25 and is output to counter A1 and divider 10.
is added to the reset input of the AND gate 24 and OR if the display selection command is at "H"
It passes through gate 26 and is applied to the reset input of counter B2. When the display selection command is at the "L" level, the count number of the counter A1 is displayed on the display device 7, and when the display selection command is at the "H" level, the count number of the counter B2 is displayed. Therefore, the reset command resets only the counter A1 or the counter B2 which is supplying the count number to the display device 7 at that time, but does not reset the other counter.

Note that the OR gates 25 and 26 are provided to supply the pulses generated by the reset circuit 28 when the power is turned on as a reset signal to the reset inputs of the counter A1, the divider 10, and the counter B2, and can be omitted. It is.
Note that the reset signal is ORed with the reset command.
Also supplied to gate 19 and used to reset T-flip-flop 18.

Furthermore, a detection circuit 29 is provided to provide end detection functions for detecting when the tape has finished running to the end, and position detection functions for rewinding the tape until a predetermined position is detected. This detection circuit 29 has a timer that performs a timer operation based on a constant frequency reference signal obtained from the divider 12, and this timer is cleared every time a tape pulse is supplied. Therefore, when the tape stops running and tape pulses are no longer supplied, the timer starts operating from this point on, and output is generated when the set time has elapsed. This output is fed through a timer 31 to a driver 32 whose output is taken externally to drive a relay that shuts off the tape recorder mechanism. The timer 31 functions to continue the operation of the driver 32 for the time required for the relay to operate (for example, 200 to 400 msec) after the output is supplied from the detection circuit 29.

The detection circuit 29 also has a function of accepting a signal from the counter A1 indicating that the count number has reached "0" and providing an output to the timer 31 if the level of the memory command is "H" at this time. There is. This function is used as automatic position detection to reset the counter A1 at any position on the tape, rewind from another position, and stop at the initial position. Note that this operation is not performed if the memory command is at the "L" level.

As described above, according to the present invention, tape pulses corresponding to the running of the tape are counted by the first counter, reference frequency signal pulses are counted by the second counter, and the pulses are sent to the selection circuit by the first counter.
inputting the outputs from the counter and the second counter, selectively outputting either one from the selection circuit to the display device, displaying the output from the selection circuit on the display device, and outputting the output from the selection circuit to the display device. is applied to a gate circuit, and the gate circuit is configured to generate a zero suppress signal for erasing a specific display of the upper digit depending on the selection state of the first counter or the second counter by the selection circuit. Therefore, the first counter performs a counting operation corresponding to the tape running length, and the second counter separately and independently from the first counter performs a counting operation corresponding to the time. One of the counts can be selected by the selection circuit and digitally displayed on the display device.

Further, the gate circuit creates a zero suppress signal for erasing the zero display of the upper digit according to the selection state of each digit output from the first counter or the second counter by the selection circuit, The display device does not display zeros in the upper digits, and furthermore, since the zeros in the upper digits are displayed differently when the tape running is displayed and when the running time is displayed, the display is easy to see for the user.

According to another aspect of the present invention, an AND gate circuit provides a command to cause the second counter to perform a counting operation at least while an operation command generated during constant speed running of the tape or during external operation is given. Therefore, while the first counter is performing counting operations related to tape running, the second counter can be started or stopped to measure, for example, the playing time of a recorded song. That is, the function as a stop watch can be obtained, or the second counter can be started at the start of the tape and the recording time can be monitored while the first counter can be reset at any tape running position. It is also possible to rewind the tape to a predetermined position after recording is complete. In other words, it is possible to manage the running of the tape in terms of both running length and time, making it more convenient to use than conventional tape counter devices that can perform only one of these functions. This results in a significant improvement.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the configuration of a tape counter device according to an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a part thereof in detail. 1...Counter A, 2...Counter B, 3...
Selection circuit, 4...Lap circuit, 5...Gate circuit, 7...Display device, 7a to 7d...Display element,
22...gate circuit, 29...detection circuit, 31...
...Timer, 32...Driver.

Claims (1)

[Claims] 1. A first counter that counts up or down tape pulses according to the running direction of the tape, and a reference frequency signal pulse that is independent of the first counter. a second counter for counting, a selection circuit for selecting and outputting one of the counter outputs of the first counter and the second counter, and a multi-digit counter for digitally displaying the output of the selection circuit. A digital display device and an output from the selection circuit are applied to the first counter or the second counter.
and a gate circuit for creating a zero suppress signal for erasing a specific display of the upper digit according to the selection state of the first counter or the second counter.
A tape counter device for a tape recorder, characterized in that the count output of the counter can be selectively displayed. 2. A first counter that counts up or down tape pulses according to the running direction of the tape, and a second counter that counts reference frequency signal pulses;
an AND gate circuit that instructs the second counter to perform a counting operation only while an operation command generated during constant speed running of the tape or external operation is given; a selection circuit that selects and outputs one of the count outputs of the counter; a multi-digit digital display device that digitally displays the output of the selection circuit; and the output from the selection circuit is applied; and a gate circuit for creating a zero suppress signal for erasing a specific display of the upper digit according to the selected state of the counter or the second counter, and selectively controls the count output of the first counter or the second counter. A tape counter device for a tape recorder, characterized in that it is displayable.