JPS614279A - Bipolar transistor - Google Patents
Bipolar transistorInfo
- Publication number
- JPS614279A JPS614279A JP12467184A JP12467184A JPS614279A JP S614279 A JPS614279 A JP S614279A JP 12467184 A JP12467184 A JP 12467184A JP 12467184 A JP12467184 A JP 12467184A JP S614279 A JPS614279 A JP S614279A
- Authority
- JP
- Japan
- Prior art keywords
- collector
- layer
- depletion
- base
- energy
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002772 conduction electron Substances 0.000 claims description 10
- 238000009826 distribution Methods 0.000 abstract description 8
- 239000004065 semiconductor Substances 0.000 abstract description 8
- 150000001875 compounds Chemical class 0.000 abstract description 3
- 230000007423 decrease Effects 0.000 abstract description 3
- 239000000203 mixture Substances 0.000 description 8
- 239000013078 crystal Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000005684 electric field Effects 0.000 description 5
- 230000007704 transition Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 239000012535 impurity Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 239000000969 carrier Substances 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000001451 molecular beam epitaxy Methods 0.000 description 2
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005685 electric field effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/737—Hetero-junction transistors
- H01L29/7371—Vertical transistors
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は超高周波・超高速動作特性に優れた新規な構造
を有するバイポーラトランジスタに関するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a bipolar transistor having a novel structure with excellent ultra-high frequency and ultra-high speed operating characteristics.
(従来技術とその問題点)
にて与えられる。従って可及的に大きなfTを実現する
ためには、これら3つの時定数を可及的に低減すること
が蚕請される。(Prior art and its problems) is given below. Therefore, in order to realize fT as large as possible, it is necessary to reduce these three time constants as much as possible.
τ8はエミッタ空乏層充電時間と呼ばれ、エミ、夕電流
をIB、エミッタ接合容量およびその他の寄生容量を夫
々Oe、c、および0.としてT
τB = 二、Oe+Oc十〇、) =(2
)?
にて与えられる。ここで4はボルツマン定数、?は電子
の電荷、そしてTは温度である:エミッタ接合は順方向
にバイアスされるためエミッタ接合容量Ceは大きく、
その低減が課題である。τ8 is called the emitter depletion layer charging time, where the emitter current is IB, the emitter junction capacitance and other parasitic capacitances are Oe, c, and 0. As T τB = 2, Oe+Oc〇, ) = (2
)? It will be given at Here, 4 is Boltzmann's constant, ? is the electron charge, and T is the temperature: Since the emitter junction is forward biased, the emitter junction capacitance Ce is large;
The challenge is to reduce it.
τおはベース層充電時間と呼ばれ、
にて与えられる。ここでWBはベース層の厚さ、DBは
ベース領域における少数キャリヤの拡散定数そしてηは
ベース領域中の不純物イオン分布にもとすく電界効果の
寄与をあられす定数であり、均一不純物イオン分布の場
合にはη=2である。τ is called the base layer charging time and is given by . Here, WB is the thickness of the base layer, DB is the diffusion constant of minority carriers in the base region, and η is a constant that accounts for the contribution of the electric field effect to the impurity ion distribution in the base region, and is a constant for uniform impurity ion distribution. In this case, η=2.
従って該ベース層充電時間τ6を短縮するためにはベー
ス層の厚さWBの低減と拡散定数への大きな材料の選択
およびベース領域中の加速電界によるηの増大が要求さ
れる。Therefore, in order to shorten the base layer charging time τ6, it is necessary to reduce the base layer thickness WB, select a material with a large diffusion constant, and increase η by an accelerating electric field in the base region.
τ0はコレクタ空乏層走行時間と呼はれ、にて与えられ
る。ここでWcはコレクタ接合空乏(層の厚さ、Vdは
該層を走行するキャリヤのドリフト速度である。従って
、該コレクタ空乏層走行時間τ。を低減するためには、
該空乏層厚さWcの低減おドリフト速度Vjの可及的な
増大を実現する事が必要となる。τ0 is called the collector depletion layer transit time and is given by. Here, Wc is the thickness of the collector junction depletion layer, and Vd is the drift velocity of carriers traveling through the layer. Therefore, in order to reduce the collector depletion layer transit time τ,
It is necessary to reduce the depletion layer thickness Wc and increase the drift velocity Vj as much as possible.
最近、半導体結晶成長技術および不純物導入等のプロセ
ス技術の進歩によるベース層厚さW の低減、および微
細加工による素子構造の極限的微細化、更にはへテロ接
合技術の進歩によるwide−gap emitte
r構造の実現などによりエミッタ接合容量の低減が進み
、τ8.およびτ、の低減は進んでいる。しかるにコレ
クタ接合空乏層厚さW の低減はトランジスタのコレク
タ耐圧を低下させるため、その低減は制限され、かつ高
電界が印加される該空乏層中においてはキャリヤのドリ
フト速度は飽和しその上限が規制されるためコレクタ空
乏層走行時間τ。の短縮は次第にトランジスタのfTを
制限する要因になっている。Recently, the base layer thickness W has been reduced due to advances in semiconductor crystal growth technology and process technology such as impurity introduction, and the element structure has been made extremely fine through microfabrication, and wide-gap emitters have been improved due to advances in heterojunction technology.
The emitter junction capacitance has been reduced by realizing the r structure, etc., and τ8. and τ are being reduced. However, since reducing the collector junction depletion layer thickness W lowers the collector breakdown voltage of the transistor, the reduction is limited, and in the depletion layer where a high electric field is applied, the carrier drift velocity is saturated and its upper limit is regulated. collector depletion layer transit time τ. The reduction in fT is gradually becoming a factor that limits the fT of transistors.
(発明の目的)
本発明の目的は上記飽和ドリフト速度を大きく上まわる
大きなドリフト速度の実現により、コレクタ空乏層走行
時間τ。を著しく低減し得る新規な構造のバイポーラト
ランジスタを提供するものである。(Object of the Invention) The object of the present invention is to realize a large drift speed that greatly exceeds the saturation drift speed, thereby reducing the collector depletion layer transit time τ. The object of the present invention is to provide a bipolar transistor with a novel structure that can significantly reduce the
(発明の原理)
本発明は以下に詳述するごとく、ベース領域およびコレ
クタ領域が夫々に異なる種類の化合物半導体よりなり、
かつコレクタ空乏層中に特徴的な電位分布が形成されて
いることを本質とする。(Principle of the Invention) As described in detail below, the present invention has a base region and a collector region each made of a different type of compound semiconductor,
The essence is that a characteristic potential distribution is formed in the collector depletion layer.
化合物半導体中における伝導電子の速度飽和は、該半導
体層中の高い電界により高エネルギーに加速された電子
が、波数空間の中心にある高移動度のF谷から高エネル
ギーに位置する低移−動度のLまたはX谷へ遷移するこ
とにより生ずる。−例として砒化ガリウムについて考え
るとF谷とL谷とのエネルギー差は約0.3eVであり
、このエネルギー差以上に加速されたF谷内の電子はし
谷への遷移の確率を有するに至る。該遷移に伴うエネル
ギー損失の緩和時間は〜1013N!c程度であり、こ
の時間内においては伝導電子はF谷内に存在し、過渡的
に高ドリフト速度が実現される。従って、伝導電子が高
電界下にて加速走行する過程に2いて、P谷からL谷へ
の遷移を生する直前に伝導電子のもつ過剰な運動エネル
ギーを制御して損失させることによりr谷からL谷への
遷移を抑制することができ、電界による加速とエネルギ
ー損失とを繰りかえすことにより、長時間そして長距離
の走行にわたりF谷内における伝導電子の高速走行を可
能とし得る。Velocity saturation of conduction electrons in a compound semiconductor means that electrons accelerated to high energy by a high electric field in the semiconductor layer move from a high-mobility F valley located at the center of wave number space to a low-mobility position located at a high energy. It is caused by a transition to the L or X valley of the degree. - Considering gallium arsenide as an example, the energy difference between the F valley and the L valley is about 0.3 eV, and there is a probability that electrons in the F valley will transition to a valley when they are accelerated more than this energy difference. The relaxation time of energy loss accompanying this transition is ~1013N! During this time, conduction electrons exist within the F valley, and a transiently high drift speed is achieved. Therefore, when conduction electrons are in the process of accelerating under a high electric field, the excess kinetic energy of conduction electrons can be controlled and lost just before the transition from P valley to L valley. By suppressing the transition to the L valley and repeating acceleration and energy loss due to the electric field, it is possible to enable conduction electrons to travel at high speed in the F valley over long and long distances.
第1図は上記の過剰な運動エネルギーの損失を可能とす
る一方法を示す図である。11は伝導電子に対するエネ
ルギーを、12は伝導電子とその運動方向を示している
。伝導電子12が場所、Xl、X。FIG. 1 is a diagram illustrating one method of making it possible to dissipate the above-mentioned excess kinetic energy. 11 indicates the energy for conduction electrons, and 12 indicates the conduction electrons and their movement direction. Conduction electron 12 is in place, Xl, X.
・・・を通過する際ΔEなる運動エネルギーを失うこと
が示されている。It has been shown that when passing through..., it loses kinetic energy of ΔE.
半導体中にて伝導電子に対するエネルギー即ち伝導帯下
端のエネルギーに差を形成する一つの方法は電子親和力
の異る半導体を接合することである。第2図は本q8J
1fこおける下記実施例に関連し、燐化インジウム(以
下InPと記す)に格子整合するIn1.[GaXAs
、Pl、の組成(x、y)変化に伴う伝導帯下端および
価電子帯上端の工″不ルギーを示す。横軸21は組#:
yを示し、格子整合の条件より組成Xはyを与える事に
より自動的に決定される。縦軸22は電子に対するエネ
ルギーそして紹および2Aは夫々伝導帯下端および価電
子帯上端のエネルギーを示す。第2図の示すことは、Y
=1即ちI n o、53Ga o、u As混晶より
yが減少するに伴い伝導帯下端のエネルギーは増大し、
即ち電子親和力は減少し、y=Qの1nPとY=1の”
0.53Ga 、47As とでは伝導帯下端に約0
.25eVのエネルギー差があることを示している。従
って、yの異る組成の1n1□G a x A s y
P t y層を順次重ねる事により第2図[有])の
ごとき所望のエネルギー分布構造を得ることが出来る。One method of creating a difference in the energy for conduction electrons, that is, the energy at the bottom of the conduction band, in a semiconductor is to bond semiconductors with different electron affinities. Figure 2 is from book q8J
1f, In1. [GaXAs
, Pl, shows the engineering inertia at the lower end of the conduction band and the upper end of the valence band as the composition (x, y) changes. The horizontal axis 21 represents the group #:
y, and based on the lattice matching condition, the composition X is automatically determined by giving y. The vertical axis 22 indicates the energy for electrons, and the lines 2A and 2A indicate the energy at the lower end of the conduction band and the upper end of the valence band, respectively. What Figure 2 shows is that Y
= 1, that is, I n o, 53 Ga o, u As y decreases from the As mixed crystal, the energy at the bottom of the conduction band increases,
In other words, the electron affinity decreases, and 1nP for y=Q and "1nP for Y=1"
For 0.53Ga and 47As, there is about 0 at the lower end of the conduction band.
.. This shows that there is an energy difference of 25 eV. Therefore, 1n1□G a x A s y with different compositions of y
By sequentially stacking P ty layers, a desired energy distribution structure as shown in FIG. 2 can be obtained.
(実施例)
第3図は本発明の半導体装置の一実施例を示す図である
。301は低抵抗n型InP基板結晶、302は該基板
結晶上にエピタキシャル成長した厚さ約0.2μmでド
ナー濃度約5×1016傭−3のn型1nPf
層・303・304および305は夫al″1結晶
に格子整合する厚さ約o、iμm、ドナー濃度的5 X
1.0”m3のIn、、GaxAsyP、、層′で組
成yを夫々、約0.18 、0.23 、および0.5
5 と選ぶ事により隣り合った13層間ζこ約0.06
eVのエネルギー差を形成する事が出来る。306は厚
さ約0.05μmで、アクセプタ濃度的5×1018c
rn−3のp型層 n o、53Ga o、4y A、
s鳳307は厚さ約05μmでドナー濃度約5刈(31
7確 のl n t、C(] a x A S y P
1コ(y中0.5 r x中0.22)のn型層、そ
して308は良好なオーム性接触を形成するための低抵
抗n型I n o 、s s G ao 、47A 5
層である。309 、310 :Bよび311ハ夫43
08 、306おの条件を満し、分子線エピタキシー(
MBE)または気相エピタキシー(■PE)技術により
InP基板上に連続して成長可能である。(Embodiment) FIG. 3 is a diagram showing an embodiment of the semiconductor device of the present invention. 301 is a low-resistance n-type InP substrate crystal, and 302 is an n-type 1nPf epitaxially grown on the substrate crystal with a thickness of about 0.2 μm and a donor concentration of about 5×1016−3.
Layers 303, 304 and 305 are lattice matched to the husband al''1 crystal, have a thickness of approximately o, iμm, and have a donor concentration of 5X.
1.0"m3 of In, GaxAsyP, and layers' with compositions y of approximately 0.18, 0.23, and 0.5, respectively.
By choosing 5, the distance between 13 adjacent layers ζ is approximately 0.06
It is possible to form an energy difference of eV. 306 has a thickness of about 0.05μm and an acceptor concentration of 5×1018c.
p-type layer of rn-3 no, 53Ga o, 4y A,
S-Otori 307 has a thickness of about 05μm and a donor concentration of about 5Ki (31
7 sure l n t, C(] a x A S y P
1 (0.5 in y and 0.22 in r x) n-type layer, and 308 is a low resistance n-type I no , s s G ao , 47A 5 to form a good ohmic contact.
It is a layer. 309, 310: B and 311 Husband 43
Molecular beam epitaxy (
It can be continuously grown on an InP substrate by MBE) or vapor phase epitaxy (PE) technology.
本実施例は第3図より明らかなようtこ301〜3【)
5の領域がコレクータ、、306がベースそして307
〜308がエミ′ツタであるnpn ヘテロ接合バイ
ポーラトランジスタを形成している。本構造ζこおける
エミッタ接合は]: n + x G a x A S
y P 11(Y″中05)/I n o、si G
a o、4□Asよりなる謂ゆるwide−gapem
itter を形成し、その低エミッタ接合容量のた
め従来のへテロ接合バイポーラトランジスタダと同様優
れた高周波特性を示す。更に本実施例構造は、上記詳述
の如(コレクタ接合空乏層中に前記詳述の高ドリフト速
度を実現し得る特徴的な電位分布構造を有し、ベースよ
り′Jコレクタ向う電子のコレクタ空乏層走行時間の著
しい短縮により従来構造に較べ顕著番こ高周波特性の改
良を可能としている。As is clear from FIG. 3, this embodiment
Area 5 is collector, 306 is base and 307
.about.308 form an npn heterojunction bipolar transistor having emitters. The emitter junction in this structure ζ is]: n + x G a x A S
y P 11 (05 in Y″)/I no, si G
So-called wide-gapem consisting of ao, 4□As
itter, and due to its low emitter junction capacitance, it exhibits excellent high frequency characteristics similar to conventional heterojunction bipolar transistors. Furthermore, the structure of this embodiment has a characteristic potential distribution structure in the collector junction depletion layer that can realize the high drift speed described in detail above, as described in detail above, and the collector depletion of electrons from the base to the J collector is The remarkable shortening of the layer running time makes it possible to significantly improve the high frequency characteristics compared to the conventional structure.
上記実施例はnpn トランジスタについて説明した
がpnp トランジスタについても同様である。Although the above embodiment describes an npn transistor, the same applies to a pnp transistor.
また上記実施例はInGaAsP を基本材料とした
ものであるが、他の材料例えばA lG a A sを
用いその組成を変えるCとによっても本発明の特徴的構
造を実現し得ることは言う丈でもない。Further, although the above embodiment uses InGaAsP as the basic material, it goes without saying that the characteristic structure of the present invention can also be realized by using other materials such as AlGaAs and changing the composition. do not have.
(発明の効果)
本発明によればコレクタ空乏層走行時間τ。を著しく低
減でき、きわめて高速なバイポーラトランジスタを得る
ことができる。(Effects of the Invention) According to the present invention, the collector depletion layer transit time τ. can be significantly reduced, and an extremely high-speed bipolar transistor can be obtained.
第1図は空間的に変化している電位中を走行する電子が
運動エネルギーを損失する機Sを示す図である。11は
電子に対するエネルギー、12は電子とその運動方向を
示す。
第2図(a)はIn、、cGaxAsyPl、混晶にお
いてInPと格子整合の条件下にて組成yを変化した時
の伝導帯下端および価電子帯上端の変化を示す図。
21は組成y、22は電子に対するエネルギ、23およ
び冴は夫々価電子帯上端および伝導帯下端のエネルギー
を示す。第2図(b)は、組成yの異る1 n I X
GaXAs、P、□を重ねる事により形成された階段状
の電位分布を示す図。
第3図は本発明のバイポーラトランジスタの一実施例を
示す断面図である。
301は低抵抗−n型InP基板、302はn型InP
層、低抵抗n型InGaA、Q層そして309 、’3
10および311は夫々308 、306および301
ヘオーム性接触をなす電極である。FIG. 1 is a diagram showing a mechanism S in which electrons traveling in a spatially varying electric potential lose kinetic energy. 11 indicates the energy for the electron, and 12 indicates the electron and its direction of movement. FIG. 2(a) is a diagram showing changes in the lower end of the conduction band and the upper end of the valence band when the composition y is changed in In, cGaxAsyPl, mixed crystal under conditions of lattice matching with InP. 21 represents the composition y, 22 represents the energy for electrons, and 23 and ε represent the energy at the upper end of the valence band and the lower end of the conduction band, respectively. FIG. 2(b) shows 1 n I X with different composition y.
A diagram showing a step-like potential distribution formed by stacking GaXAs, P, and □. FIG. 3 is a sectional view showing an embodiment of the bipolar transistor of the present invention. 301 is a low resistance n-type InP substrate, 302 is an n-type InP
layer, low resistance n-type InGaA, Q layer and 309,'3
10 and 311 are 308, 306 and 301 respectively
It is an electrode that makes heomic contact.
Claims (1)
て2層以上の多層構造よりなるバイポーラトランジスタ
であって、npn型の場合は互いに隣接する層の伝導帯
下端にエネルギー差を有し、コレクタ側の層の伝導帯下
端はベース側の層の伝導帯下端に較べ伝導電子に対して
より高いエネルギーを有し、pnp型の場合は互いに隣
接する層の価電子帯上端にエネルギー差を有し、コレク
タ側の層の価電子帯上端はベース側の価電子帯上端に較
べ正孔に対してより高いエネルギーを有することを特徴
とするバイポーラトランジスタ。In the case of a bipolar transistor in which the collector region adjacent to the base region has a multilayer structure of two or more layers in the vicinity of the junction, and in the case of an npn type, there is an energy difference at the lower end of the conduction band between the adjacent layers, and the collector region The lower end of the conduction band of the layer has a higher energy for conduction electrons than the lower end of the conduction band of the layer on the base side, and in the case of a pnp type, there is an energy difference between the upper ends of the valence bands of adjacent layers, A bipolar transistor characterized in that the upper end of the valence band of the layer on the collector side has higher energy for holes than the upper end of the valence band on the base side.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12467184A JPS614279A (en) | 1984-06-18 | 1984-06-18 | Bipolar transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12467184A JPS614279A (en) | 1984-06-18 | 1984-06-18 | Bipolar transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS614279A true JPS614279A (en) | 1986-01-10 |
Family
ID=14891174
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12467184A Pending JPS614279A (en) | 1984-06-18 | 1984-06-18 | Bipolar transistor |
Country Status (1)
Country | Link |
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JP (1) | JPS614279A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5206524A (en) * | 1988-09-28 | 1993-04-27 | At&T Bell Laboratories | Heterostructure bipolar transistor |
-
1984
- 1984-06-18 JP JP12467184A patent/JPS614279A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5206524A (en) * | 1988-09-28 | 1993-04-27 | At&T Bell Laboratories | Heterostructure bipolar transistor |
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