JPS6135369A - Signal processor - Google Patents

Signal processor

Info

Publication number
JPS6135369A
JPS6135369A JP15781184A JP15781184A JPS6135369A JP S6135369 A JPS6135369 A JP S6135369A JP 15781184 A JP15781184 A JP 15781184A JP 15781184 A JP15781184 A JP 15781184A JP S6135369 A JPS6135369 A JP S6135369A
Authority
JP
Japan
Prior art keywords
pulse
clock
pulse signal
counted
signal input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15781184A
Other languages
Japanese (ja)
Other versions
JPH0743401B2 (en
Inventor
Takaaki Furuta
Satoshi Endo
Masaharu Morita
Eiji Minami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59157811A priority Critical patent/JPH0743401B2/en
Publication of JPS6135369A publication Critical patent/JPS6135369A/en
Publication of JPH0743401B2 publication Critical patent/JPH0743401B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE: To detect pulse widths, pulse frequencies, etc., of plural pulse signals with high precision by using a small number of components by reading the value of one N-bit counter successively corresponding to variation of a pulse signal input and then performing arithmetic processing.
CONSTITUTION: Two pulse inputs of a clock pulse generating means 26 are set to such a frequency that the value when 256 clock pulses are counted is larger than a maximum period od. Then, this clock is counted by an 8-bit counter 27 which is invariably in a count enable state. Further, an interruption processing means 23 performs interruption processing when the 1st pulse signal varies from L→H. Then, an arithmetic processor 24 performs arithmetic on the basis of data stored in plural memories 25 to read the period of pulse width of the pulse signal input accurately.
COPYRIGHT: (C)1986,JPO&Japio
JP59157811A 1984-07-27 1984-07-27 Signal processor Expired - Lifetime JPH0743401B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59157811A JPH0743401B2 (en) 1984-07-27 1984-07-27 Signal processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59157811A JPH0743401B2 (en) 1984-07-27 1984-07-27 Signal processor

Publications (2)

Publication Number Publication Date
JPS6135369A true JPS6135369A (en) 1986-02-19
JPH0743401B2 JPH0743401B2 (en) 1995-05-15

Family

ID=15657805

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59157811A Expired - Lifetime JPH0743401B2 (en) 1984-07-27 1984-07-27 Signal processor

Country Status (1)

Country Link
JP (1) JPH0743401B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49137449U (en) * 1973-03-24 1974-11-26
JPS5494380A (en) * 1978-01-10 1979-07-26 Yokogawa Hokushin Electric Corp Counter using microprocessor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49137449U (en) * 1973-03-24 1974-11-26
JPS5494380A (en) * 1978-01-10 1979-07-26 Yokogawa Hokushin Electric Corp Counter using microprocessor

Also Published As

Publication number Publication date
JPH0743401B2 (en) 1995-05-15

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