JPS613526A - Ternary input method of electronic circuit - Google Patents

Abstract

PURPOSE:To detect three states (H level, L level, OPEN) and to input the state by a single input/output terminal without using a lot of terminals by connecting a resistor and a capacitor between the input/output terminal of an electronic circuit and a point at a prescribed potential. CONSTITUTION:An FET3 is turned on for a period t0 before a potential at the input/ output terminal 2 is inputted, a capacitor 6 is charged up to a power supply voltage VDD regardless of the state of a switch (SW)5 and the potential at the terminal 2 is brought into an H level. When the FET3 is turned off, the potential at the terminal 2 remains H level when the SW5 is turned on to the position of contact A. When the SW5 is turned on to the position of contact B, the potential at a terminal 2 is decreased gradually according to the time constant comprising a resistor 7 and the capacitor 6 and when the SW5 is turned on to the position of contact C, since the time constant in this case is far smaller than the time constant when the SW5 is thrown to the position of contact B, the potential at the terminal 2 drops rapidly. After a t1 period, the potential at the terminal 2 goes to H level when the SW5 is turned on to the position of contact A or contact B, and goes to L level when the SW5 is turned on to the position of contact C. After a t2 period, the potential at the terminal 2 goes to H level with the SW5 turned on to the contact B and goes to L level with the SW5 turned on to the contact B.

Description

[Detailed Description of the Invention] (a) Industrial Application Field The present invention relates to a three-value input method for input/output terminals of electronic circuits, and in particular, a three-value input method for input/output terminals in LSIs, microcomputers, etc. Regarding.

(B) Prior art In general, the input terminals of electronic circuits such as LSIs and microcomputers can only determine whether the applied signal is at the "H" level or the "L" level. In addition to the ``H° level and L'' level, three values of the 9-level level ``M'' can be detected using one input terminal.

A three-value detection circuit is used. This three-value detection circuit is provided with two inverters having different threshold voltages, and detects three values by combining the outputs of these inverters. That is, if the threshold voltage of one inverter is Vt0 and the threshold voltage of the other inverter is Vt, and vt<vt, then the signal level ■irL applied to the input terminal is V*rL') V
If t2 > V t+, the inverter outputs are both K”
It is detected that the signal level is NHI'. Also, the signal level virL becomes vtrL(
The outputs of V it (Vt2) are both at H'' level, and it is detected that the signal level is II L 11, and furthermore, the signal level Vin is V't, <
If Virb (Vt), then the signal level is °°M”
The level is detected.

However, in order to form integrated circuits with different threshold voltages within the same semiconductor integrated circuit, it is necessary to change the size and threshold voltage of the MOS transistors that make up the inverter, which requires changes in pattern design or manufacturing process. The disadvantage was that it was complicated. Furthermore, with the method of using inverters with different threshold voltages, it was not possible to detect when the input terminals were in an oven condition.

(C) Purpose of the Invention The present invention has been made in view of the above-mentioned points, and utilizes the input/output terminals of a microcomputer, etc. to It provides a way to input values.

B) Structure of the Invention The present invention connects a resistor and a capacitor in parallel between an input/output terminal of an electronic circuit and a predetermined potential, outputs a signal of a predetermined level to the input/output terminal, and then adjusts the voltage of the input/output terminal. The level is input and determined at least twice at predetermined intervals, and based on the determination result, the state of the means connected to the input/output terminal that can assume three states is determined and input.

(E) Embodiment FIG. 1 is a circuit diagram showing an embodiment of the present invention, and (1) shows an electronic circuit such as an LSI or a microcomputer;
2) is one of the multiple input/output terminals provided in the electronic circuit.
It is l. The input/output terminal (2) is connected to the drain of a P-channel type MO8) transistor (3) for outputting a signal, and the signal applied from the outside to the input/output terminal (2) is input internally. The input of the inverter (4) is connected. The source of the MOS transistor (3) is connected to the power supply voltage 9D, and the gate is connected to the output of a circuit that stores the contents of the signal to be output.

Therefore, when the MOS transistor (3) is turned on, the input/output terminal (2) is pulled up to the power supply voltage ■, and becomes HHI.
Outputs I level. On the other hand, MOS) transistor (3
) is off, the input/output terminal (2) has a high impedance, and in this case, it outputs "L" level by pulling it down to the ground potential using a pull-down resistor or the like.

The inverter (4) has a threshold voltage Vt set to be 1/2 of the power supply voltage VflD, and when the MOS transistor (3) is in the off state,
Input/output terminal (2) #Inverts the signal applied from outside the IC and outputs it to the internal pass line, etc.

This embodiment uses an input/output terminal (2) to detect and input the state of a switch (5) having three contacts. For this purpose, a capacitor (6) and a resistor (7) are connected in parallel between the input/output terminal (2) and the ground, and a resistor (7) is connected between the input/output terminal (2) and the switch (5).
8) is connected. The contact of the switch (5) is connected to the power supply voltage VDD, the contact (B) is open, and the contact (q) is grounded.Here, the resistor (8) is a resistor (having a resistance value sufficiently smaller than the It has input/output terminals (2
) is used as protection. Therefore, the input/output terminal (
When the switch (5) is in the contact position, the potential of the resistor (81) is raised to the voltage VD, that is, 'H° level, and when the switch (B) is in the contact position, the potential of the resistor (B) is raised to (is pulled down to the ground voltage, i.e., ``LII level'' by the force, and is further pulled down to the 6L'' level by the resistor (7) and resistor (8) when it is at the contact (q. However, the contact [F]) and the contact ( In the case of C1, even at the same "L" level, the impedance between the input/output terminal (2) and the ground is significantly different.

Next, the operation for determining and inputting the state of the switch (5) will be explained with reference to the waveform diagram in FIG. In FIG. 2, the waveform indicated by (MOS) indicates the timing at which the MOS transistor (3) is turned on;
(The waveform indicated by Q is the contact point of switch (5), (B
), (Q). Before inputting the potential of the input/output terminal (2), first, the MO
S) Turn on the transistor (3) for a period of 10. As a result, no matter what state the switch (5) is in, a charging current flows to the capacitor (6) via the MOS transistor (3), and the potential at the input/output terminal (2) becomes H'' level. When the MOS transistor (3) is turned off and the switch (5) is in contact, the potential of the input/output terminal (2) remains raised to the H° level by the resistor (8). .

However, when the switch (5) is a contact (B), the discharge current flows from the capacitor (6) rather than the resistor (7) K, so the potential at the input/output terminal (2) is ).In addition, when the switch (5) is a contact (Q), a discharge current flows from the capacitor (6) due to the resistance (force and resistance (8)), but in this case, Since the time constant is much smaller than in the case of contact (B), the potential of the input/output terminal (2) drops rapidly.Therefore, after a period of t3 after the MOS transistor (3) turns off, Then, 13 hours later, the potential of the input/output terminal (2) is taken inside via the inverter (4) and a determination is made.In other words, at the time of determination after the t1 period, the switch (5) is connected to the contact diagram or contact (B). In this case, the potential of the input/output terminal (2) is higher than the threshold voltage vt* of the inverter (4), so the potential of the input/output terminal (2) is On the other hand, if the switch (5) is a contact (Q), the potential of the input/output terminal (2) is lower than the threshold voltage Vr of the inverter (4), so the inverter ( 4), it is determined that the potential of the input/output terminal (2) is at the L level.

Therefore, the result of the judgment is l? If the level is I or 11, it is recognized that the switch (5) is a contact (Q), and “
If the level is “H”, it is recognized that the switch (5) is a contact diagram or contact (B). Therefore, II HI
If the I level is determined, 1. Make a judgment after the period. At this time, if the switch (5) is a contact diagram, the potential of the input/output terminal (2) remains raised to the power supply voltage Vt1l, so the result of the determination is "H" level, and the contact (4) Something is recognized, while
If it is contact (B), the capacitor (6) is discharging, so the potential of the input/output terminal (2) is the same as that of the inverter (4).
Since it is below the threshold voltage Vt of
The result of the determination is the °′L” level, and it is recognized that it is a contact point (8).

In this way, by utilizing the fact that the voltage change after outputting the Hn level to the input/output terminal (2) differs depending on the state of the switch (5), the potential of the input/output terminal (2) is changed twice at different timings. The state of the switch (5) is determined by inputting and determining.

FIG. 3 is a flow diagram showing the operation for determining the state of the switch (5) when a microcomputer is used in the electronic circuit (1) shown in FIG.

In FIG. 3, the input/output terminal P is activated by an output command.

After outputting the NHII level in (2), a timer or the like waits until t0 has elapsed. When t0 elapses, the command to output L" level to the input/output terminal P (2) is executed.
The input/output terminal Ps(2) is placed in the oven state.

This causes the MOS transistor (3) to reach t, as shown in FIG. It will be on for a period of time. Next, 1. Create a period, 1. When the period has elapsed, input is made to the input/output terminal P, (2), and a determination command is used to determine whether or not the level is Hn. If it is not at the "H" level, the switch (5) recognizes it as a contact (Q) because it is below the threshold voltage ■t* of the inverter C4).
” level, a t7 period is created again using a timer, etc., and when the t2 period has elapsed, the input/output terminal PI (2
1 is input again and it is determined whether it is at the "H" level.

At this time, if the level is not high, it is recognized that the switch (5) is a contact (B), and if the level is high, it is recognized that the switch (5) is a contact. In order to more accurately determine the state of the switch (5), the above-described operation may be repeated two or more times, and the final determination may be made based on the results.

FIG. 4 is a circuit diagram showing another embodiment of the present invention, in which the input/output terminal 0 of the electronic circuit (9) is connected to the drain of a transistor 0υ (an N-channel MOS whose source is grounded). , and the inverter 030 input is also connected.

In the case of this embodiment, the input/output terminal 00 and the power supply voltage vD
A capacitor (131) and a resistor I are connected in parallel between I and I, and the contact diagram of the switch αe, which is connected to the input/output terminal 01 via a resistor (+51), is grounded and connected to the contact (Q is the power supply voltage Vt1I). That is, in this embodiment, the relationship between the power supply voltage VllD and the ground is completely opposite to that of the embodiment shown in FIG. The waveform diagram is reversed, and the levels determined in the t1 period and t7 period are also reversed.

Note that the switch (5) (lf9) used in the embodiments of FIGS. 1 and 4 is not limited to a three-contact changeover switch, but may be two push switches connected in series.

A switch may be used in which the connection point serves as a switch output.

(F) Effects of the Invention As described above, according to the present invention, it is possible to detect and input three states with a single input/output terminal without using a large number of terminals, and the number of terminals that can be used is reduced. This is very effective when there is a limit to the number of switches, and the effect is particularly great when a large number of 3-contact switches are used.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is a waveform diagram showing the operation, Fig. 3 is a flow diagram showing the operation, and Fig. 4 is a circuit diagram showing another embodiment of the invention. be. Explanation of main drawing numbers (1)...electronic circuit, (2)...input/output terminal,
(3)...MOS transistor, (4)...Inverter, (5)...Switch, (6)...Capacitor, (7) (Resistor).Applicant Sanyo Electric Co., Ltd. 1 Renowned Patent Attorney Shizuka Sano Mistake 1 Figure 12 Figure 3

Claims (1)

[Claims] 1. After connecting a resistor and a capacitor in parallel between an input/output terminal of an electronic circuit and a predetermined potential, and outputting a signal at a predetermined level to the input/output terminal, the voltage level of the input/output terminal is adjusted at least at a predetermined interval. A three-value input method for an electronic circuit, characterized in that the input is made twice and a decision is made, and based on the decision result, the state of a means connected to the input/output terminal that can take three states is determined and input. .