JPS6129292A - Multi-channel signal generator - Google Patents

Abstract

PURPOSE:To output simultaneously optional channel signals at an output terminal by coinciding oscillation frequencies of plural frequency control oscillators with a set target frequency. CONSTITUTION:An arithmetic means of a central processing unit 26 compares calculated values of an intermediate frequency fi in a counter 23 with a target value of said frequency in periods Ta, Tb and Tc, and supplies correction signals Sa, Sb and Sc for reducing errors due to the comparison to frequency setting devices 25a, 25b and 25c. Said devices control oscillation frequencies fa, fb and fc of respective frequency control oscillators 15a, 15b and 15c with the aid of an analog signal outputted from a D/A converter. In this case the signal Sa corrected in the period Ta is inputted to, for instance, the device 25a for controlling the oscillator 15a, while in other periods Tb and Tc the signal Sa is controlled in the latched state as it is.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a multi-channel signal generator,
In particular, the present invention relates to a multi-channel signal generator suitable for adjusting or measuring reception characteristics of a receiver.

[Background technology and its problems]

FIG. 1 is a block diagram showing an example of a conventional multi-channel signal generator, in which 1 is a composite TV signal source that generates video signals and audio signals using standard TVI signals, for example, NTSC system and PAL system. , including standard test patterns and color pattern signals. 2 is the composite TV
This is a voltage controlled oscillator (VCO) whose frequency is variable by the signal source IVc, and this voltage controlled oscillator (VCO) 2
A frequency control circuit 3 is provided in order to keep the average value of the output frequency constant. 4 is a crystal oscillation element X1l
Xs - The selected filter 7 is a second frequency mixer, which together with an oscillator 8 that forms a carrier wave and a frequency selection filter 8 constitutes a frequency conversion circuit.

This conventional multi-channel signal generator is configured as described above, so that, for example, a Humbater adjustment channel signal (for example, a standard pattern) for receiving TV radio waves from a satellite is specified by the first frequency mixer 5. The second frequency mixer 7 converts the broadcasting satellite's transmission frequency band (12GH,
) K-transformed.

Therefore, according to the channel of the receiver (comparator) to be adjusted or measured, the crystal oscillation element X1+,
When selecting Xm*

However, such a multi-channel signal generating device has the disadvantage that when generating a multi-channel signal in accordance with a characteristic test for each channel of a receiver, channel switching is required, which complicates measurement work.

In addition, as a receiver measurement or adjustment method, the separation characteristics of adjacent channels or the S/N ratio characteristics when the channel frequency is slightly shifted may be investigated, but such tests are performed only on the output channel. However, there is a problem in that the conventional multi-channel signal generator, which selects the l-channel signal defined by a crystal oscillation element, cannot do this.

[Purpose of the invention]

This invention was not made in view of such actual situation.
Can output multiple arbitrary channel signals to the output terminal
The purpose of this invention is to provide a multi-channel signal generator capable of simultaneous Kjtl output.
f, - thing.

〔Example〕

Hereinafter, an embodiment of the multi-channel signal generating device of the present invention will be described in the case of outputting a TV modulated wave.

In Figure 2, common symbols excluding subscripts (a, b, c) indicate circuit bootsques having the same functions, and this circuit example is a block diagram in which signals for three channels are formed. .

In this figure, 11 (lL# bl c ) is
12 (a, boa) is a voltage controlled oscillator whose frequency is modulated by the composite TV multiplied signal; 13 is the voltage-controlled oscillator 12 ( a, b, c) is provided so that the average frequency of There is.

The output of this modulated wave circuit 1G (a, b, c) is inputted to a mixer 14 (albtc), and a frequency controlled oscillator 15 whose oscillation frequency is controlled by a central processing circuit (to be described later). (a, b, o) (for example, mixed with the output of an oscillator whose frequency can be controlled by voltage, in this example a microwave oscillator).

The mixing frequency of the mixer 14 (a', b@c) is
As will be described later, the signal is controlled to match the receiving channel frequency of the receiver to be measured, and is output from the synthesizer 16° and the Pandopa filter 17 within a predetermined frequency band.

Next, the frequency control oscillator 1s (albtc)
The control circuit will be explained.

21 is a reference oscillator whose frequency changes under the control of a central processing circuit (CPU) 26; 22 is a harmonic mixer for forming an intermediate frequency band; 23 is a quantator for measuring the output frequency 7 of the harmonic mixer 22; 24 is a switch 25 which sequentially takes in the oscillation output of each frequency controlled oscillator 15a15L1'5'c or the output of the mixer 14 (albtc) in a time division manner and supplies it to the harmonic mixer 22;
(albtc) is the frequency controlled oscillator 15 (albtc).
A frequency setting device (a digital-to-analog converter with a signal holding function) that controls the oscillation frequency of the central processing circuit 26.
Z shows that

27 is a target value setting circuit for setting the target frequency of each channel; 28 is the switch 24 and the frequency setting device 25;
(alb+c) 1-division control means for sending out K time-division signals; 2g is a calculating means for calculating and correcting based on the target value of the target value setting circuit 27, the measured value of the counter, and the output value of the reference oscillator 21; and these calculation means 29
The time division control means 28 is constituted by a central processing circuit 26't'.

Next, the operation of this circuit block will be explained based on the waveform diagram of FIG.

Each modulated wave circuit 10a+10b is surrounded by a dashed line.

10c frequency-modulates the TV signal (sometimes the audio signal is converted into PCM) to form a kFM TV signal as in the conventional case, and supplies the signal to each mixer 14a, 14b, and 14cK. .

Now, the oscillation frequencies of each frequency controlled oscillator I Sag 15L 15c are f, , fb, f, , FM-
When the frequency of the TV signal is fTV, each mixer 1
4a.

The mixed frequency of 14b and 14c is If, ±fTvl11f
, ±fry l, If, ±trvl n
Ru.

Therefore, f, -fb=Δf a rb-t, ==
The oscillation frequency (f,, fb, f
, ) is set by the target value setting circuit 27, each modulation wave circuit 10 a + 10 b , 10
The frequency of the FM-TV signal is If
The signal is inputted to the synthesizer 16 at a channel interval of , and is outputted as a multi-channel signal to the output terminal 18 via the bandpass filter 7.

In the case of , :, the channel becomes an adjacent multi-channel signal, but depending on the settings of f, , fb, f, each modulating wave circuit 10a, 10b is connected to an arbitrary channel.
.

It can output a 10cFJFM-TV signal.

On the other hand, the frequency controlled oscillator 15 (a, b, c)
Oscillation output of $ @lls eb* @@ is switch 2
5 KTm * Tb as shown in Figure 3 through 41L'
* During the period Te, the signals are sequentially taken into the harmonic mixer 22 by switch control of the time division control means 28 of the central processing circuit 26.

Also, during this period Tar 'rb a T@K, the reference oscillator 21 uses different reference frequencies fra #L, b as shown in FIG. 3 based on the control of the time division control means 28 of the central processing circuit 26. The switch 24 transmits the a fra signal to the frequency controlled oscillator 15 (a.

Oscillation output of b, c) eB r @b + ea '
The signals are output to the harmonic mixer 22 in synchronization with the capture of each signal.

The harmonic mixer 22 is, for example, a reference frequency (f, . . . ).

Lb * fre) times n (n = 1 a 2 a
3","...) and the oscillation frequency (L*fb+) of the frequency controlled oscillator 15 (aybac).
The configuration is such that intermediate frequencies f and Y, which are the difference between the two frequencies f and Y, are generated.

Therefore, each reference frequency (fra+frb #
When f□n is set to a predetermined value, 1g −n frll = fIIn 'rb = f,
= n frb = f I This means that a constant intermediate frequency is output.

This intermediate frequency f is measured at the counter 23, inputted to the central processing circuit 26, and stored.

The calculation means 28 of the central processing circuit 26 each have an nTag
Within the period Tb + T@, the count value at the counter 23 of the intermediate frequency ft is changed from the target value of the intermediate frequency [from the target value of the oscillation frequency to the frequency n times each reference frequency (n f, as
nfrb t n f,, ) w son each subtraction t=
(Correction signal Sa 18b a S@'1 frequency setting device 25a that reduces the error by comparing each with tD.

25 b, 25 a KJcn each donated.

For example, if the target value of f is 1000 MHz, the output signal n f of the reference oscillator 21, (n = L L 3 ·
) is 990MHz, the measured value of the counter 23 is 9M
If H, the calculating means 29 calculates a correction signal 81 of 100x1'' from 990±9 and the target value 1000, and outputs it as a digital signal.

Further, if the measured value of Kawanta 23 is 11 MHz, the calculation means 29 calculates 990 MHz + l I MH
The frequency setting device 25aK outputs a 100OX signal from the target values of 1000 MHz for z and f.

Similarly, for the correction signal Sb+S'aK, n calculations are performed on each of the measured values t and K of the counter 23, and the results are output to the respective frequency setting devices 25b*25(!).

And each frequency setting device 25 m + 25 b + 25 c
Each frequency controlled oscillator 15a is controlled by an analog signal output from a digital-to-analog converter.

The oscillation frequencies t(a+b+c) of 15b and 15c are controlled respectively.

In this case, for example, the frequency setting device 25aK controlling the frequency controlled oscillator 15a receives the corrected signal S during a period T, and receives the corrected signal S during another period Tb.

At To, the signal S is controlled so that the frequency setting device 25aK remains launched.

and each frequency controlled oscillator 15 am tsb1
15a receives a control signal from the time-sharing control means 28 of the central processing circuit 26 during the period T, , 'rb, T, and maintains the oscillation frequency based on the control signal during other periods. It is divided and controlled.

Nao, frequency setting device 25 a r 25 b * 2
5c may be provided with calculation means for calculating a correction signal for reducing frequency errors, and may calculate the correction signal in response to the measured value of the counter 23 and the output χ of the target value setting circuit 21. .

In this case, the central processing circuit 26 reads the measured value of the counter 23 and sends the selected frequency setting device 25m, 25b, 25aVC in a time-sharing manner.

The frequency setting devices 25a, 25b, and 25c each receive the transmitted measurement value and target value, perform calculations in the same manner as in the above case, and generate a correction signal Saw SbsS.

t to respective digital-to-analog converters;
.

And each frequency setting device 25 a, 25
b.

10. From the output signal of the 25c digital-to-analog converter. □Eh wit 5 a,? '5b, 15°
□゛ is controlled and corrected to reach the target frequency.

Although the above embodiment has described a signal generator for three channels, it is possible to increase the number of channel signals Z to be output simultaneously by increasing the number of subscripted block circuits.

In the embodiment of the present invention, the intermediate frequency flV counter 23 is used for measurement, so the signal to be controlled that is taken in by the switch 24 is the output of the mixer 14 (a, b, c) at 5 as shown by the dotted line. , may be done.

In this case, the frequency modulated frequency (f (atb, c
)±f7v) is input, or if measured by the counter 23, the average value of the modulation frequency is output, so unless the time division period MT (a # b # e) is extremely short (unless This should not be a problem.

Note that the modulated wave circuit 10. (amble) is not limited to the TV modulation signal (it may also be one in which other modulation wave signals are input).

Furthermore, it is also possible to have a configuration in which the counter 23 directly counts the output signal of the switch 24.

FIG. 4 shows a flowchart for setting the channel frequency in the central processing circuit 26 based on the setting of the target value setting circuit 21, and adjusting and holding the frequency controlled oscillator 1.5 (atb, e) Y to the set frequency. When the channel frequency consisting of s an bse is read in the central processing circuit 26, first the reference frequency ' of the reference oscillator 21 corresponding to the channel frequency is read.
frm + frb * fy. ) or set.

Next, the D/A value of channel a is output, and the oscillation frequency f- of the frequency control oscillator 151L is measured by measuring the intermediate frequency f, and the difference signal or The corrected signal is output to the YD/A converter.

In this way, the frequency control oscillator 15(a+b+C)Y time-division feedback control is performed via the counter 23Y to bring the frequency closer to the target value.

Hereinafter, the DZA value (target value 1' is set) at which the oscillation frequency fb+f@ becomes a predetermined value for the b channel and the C channel as well.
, and controls the 5IC frequency control oscillator 11 (a, b, c) as described above.

〔Effect of the invention〕

As explained above, the multi-channel signal generator of the present invention arbitrarily sets a plurality of channel frequencies by a central processing circuit, and outputs a count value measured by a high-precision counter so that the set frequency is maintained. is controlled in a time-sharing manner.

Moreover, there is the advantage that a plurality of channel signals are simultaneously regulated at a predetermined channel spacing by a common reference oscillator.

In addition, since the channel frequency is detected in a time-division manner by a common and identical circuit, and the correction value is supplied to each frequency control oscillator, the circuit is simplified and the channel frequency is simplified. It also has the advantage of having small relative frequency fluctuations.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional multi-channel signal generator, FIG. 2 is a block diagram of a multi-channel signal generator according to an embodiment of the present invention, and FIG. 3 is a waveform diagram for explaining the operation. Figure 4 is a 72m chart of the central processing port. In the figure, 10 is a modulation wave circuit, 14 (a, b, c) is a mixer, 15 (a + bsC) is a frequency control oscillator, 16 is a synthesizer, 21 is a reference oscillator, 22 is a harmonic mixer, 23
24 is a switch, 25 (alb+c) is a frequency setting device, 26 is a central processing circuit, 21 is a target value setting circuit, 2B is a time division control means, and 29 is a calculation means. Figure 3 Sc Figure 4

Claims (1)

[Claims] In a multi-channel signal generator that collectively outputs the outputs of a plurality of frequency controlled oscillators: a switch that sequentially selects and outputs the outputs of the plurality of frequency controlled oscillators; and the frequency controlled oscillator selected by the switch. a counter that measures the output of the frequency-controlled oscillator; a target value setting circuit that sets a target frequency of each of the frequency-controlled oscillators; and a comparison between the set target frequency and the measured value of the counter;
a calculation means for calculating a correction signal such that the output of the selected frequency control oscillator approaches the respective target frequency; provided for each of the plurality of frequency control oscillators, the frequency of which is set by the correction signal; a frequency setting device that controls the frequency controlled oscillator to achieve a target value; and a time-sharing control device that controls the switch, the calculation means, and the frequency setting device in a time-sharing manner at a predetermined timing, and controls the plurality of frequencies. A multi-channel signal generator characterized in that the oscillation frequency of an oscillator matches a set target frequency.