JPS61256769A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS61256769A
JPS61256769A JP9902485A JP9902485A JPS61256769A JP S61256769 A JPS61256769 A JP S61256769A JP 9902485 A JP9902485 A JP 9902485A JP 9902485 A JP9902485 A JP 9902485A JP S61256769 A JPS61256769 A JP S61256769A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
film
type
gate
oxide
formed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9902485A
Inventor
Shoichi Kagami
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Abstract

PURPOSE: To improve gain and to suppress punch through, by providing an N+ type layer in the direction of the width of a channel between N-type source and drain on the surface of a P-type substrate, and providing a gate oxide film and a gate electrode on the substrate.
CONSTITUTION: The surface of a P-type Si substrate 21 is surrounded by a field oxide film 22. An Si3N4 film 24 and a poly Si film 25 are formed on a thin oxide film 23. After a hole is selectively provided, the entire poly Si film 25 is oxidized, and an SiO2 film 26 is formed. P ions are implanted, and N+ 27 is provided in parallel with the width direction of a channel in close contact with the gate oxide film 23. The films 26, 24 and 23 are removed, and a gate electrode 29 is formed on a new gate oxide film 28. With the electrode 29 as a mask, N+ type source and drain layers 30 and 31 are formed. A hole 33 is provided in an interlayer insulating film 32, and an Al wiring 34 is attached. In this constitution, the gain can be improved by the formation of the N+ layer 27 and the punch through can be suppressed. Thus, the highly reliable device is obtained.
COPYRIGHT: (C)1986,JPO&Japio
JP9902485A 1985-05-10 1985-05-10 Semiconductor device Pending JPS61256769A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9902485A JPS61256769A (en) 1985-05-10 1985-05-10 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9902485A JPS61256769A (en) 1985-05-10 1985-05-10 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS61256769A true true JPS61256769A (en) 1986-11-14

Family

ID=14235670

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9902485A Pending JPS61256769A (en) 1985-05-10 1985-05-10 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS61256769A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06204469A (en) * 1991-05-15 1994-07-22 Gold Star Electron Co Ltd Field-effect transistor and manufacture thereof
US6111296A (en) * 1996-08-13 2000-08-29 Semiconductor Energy Laboratory Co., Ltd. MOSFET with plural channels for punch through and threshold voltage control
US6218714B1 (en) * 1996-08-13 2001-04-17 Semiconductor Energy Laboratory Co., Ltd. Insulated gate semiconductor device and method of manufacturing the same
US6246093B1 (en) * 1996-09-25 2001-06-12 Lsi Logic Corporation Hybrid surface/buried-channel MOSFET
US6590230B1 (en) 1996-10-15 2003-07-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US6653687B1 (en) 1996-08-13 2003-11-25 Semiconductor Energy Laboratory Co., Ltd. Insulated gate semiconductor device
KR100713905B1 (en) 2001-06-29 2007-05-07 주식회사 하이닉스반도체 Method for fabricating semiconductor device
US7339235B1 (en) 1996-09-18 2008-03-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having SOI structure and manufacturing method thereof

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06204469A (en) * 1991-05-15 1994-07-22 Gold Star Electron Co Ltd Field-effect transistor and manufacture thereof
US6111296A (en) * 1996-08-13 2000-08-29 Semiconductor Energy Laboratory Co., Ltd. MOSFET with plural channels for punch through and threshold voltage control
US6218714B1 (en) * 1996-08-13 2001-04-17 Semiconductor Energy Laboratory Co., Ltd. Insulated gate semiconductor device and method of manufacturing the same
US6617647B2 (en) * 1996-08-13 2003-09-09 Semiconductor Energy Laboratory Co., Ltd. Insulated gate semiconductor device and method of manufacturing the same
US6653687B1 (en) 1996-08-13 2003-11-25 Semiconductor Energy Laboratory Co., Ltd. Insulated gate semiconductor device
US7339235B1 (en) 1996-09-18 2008-03-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having SOI structure and manufacturing method thereof
US6246093B1 (en) * 1996-09-25 2001-06-12 Lsi Logic Corporation Hybrid surface/buried-channel MOSFET
US6590230B1 (en) 1996-10-15 2003-07-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
KR100713905B1 (en) 2001-06-29 2007-05-07 주식회사 하이닉스반도체 Method for fabricating semiconductor device

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