JPS6122342U - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS6122342U
JPS6122342U JP1984106293U JP10629384U JPS6122342U JP S6122342 U JPS6122342 U JP S6122342U JP 1984106293 U JP1984106293 U JP 1984106293U JP 10629384 U JP10629384 U JP 10629384U JP S6122342 U JPS6122342 U JP S6122342U
Authority
JP
Japan
Prior art keywords
semiconductor equipment
chip
semiconductor
chip mounting
fixed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984106293U
Other languages
Japanese (ja)
Inventor
進 畔柳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Priority to JP1984106293U priority Critical patent/JPS6122342U/en
Publication of JPS6122342U publication Critical patent/JPS6122342U/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】 第1図とリードフレームに半導体チップが実装された状
態を示す断面図、第2図a, bは、本考案の一実施例
に用いるリードフレーム平面図と断面図である。 1・・・・・・リードフレーム本体、11・・・・・・
外部引出し用のリード、12・・・・・・チップ搭載部
、13・・・・・・凹部、14・・・・・・半導体チッ
プ、15・・・・・・樹脂。
[Brief Description of the Drawings] Figure 1 and a cross-sectional view showing a state in which a semiconductor chip is mounted on a lead frame, and Figures 2 a and b are a plan view and a cross-sectional view of a lead frame used in an embodiment of the present invention. be. 1... Lead frame body, 11...
Lead for external drawer, 12... Chip mounting portion, 13... Recessed portion, 14... Semiconductor chip, 15... Resin.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] リードフレームの一部をチップ搭載部に半導体チップが
固着され、少なくともこの半導体チップおよび前記チッ
プ搭載部に樹脂封止が施こされた半導体装置において、
前記チップ搭載部の一表面に凹部を有し、その凹部内に
前記半導体チップが固着されていることを特徴とする半
導体装置。
A semiconductor device in which a semiconductor chip is fixed to a chip mounting part through a part of a lead frame, and at least the semiconductor chip and the chip mounting part are sealed with resin,
A semiconductor device, wherein the chip mounting portion has a recessed portion on one surface, and the semiconductor chip is fixed within the recessed portion.
JP1984106293U 1984-07-12 1984-07-12 semiconductor equipment Pending JPS6122342U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984106293U JPS6122342U (en) 1984-07-12 1984-07-12 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984106293U JPS6122342U (en) 1984-07-12 1984-07-12 semiconductor equipment

Publications (1)

Publication Number Publication Date
JPS6122342U true JPS6122342U (en) 1986-02-08

Family

ID=30665586

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984106293U Pending JPS6122342U (en) 1984-07-12 1984-07-12 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS6122342U (en)

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