JPS61210636A - Manufacture of ultra-fine pipe - Google Patents

Manufacture of ultra-fine pipe

Info

Publication number
JPS61210636A
JPS61210636A JP60052079A JP5207985A JPS61210636A JP S61210636 A JPS61210636 A JP S61210636A JP 60052079 A JP60052079 A JP 60052079A JP 5207985 A JP5207985 A JP 5207985A JP S61210636 A JPS61210636 A JP S61210636A
Authority
JP
Japan
Prior art keywords
film
fine
resist
conductive film
resist pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60052079A
Other languages
Japanese (ja)
Other versions
JPH0821567B2 (en
Inventor
Yoshio Koshikawa
越川 誉生
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP60052079A priority Critical patent/JPH0821567B2/en
Publication of JPS61210636A publication Critical patent/JPS61210636A/en
Publication of JPH0821567B2 publication Critical patent/JPH0821567B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Abstract

PURPOSE:To uniformize the cross-sectional shape of the fine hole in the longitudinal direction by forming a plating layer so as to cover the fine filament portion from above the conductive film which is exposed from a trench-shaped resist pattern, and removing the trench-shaped resist pattern. CONSTITUTION:By selectively exposing and developing the positive-type resist film 33 which is applied on the conductive film 32 formed on the surface of a substrate 31, a trench-shaped resist pattern film 34 is formed which contains a fine filament portion 34a in which the film thickness of the layer 33 is thin, and thereafter a metal layer 35 is plated and formed by means of the plating method so as to cover the filament portion 34a from above the conductive film 32 which is exposed from the film 34. Then, the film 34 including the filament portion 34a is removed, thereby obtaining an ultra-fine pipe 37 having a fine hole 36 formed in the portion from which the filament portion 34a was removed. This allows the cross-sectional shape of the fine hole 36 to be uniform in the longitudinal direction, and also allows various hole shapes.

Description

【発明の詳細な説明】 〔概 要〕 本発明はマイクロノズルなどに適用される超微細管の製
造方法において、基板上にメッキ川下地導電膜と共に形
成されたレジスト膜を、選択的に露光・現像して内部に
微細線条部分を有する溝状レジストパターンを形成し、
該溝状レジストパターンにより露出した導電膜上から前
記微細線条部分を覆う形にメッキ層を形成した後、前記
微細線条部分を含む溝状レジストパターンを除去する方
法により、微細穴の断面形状が種々に変珍されると共に
、その□長さ方向に一定とすることができ、更に折曲形
状、又は湾曲形状の超微細管を容易に製造するようにし
たことである。
[Detailed Description of the Invention] [Summary] The present invention is a method for manufacturing ultrafine tubes applied to micro nozzles, etc., in which a resist film formed on a substrate together with a conductive film under plating is selectively exposed to light. Developed to form a groove-like resist pattern with fine linear portions inside,
A plating layer is formed on the conductive film exposed by the groove-like resist pattern to cover the fine line portion, and then the groove-like resist pattern including the fine line portion is removed, thereby forming a cross-sectional shape of the fine hole. can be modified in various ways, can be made constant in the length direction, and can be easily manufactured into bent or curved ultrafine tubes.

〔産業上の利用分野〕[Industrial application field]

本発明は半導体集積回路素子、超小型の分析機器、或い
は各種気体や液状微粒子等を噴射させるマイクロノズル
管等の分野に利用可能な超微細管の製造方法に係り、特
に超微細管の微細穴の断面形状を一定にすることが出来
、更に折曲形状、又は湾曲形状の超微細管を容易に製造
することが可能な方法に関するものである。
The present invention relates to a method for manufacturing an ultra-fine tube that can be used in the fields of semiconductor integrated circuit elements, ultra-small analytical instruments, and micro nozzle tubes for injecting various gases, liquid particles, etc. The present invention relates to a method in which the cross-sectional shape of the tube can be made constant, and furthermore, it is possible to easily manufacture a bent or curved ultrafine tube.

近来、半導体集積回路素子の製造における微細加工技術
の急速な進歩に伴って、レジスト膜を始めとし、各種薄
膜等のパターン加工においては1μmから更に微細なサ
ブミクロン領域のパターン加工グが可能となり、このよ
うな加工技術を駆使して例えば半導体集積回路、小型液
体クロマトグラフ、ガスクロマトグラフ、或いは各種液
状微粒子を噴射させるマイクロノズル等の分野に利用を
可能とする超微細管及びその製造方法が特開昭59−5
6729によって既に提案されている。
In recent years, with the rapid progress of microfabrication technology in the manufacture of semiconductor integrated circuit elements, it has become possible to process patterns in the submicron range from 1 μm to even finer areas in patterning resist films and various other thin films. An ultrafine tube and its manufacturing method that can be used in fields such as semiconductor integrated circuits, small liquid chromatographs, gas chromatographs, or micro nozzles for ejecting various liquid particles by making full use of such processing technology has been disclosed in Japanese Patent Publication. Showa 59-5
6729 has already been proposed.

かかる超微細管の製造方法にあっては、微細穴の断面形
状を一定にすることや、必要に応して該超微細管を折曲
げ形状、或いは湾曲形状とすることが容易でなく、該微
細穴の断面形状が一定となり、然も上記変形形状の超微
細管も容易に得られる製造方法が要望されている。
In such a method of manufacturing an ultrafine tube, it is difficult to make the cross-sectional shape of the microhole constant, or to bend or curve the ultrafine tube as necessary. There is a need for a manufacturing method in which the cross-sectional shape of the microholes is constant, and in which ultrafine tubes having the above-mentioned deformed shapes can be easily obtained.

〔従来の技術〕[Conventional technology]

上記従来の超微細管の製造方法としては、例えば第4図
(alに示すように、基板1上にポジ型の第1レジスト
層2を設け、その第1レジスト層2上に該第1レジスト
層2よりも露光感度の低い第2レジスト層3を設ける。
As shown in FIG. 4 (al), for example, a positive type first resist layer 2 is provided on the substrate 1, and the first resist A second resist layer 3 having lower exposure sensitivity than layer 2 is provided.

次に前記第1.第2レジスト層2,3に対して2本の平
行な線を残すように露光を行い現像することにより、第
4図(blに示すように露光感度の高い第1レジスト層
2に形成された薄い脚部6と、その上部に露光感度の低
い第2レジスト層3に形成された厚い頭部7とが一体と
なった、2つの平行なレジスト部材4.5が得られる。
Next, the first. By exposing and developing the second resist layers 2 and 3 so as to leave two parallel lines, the first resist layer 2 with high exposure sensitivity is formed as shown in Figure 4 (bl). Two parallel resist members 4.5 are obtained in which a thin leg portion 6 and a thick head portion 7 formed in the second resist layer 3 with low exposure sensitivity are integrated on top of the thin leg portion 6.

これら両レジスト部材4.5を、第4図fclに示すよ
うにそれぞれ内側に撓めて相互の頭部7同士を接着する
方法により、トンネル状の微細穴8が形成されたレジス
ト部材からなる超微細管9が得られる。
As shown in FIG. 4fcl, both of these resist members 4.5 are bent inward and their mutual heads 7 are bonded to each other. A microtube 9 is obtained.

又、第5図falに示すように、前記第4図filで説
明したレジスト部材からなる超微細管9上に金属層、誘
電体層等の薄膜層11を被着し、第5図fblに示すよ
うにそのレジスト部材からなる超微細管9を有機溶剤等
により溶解除去することによって、金属層、或いは誘電
体層等からなる超微細管1oを形成する方法が知られて
いる。
Further, as shown in FIG. 5 fal, a thin film layer 11 such as a metal layer or a dielectric layer is deposited on the ultrafine tube 9 made of the resist member described in FIG. 4 fil, and as shown in FIG. 5 fbl. As shown, a method is known in which an ultrafine tube 9 made of a resist member is dissolved and removed using an organic solvent or the like to form an ultrafine tube 1o made of a metal layer, a dielectric layer, or the like.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

ところで上記のような従来の超微細管の製造方法では、
2本の平行なレジスト部材4,5を、第4図(C)に示
すようにそれぞれ内側に撓めて相互の頭部7同士を接着
した際に、トンネル状に形成される微細穴8の断面形状
を、その長さ方向に一定にすることは容易で無く、熟練
を要するばかりでなく、例えば折曲げ形状、或いは湾曲
形状の微細穴を有する超微細管を形成することが困難な
る問題がある。
By the way, in the conventional manufacturing method of ultrafine tubes as described above,
When two parallel resist members 4 and 5 are bent inward and their respective heads 7 are bonded to each other as shown in FIG. 4(C), a tunnel-shaped fine hole 8 is formed. It is not easy to make the cross-sectional shape constant in the length direction, and not only does it require skill, but it also poses the problem that, for example, it is difficult to form an ultrafine tube with bent or curved micropores. be.

本発明は以上のような問題点に鑑みてなされたもので、
その目的とするところは、微細穴の断面形状がその長さ
方向に一定とすることができ、更には折曲げ形状、或い
は湾曲形状の微細穴を有する超微細管を容易に形成する
ことができる製造方法を提供することである。
The present invention was made in view of the above problems.
The purpose is to make the cross-sectional shape of the microholes constant in the length direction, and to easily form ultrafine tubes with bent or curved microholes. An object of the present invention is to provide a manufacturing method.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、第1図(C1に示すように基板21上に形成
された導電膜22の、レジストマスクパターン膜23に
より露出した部分に、メッキ層を縫着形成する、所謂マ
スクメッキ法においては、該メッキ層の縫着成長が概略
等方性であり、第1図(dlに示すように該メッキ層2
4を、レジストマスクパターン膜23の厚さよりも厚く
縫着させると、層厚方向のみならず、前記マスクパター
ン膜23上に沿った方向にも縫着成長することを利用し
て、第1図(alに示すように基板31表面に形成され
た導電膜32上にポジ型のレジスト膜33を塗着し、該
レジスト膜33を選択的に露光・現像して内部に該レジ
スト層33の膜厚が薄い微細線条部分34aを有する溝
状レジストパターン膜34を形成した後、該溝状レジス
トパターン膜34より露出した導電膜32上から前記微
細線条部分34aを覆う形に、メッキ法により金属層3
5を縫着形成する。
The present invention utilizes a so-called mask plating method in which a plating layer is sewn onto a portion of a conductive film 22 formed on a substrate 21 exposed by a resist mask pattern film 23 as shown in FIG. 1 (C1). , the sewing growth of the plating layer is approximately isotropic, and as shown in FIG. 1 (dl), the plating layer 2
4 is sewn to be thicker than the resist mask pattern film 23, it grows not only in the layer thickness direction but also in the direction along the mask pattern film 23. (As shown in al., a positive resist film 33 is applied on the conductive film 32 formed on the surface of the substrate 31, and the resist film 33 is selectively exposed and developed to form a film of the resist layer 33 inside. After forming the groove-like resist pattern film 34 having the thin fine line portions 34a, the conductive film 32 exposed from the groove-like resist pattern film 34 is coated by plating to cover the fine line portions 34a. metal layer 3
5 is sewn and formed.

しかる後、前記微細線条部分34aを含む溝状レジスト
パターン膜34を除去することにより、第1図(blに
示すように前記微細線条部分34aの除去部分に微細穴
36が形成された超微細管37を得ることが可能となる
Thereafter, by removing the groove-like resist pattern film 34 including the fine line portions 34a, a superstructure with fine holes 36 formed in the removed portions of the fine line portions 34a is formed, as shown in FIG. It becomes possible to obtain fine tubes 37.

〔作 用〕[For production]

このように本発明の方法は、微細穴36を形成する部分
をポジ型のレジスト膜により形成し、マスクメッキ法を
利用することにより、微細大36の断面形状がその長さ
方向に一定で、かつ種々の穴形状とすることが出来、更
に折曲げ形状、或いは湾曲形状の微細穴を有する超微細
管を容易に形成することが出来る。
In this way, the method of the present invention forms the portion where the microholes 36 are to be formed using a positive resist film, and by using the mask plating method, the cross-sectional shape of the microscopic holes 36 is constant in the length direction. In addition, various hole shapes can be formed, and ultrafine tubes having bent or curved fine holes can be easily formed.

〔実施例〕〔Example〕

以下図面を用いて本発明の実施例について詳細に説明す
る。
Embodiments of the present invention will be described in detail below with reference to the drawings.

第2図は本発明に係る超微細管の製造方法の第1実施例
を工程順に示す工程図であり、図中、fal〜fdlは
要部断面図、telは斜視図である。
FIG. 2 is a process diagram showing the first embodiment of the method for manufacturing an ultrafine tube according to the present invention in order of steps, and in the figure, fal to fdl are sectional views of essential parts, and tel is a perspective view.

先ず、第2図falに示すようにガラス、又はセラミッ
クス等からなる基板31上に、スパッタリング法などに
よりメッキ用下地導電膜32を被着形成し、その下地導
電膜32上に更にポジ型のレジスト膜33を塗着した後
、該レジスト膜33を、超微細管の両側壁形成用の第1
フオトマスク38を用いて一次露光を行う。
First, as shown in FIG. 2, a base conductive film 32 for plating is deposited on a substrate 31 made of glass or ceramics by sputtering or the like, and a positive resist is further deposited on the base conductive film 32. After coating the film 33, the resist film 33 is applied to the first resist film 33 for forming both side walls of the ultrafine tube.
Primary exposure is performed using a photomask 38.

次に第2図中)に示すように引続きそのレジスト膜33
を、部分的に露光光量を騒にして露光する同微細管の土
壁形成用の第2フオトマスク39を用いて部分的に、該
レジスト膜33の膜厚のz程度に二次露光を行い、更に
現像して第2図(C1に示すように内部に該レジスト層
33の膜厚が2程度薄い微細線条部分34aを有する溝
状レジストパターン膜34を形成する。
Next, as shown in FIG.
is partially exposed using a second photomask 39 for forming a soil wall of the same microtube, which is exposed with a higher exposure light amount, to a thickness of about z of the resist film 33; Further development is performed to form a groove-shaped resist pattern film 34 having inside the resist layer 33 fine linear portions 34a which are about 2 times thinner, as shown in FIG. 2 (C1).

次に第2図(dlに示すように前記溝状レジストパター
ン膜34より露出した下地導電膜32及び該下地導電膜
32上から前記微細線条部分34aを覆う形に電解メッ
キ法、または無電解メッキ法等により銅(Cu) 、鉄
(Fe) 、或いはニッケル(Ni)などからなるメッ
キ層35を破着形成する。
Next, as shown in FIG. 2 (dl), electrolytic plating or electroless plating is applied to cover the base conductive film 32 exposed from the groove-like resist pattern film 34 and the fine linear portion 34a from above the base conductive film 32. A plating layer 35 made of copper (Cu), iron (Fe), nickel (Ni), or the like is formed by plating using a plating method or the like.

しかる後、前記微細線条部分34aを含む溝状レジスト
パターン膜34を、レジスト熔解液などにより選択的に
除去することにより、第2図(elに示すように薄い微
細線条部分34aの断面形状によって規定され、かつそ
の長さ方向に一定な微細大36が形成された超微細管3
7が得られる。
Thereafter, the groove-like resist pattern film 34 including the fine line portions 34a is selectively removed using a resist solution or the like, so that the cross-sectional shape of the thin fine line portions 34a is changed as shown in FIG. An ultra-fine tube 3 defined by and having a constant fine size 36 in its length direction
7 is obtained.

尚、前記微細線条部分34aの溶解除去については、超
音波洗浄法を併用することにより効果的に除去が行われ
る。また超微細管37の周辺のメッキ用下地導電膜32
が不必要な場合には、イオンミリング法、スパックエツ
チング法などを通用することにより容易に除去すること
ができる。
Note that the fine filament portions 34a can be effectively dissolved and removed by using an ultrasonic cleaning method in combination. Also, the base conductive film 32 for plating around the ultra-fine tube 37
If it is unnecessary, it can be easily removed by using an ion milling method, a spack etching method, or the like.

第3図は本発明に係る超微細管の製造方法の第2実施例
を工程順に示す工程図であり、図中、fa)〜(C1は
要部断面図、(dlは斜視図である。
FIG. 3 is a process diagram showing the second embodiment of the method for manufacturing an ultrafine tube according to the present invention in the order of steps, and in the figure, fa) to (C1 are sectional views of main parts, and (dl is a perspective view).

本実施例では先ず、第3図falに示すようにスパッタ
リング法などによりメッキ用下地導電膜32が形成され
たガラス、又はセラミックス等からなる基板3Lトに、
ポジ型のレジスI・膜33を塗着した後、該レジスト膜
33に対する露光光量(透過光量)を部分的に、例えば
50%、70%及び30%と変化させて露光することを
可能とする所定のフォル1−マスク41を用いて該レジ
スト膜33を露光する。
In this embodiment, first, as shown in FIG. 3, a substrate 3L made of glass or ceramics, on which a base conductive film 32 for plating is formed by sputtering or the like, is coated.
After coating the positive resist I/film 33, it is possible to expose the resist film 33 by partially changing the amount of exposure light (transmitted light amount), for example, 50%, 70%, and 30%. The resist film 33 is exposed using a predetermined F1-mask 41.

次にそのレジス日臭33を現像して、第3図fb)に示
すように内部に該レジスト膜33の膜厚が異なる第1微
細線条部分42a、第2微細線条部分42b及び第3微
細線条部分42cを有する溝状レジストパターン膜42
を形成する。
Next, the resist film 33 is developed, and as shown in FIG. Grooved resist pattern film 42 having fine linear portions 42c
form.

次に第3図telに示すように前記溝状レジスl−パタ
ーン膜42より露出した下地導電膜32及び該下地導電
膜32上から前記各微細線条部分42a〜42cを覆う
形に、電解メッキ法、または無電解メッキ法等により銅
(Cu) 、鉄(Fe) 、或いはニッケル(Ni)な
どからなるメッキ層43を破着形成する。
Next, as shown in FIG. 3, electrolytic plating is applied to cover the base conductive film 32 exposed from the groove-like resist L-pattern film 42 and the fine linear portions 42a to 42c from above the base conductive film 32. A plating layer 43 made of copper (Cu), iron (Fe), nickel (Ni), or the like is formed by fracture bonding using a method such as a method or an electroless plating method.

しかる後、前記各微細線条部分42a〜42cを含む溝
状レジストパターン膜42をレジスト溶解液などにより
選択的に除去することにより、第3図(dlに示すよう
に前記各微細線条部分42a〜42cの断面形状によっ
てそれぞれ規定され、かつその長さ方向に一定な3種類
の穴形状の異なる微細穴44゜45及び46が形成され
た超微細管47が得られる。
Thereafter, by selectively removing the groove-like resist pattern film 42 including each of the fine linear portions 42a to 42c using a resist solution or the like, each of the fine linear portions 42a is removed as shown in FIG. 3 (dl). An ultra-fine tube 47 is obtained in which micro-holes 44, 45, and 46 are defined by the cross-sectional shapes of .

尚、本実施例ではレジストlI?i33を選択的に露光
するに通用するフォトマスクとして、露光の透過光量を
部分的に変化させたフォトマスク41を使用することに
より、露光工程が簡略化される。
In this example, the resist lI? The exposure process is simplified by using a photomask 41 in which the amount of transmitted light for exposure is partially changed as a photomask that can be used to selectively expose i33.

〔発明の効果〕〔Effect of the invention〕

以上の説明から明らかなように、本発明に係る超微細管
の製造方法によれば、微細穴の断面形状を種々変形する
ことができ、かつその長さ方向に一定とした超微細管を
容易に形成することが可能となる。更に折曲げ形状、或
いは湾曲形状の微細穴を有する超微細管や複数種の穴形
状の異なる微細穴を有する超微細管も容易に得ることが
できる優れた利点がある。
As is clear from the above explanation, according to the method for manufacturing an ultrafine tube according to the present invention, the cross-sectional shape of the microhole can be varied in various ways, and the ultrafine tube can be easily manufactured with the cross-sectional shape of the microhole constant in the length direction. It becomes possible to form Furthermore, there is an excellent advantage that ultrafine tubes having bent or curved microholes or ultrafine tubes having microholes with a plurality of different hole shapes can be easily obtained.

従って、半導体集積回路、超小型センサ、高集積化され
た小型液体クロマトグラフ、ガスクロマトグラフ、或い
は各種気体、液状微粒子等を噴射させるマイクロノズル
等の各種分野に用いられる超微細管の製造に適用して極
めて有利である。
Therefore, it can be applied to the manufacture of ultra-fine tubes used in various fields such as semiconductor integrated circuits, ultra-small sensors, highly integrated small-sized liquid chromatographs, gas chromatographs, and micro nozzles that spray various gases, liquid particles, etc. This is extremely advantageous.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る超微細管の製造方法の原理説明図
、 第2図は本発明に係る超微細管の製造方法の第1実施例
を′工程順に示す工程図であり、図中、(a)〜fd)
は要部断面図、te+は斜視図、 第3図は本発明に係る超微細管の製造方法の第2実施例
を工程順に示す工程図であり、図中、ta+〜fclは
要部断面図、fd)は斜視図、 第4図は従来の超微細管の製造方法の1例を説明する工
程図、 第5図は従来の超微細管の製造方法の他の例を説明する
工程図である。 第1図乃至第3図において、 31は基板、32はメッキ用下地導電膜、33はポジ型
レジスト膜、34.42は溝状レジストパターン膜、3
4aは微細線条部分、35、43はメッキ層、36は微
細穴、37.47は超微細管、38は第1フオトマスク
、39は第2フオトマスク、41はフォトマスク、42
a〜42cは第1〜第3微細線条部分、44〜46は穴
形状の異なる微細穴をそれぞれ示す。 、+                   ハ   
            ^OD         0 ℃               Φ ”            −〇          
uC、。 CD
FIG. 1 is a diagram explaining the principle of the method for manufacturing an ultrafine tube according to the present invention, and FIG. 2 is a process diagram showing the first embodiment of the method for manufacturing an ultrafine tube according to the present invention in the order of steps. ,(a)~fd)
is a cross-sectional view of the main part, te+ is a perspective view, and FIG. , fd) is a perspective view, FIG. 4 is a process diagram illustrating one example of a conventional method for manufacturing ultrafine tubes, and FIG. 5 is a process diagram illustrating another example of a conventional method for manufacturing ultrafine tubes. be. 1 to 3, 31 is a substrate, 32 is a base conductive film for plating, 33 is a positive resist film, 34.42 is a grooved resist pattern film, 3
4a is a fine linear portion, 35, 43 is a plating layer, 36 is a fine hole, 37.47 is an ultrafine tube, 38 is a first photomask, 39 is a second photomask, 41 is a photomask, 42
A to 42c represent first to third fine linear portions, and 44 to 46 represent fine holes with different hole shapes, respectively. , + ha
^OD 0 ℃ Φ” −〇
uC,. CD

Claims (1)

【特許請求の範囲】[Claims] 基板(31)上に導電膜(32)を形成し、その導電膜
(32)上にポジ型のレジスト膜(33)を塗着する工
程と、該レジスト膜(33)を選択的に露光・現像して
、内部に該レジスト膜(33)の膜厚よりも薄い微細線
条部分(34a)を有する溝状レジストパターン(34
)を形成する工程と、該溝状レジストパターン(34)
により露出した導電膜(32)上から前記微細線条部分
(34a)を覆う形に、金属メッキ層(35)を鍍着形
成する工程と、前記微細線条部分(34a)を含む溝状
レジストパターン(34)を除去する工程とを行うこと
により、前記基板(31)と金属メッキ層(35)との
間で超微細管を形成することを特徴とする超微細管の製
造方法。
A process of forming a conductive film (32) on a substrate (31), coating a positive resist film (33) on the conductive film (32), and selectively exposing and exposing the resist film (33). It is developed to form a groove-shaped resist pattern (34) which has fine linear portions (34a) thinner than the thickness of the resist film (33) inside.
) and the step of forming the grooved resist pattern (34).
forming a metal plating layer (35) on the exposed conductive film (32) so as to cover the fine line portion (34a); and a groove-shaped resist including the fine line portion (34a). A method for manufacturing an ultrafine tube, characterized in that an ultrafine tube is formed between the substrate (31) and the metal plating layer (35) by performing a step of removing the pattern (34).
JP60052079A 1985-03-14 1985-03-14 Ultrafine tube manufacturing method Expired - Lifetime JPH0821567B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60052079A JPH0821567B2 (en) 1985-03-14 1985-03-14 Ultrafine tube manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60052079A JPH0821567B2 (en) 1985-03-14 1985-03-14 Ultrafine tube manufacturing method

Publications (2)

Publication Number Publication Date
JPS61210636A true JPS61210636A (en) 1986-09-18
JPH0821567B2 JPH0821567B2 (en) 1996-03-04

Family

ID=12904810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60052079A Expired - Lifetime JPH0821567B2 (en) 1985-03-14 1985-03-14 Ultrafine tube manufacturing method

Country Status (1)

Country Link
JP (1) JPH0821567B2 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06224178A (en) * 1992-09-21 1994-08-12 Internatl Business Mach Corp <Ibm> Microminiature structure and its assembly method
JP2007512434A (en) * 2003-11-25 2007-05-17 メディア ラリオ ソシエタ ア レスポンサビリタ リミタータ Manufacturing of cooling and heat exchange system by electroforming
US7351321B2 (en) 1997-04-04 2008-04-01 Microfabrica, Inc. Method for electrochemical fabrication
US9614266B2 (en) 2001-12-03 2017-04-04 Microfabrica Inc. Miniature RF and microwave components and methods for fabricating such components
US9620834B2 (en) 2001-12-03 2017-04-11 Microfabrica Inc. Method for fabricating miniature structures or devices such as RF and microwave components
US10297421B1 (en) 2003-05-07 2019-05-21 Microfabrica Inc. Plasma etching of dielectric sacrificial material from reentrant multi-layer metal structures

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5368074A (en) * 1976-11-29 1978-06-17 Nec Corp Microwave ic device and its manufacture
JPS5956729A (en) * 1982-09-27 1984-04-02 Nippon Telegr & Teleph Corp <Ntt> Ultra-fine tube and manufacture thereof
JPS59191356A (en) * 1983-04-13 1984-10-30 Mitsubishi Electric Corp Formation of metal conductive pattern in semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5368074A (en) * 1976-11-29 1978-06-17 Nec Corp Microwave ic device and its manufacture
JPS5956729A (en) * 1982-09-27 1984-04-02 Nippon Telegr & Teleph Corp <Ntt> Ultra-fine tube and manufacture thereof
JPS59191356A (en) * 1983-04-13 1984-10-30 Mitsubishi Electric Corp Formation of metal conductive pattern in semiconductor device

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06224178A (en) * 1992-09-21 1994-08-12 Internatl Business Mach Corp <Ibm> Microminiature structure and its assembly method
US8551315B2 (en) 1997-04-04 2013-10-08 University Of Southern California Method for electromechanical fabrication
US7351321B2 (en) 1997-04-04 2008-04-01 Microfabrica, Inc. Method for electrochemical fabrication
US7618525B2 (en) 1997-04-04 2009-11-17 University Of Southern California Method for electrochemical fabrication
US7998331B2 (en) 1997-04-04 2011-08-16 University Of Southern California Method for electrochemical fabrication
US8603316B2 (en) 1997-04-04 2013-12-10 University Of Southern California Method for electrochemical fabrication
US9752247B2 (en) 1997-04-04 2017-09-05 University Of Southern California Multi-layer encapsulated structures
US9614266B2 (en) 2001-12-03 2017-04-04 Microfabrica Inc. Miniature RF and microwave components and methods for fabricating such components
US9620834B2 (en) 2001-12-03 2017-04-11 Microfabrica Inc. Method for fabricating miniature structures or devices such as RF and microwave components
US11145947B2 (en) 2001-12-03 2021-10-12 Microfabrica Inc. Miniature RF and microwave components and methods for fabricating such components
US10297421B1 (en) 2003-05-07 2019-05-21 Microfabrica Inc. Plasma etching of dielectric sacrificial material from reentrant multi-layer metal structures
US11211228B1 (en) 2003-05-07 2021-12-28 Microfabrica Inc. Neutral radical etching of dielectric sacrificial material from reentrant multi-layer metal structures
US8061032B2 (en) 2003-11-25 2011-11-22 Media Lario S.R.L. Fabrication of cooling and heat transfer systems by electroforming
JP2007512434A (en) * 2003-11-25 2007-05-17 メディア ラリオ ソシエタ ア レスポンサビリタ リミタータ Manufacturing of cooling and heat exchange system by electroforming

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