JPS61207027U - - Google Patents
Info
- Publication number
- JPS61207027U JPS61207027U JP9172785U JP9172785U JPS61207027U JP S61207027 U JPS61207027 U JP S61207027U JP 9172785 U JP9172785 U JP 9172785U JP 9172785 U JP9172785 U JP 9172785U JP S61207027 U JPS61207027 U JP S61207027U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- circuit chip
- lead frame
- sheet
- leads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000012212 insulator Substances 0.000 claims 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Die Bonding (AREA)
Description
第１図ａは本考案の一実施例の断面図、同図ｂ
は、同図ａで用いられているリードフレームの平
面図、第２図ａは従来の集積回路装置の断面図、
同図ｂは同図ａで用いられているリードフレーム
の平面図である。
１……集積回路チツプ、２……耐熱性絶縁シー
ト、３……リード線、４……接着剤、５……接続
金線、６……封止樹脂、７……アイランド、８…
…リードフレーム。
Figure 1a is a sectional view of an embodiment of the present invention, Figure 1b
is a plan view of the lead frame used in Figure 2A, and Figure 2A is a sectional view of a conventional integrated circuit device.
Figure b is a plan view of the lead frame used in figure a. DESCRIPTION OF SYMBOLS 1... Integrated circuit chip, 2... Heat-resistant insulating sheet, 3... Lead wire, 4... Adhesive, 5... Connection gold wire, 6... Sealing resin, 7... Island, 8...
…Lead frame.
Claims (1)
ード付け組立を行つてなる集積回路装置において
、前記リードフレームは、前記集積回路チツプ搭
載部の周辺に配置された多数のリードを共に固定
する耐熱性の絶縁シートを有し、このシート上に
前記集積回路チツプが搭載されてなることを特徴
とする集積回路装置。 In an integrated circuit device in which a lead frame is used to attach and assemble leads to an integrated circuit chip, the lead frame is a heat-resistant insulator that fixes together a large number of leads arranged around the integrated circuit chip mounting section. An integrated circuit device comprising a sheet, and the integrated circuit chip is mounted on the sheet.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9172785U JPS61207027U (en) | 1985-06-18 | 1985-06-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9172785U JPS61207027U (en) | 1985-06-18 | 1985-06-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61207027U true JPS61207027U (en) | 1986-12-27 |
Family
ID=30647871
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9172785U Pending JPS61207027U (en) | 1985-06-18 | 1985-06-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61207027U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5834934A (en) * | 1981-08-26 | 1983-03-01 | Toshiba Corp | Semiconductor device |
-
1985
- 1985-06-18 JP JP9172785U patent/JPS61207027U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5834934A (en) * | 1981-08-26 | 1983-03-01 | Toshiba Corp | Semiconductor device |