JPS61184834A - Manufacture of resin-molded semiconductor device - Google Patents

Manufacture of resin-molded semiconductor device

Info

Publication number
JPS61184834A
JPS61184834A JP2439185A JP2439185A JPS61184834A JP S61184834 A JPS61184834 A JP S61184834A JP 2439185 A JP2439185 A JP 2439185A JP 2439185 A JP2439185 A JP 2439185A JP S61184834 A JPS61184834 A JP S61184834A
Authority
JP
Japan
Prior art keywords
circuit part
resin
semiconductor element
semiconductor device
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2439185A
Other languages
Japanese (ja)
Inventor
Teru Okunoyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Chemical Corp
Original Assignee
Toshiba Chemical Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Chemical Corp filed Critical Toshiba Chemical Corp
Priority to JP2439185A priority Critical patent/JPS61184834A/en
Publication of JPS61184834A publication Critical patent/JPS61184834A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]

Abstract

PURPOSE:To obtain the high-reliability semiconductor device suitable for the reduction in size and weight by forming a frame made of a photo-setting resin on the periphery in advance and making a wire bonding between a semiconductor element and a circuit part followed by injection of a liquid resin into the frame. CONSTITUTION:A semiconductor element 3 is bonded to a circuit part 2 by a conductive paste 4 with a bonding pad 5 consisting of vapor deposition film of aluminum facing up. The bonding pad 5 of the semiconductor element 3 is connected to the circuit part 2 by a bonding wire 6. In the peripheral part which is to be resin-sealed, i.e., the part where the semiconductor element 3 is connected to the circuit part 2 by the bonding wire 6, a frame 8 made of a photo-setting resin is formed previously. The semiconductor element 3 is bonded to the circuit part 2 through a conductive paste 4 and the bonding pad 5 is connected to the circuit part 2 by the bonding wire 6 followed by injection of a liquid resin 7 thereby filling and sealing the periphery of the semiconductor element 3 and the circuit part 2 and obtaining the resin-molded semiconductor device 10.
JP2439185A 1985-02-13 1985-02-13 Manufacture of resin-molded semiconductor device Pending JPS61184834A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2439185A JPS61184834A (en) 1985-02-13 1985-02-13 Manufacture of resin-molded semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2439185A JPS61184834A (en) 1985-02-13 1985-02-13 Manufacture of resin-molded semiconductor device

Publications (1)

Publication Number Publication Date
JPS61184834A true JPS61184834A (en) 1986-08-18

Family

ID=12136863

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2439185A Pending JPS61184834A (en) 1985-02-13 1985-02-13 Manufacture of resin-molded semiconductor device

Country Status (1)

Country Link
JP (1) JPS61184834A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01176940U (en) * 1988-06-04 1989-12-18
JPH02501692A (en) * 1987-06-29 1990-06-07
FR2642899A1 (en) * 1989-02-06 1990-08-10 Bull Cp8 METHOD FOR COATING AN INTEGRATED CIRCUIT ON A SUPPORT, DEVICE FOR IMPLEMENTING IT, AND ELECTRONIC ASSEMBLY OBTAINED BY IMPLEMENTING THE METHOD

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57106058A (en) * 1980-12-23 1982-07-01 Nitto Electric Ind Co Ltd Manufacture of frame body
JPS5848442A (en) * 1981-09-17 1983-03-22 Matsushita Electric Ind Co Ltd Sealing of electronic parts

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57106058A (en) * 1980-12-23 1982-07-01 Nitto Electric Ind Co Ltd Manufacture of frame body
JPS5848442A (en) * 1981-09-17 1983-03-22 Matsushita Electric Ind Co Ltd Sealing of electronic parts

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02501692A (en) * 1987-06-29 1990-06-07
JPH01176940U (en) * 1988-06-04 1989-12-18
FR2642899A1 (en) * 1989-02-06 1990-08-10 Bull Cp8 METHOD FOR COATING AN INTEGRATED CIRCUIT ON A SUPPORT, DEVICE FOR IMPLEMENTING IT, AND ELECTRONIC ASSEMBLY OBTAINED BY IMPLEMENTING THE METHOD
EP0382621A1 (en) * 1989-02-06 1990-08-16 CP8 Transac Process for the encapsulation of an integrated circuit on a support, device for carrying out this method and electronic assembly obtained by this process

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