JPS61170785A - Display controller - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention [Technical Field] The present invention relates to a display control technology and a technology that is particularly effective when applied to display control for a vertical scan type display device, such as a graphic display system such as a personal computer. This invention relates to an effective technology that can be used to control enlarged display in the horizontal direction.

[Background Art] A personal computer equipped with a Rusk scan type CRT display device and having a graphic image processing function is configured by, for example, a system as shown in FIG.

That is, this system consists of a personal computer main body 10 and peripheral devices (11, 12, 13). The main unit IO is a microprocessor (hereinafter referred to as MP).
(referred to as U)1, and a system ROM (read-only storage device) in which the system program is stored2. Working RAM (memory W that can be read and written at any time) 3, which serves as a work area and text area when the MPU works;
A video RAM 4 such as a refresh memory or frame buffer that stores display image data to be displayed on a CRT display device, and a CRT controller 5° video that writes and reads display image data to and from the video RAM 4 based on commands from the MPUI. It is comprised of a parallel-to-serial converter 6 that forms and outputs a video signal based on display image data read out from the RAM 4, and an input/output interface (input/output interface) 7. Each of the above circuit blocks has an address bus, a data bus,
They are connected to each other via a bus 8 consisting of a control bus.

The personal computer main body 10 is provided with input operations using a CRT display device 11 that performs display operations according to the video signal output from the parallel-to-serial converter 6, an external storage device 12 such as a floppy disk device, and a keyboard. Peripheral devices such as device 13 are connected.

Conventionally, in the above-mentioned graphic display system, when providing a function to enlarge and display displayed characters or figures in the horizontal direction without replacing the display data in the video RAM 4, for example, a circuit as shown in FIG. 7 was installed in a CRT controller. It was externally attached to 5.

In other words, this external circuit includes a divider 2 that divides the basic dot clock and stretches the clock width into several steps.
1, a selector 22 which selects a clock suitable for the horizontal expansion coefficient from among the clocks output from the divider 21 and supplies it to the parallel-to-serial converter 6 consisting of a shift register or the like for a shift operation, and a horizontal expansion coefficient. and a load control circuit 23 that supplies a load timing signal according to the above to the parallel-to-serial converter 6 and causes it to take in display data.

When using such a circuit and converting the display data at the timing shown in FIG. 5(1), for example, to enlarge a figure displayed on a normal scale twice in the horizontal direction, As shown in FIG. 5(2), the dot clock and load clock are each stretched twice. Then, since the scanning speed of the CRT display device is constant, 1eyh(Df-, h<□Z17)Fyh)
:. 9.7 - Shown. As a result, a figure enlarged twice in the horizontal direction is displayed.

Regarding the above-mentioned graphic display system and external circuit for horizontal enlargement display, please refer to "Nikkei Electronics", May 21, 1984 issue, published by Nikkei McGraw-Hill.
No. 343, pages 222-254.

However, in the circuit for the external horizontal enlargement display as described above, the same selector 22 is used to select from the high frequency dot clock divided by the 1 frequency divider 21 to the low frequency dot clock. Therefore, it is very difficult to determine the timing, and both the divider 2I and the selector 22 must be designed as high-speed compatible circuits, which reduces the margin for signal timing and makes the design extremely troublesome.

Furthermore, in the conventional horizontal enlargement method, the display is enlarged by slowing down the operation of the parallel-to-serial converter by changing the dot clock or load clock without manipulating the display data itself. It is not possible to display data from the middle. Therefore, there is an inconvenience that functions such as horizontal scrolling cannot be performed.

[Purpose of the invention] An object of the present invention is to provide an image display system.

The objective of the external device for realizing the horizontal enlargement function is to provide a display control technique that allows easy timing design of the circuit when configuring the circuit.

Another object of the present invention is to provide a display control technique that allows very smooth scrolling when a scrolling function is added to the horizontal enlargement function.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Summary of the Invention] Representative inventions disclosed in this application will be summarized as follows.

That is, there is a zoom counter that performs counting according to the magnification factor, a switch array section that can selectively pass each bit of one display data to an arbitrary output terminal, and a zoom counter that counts according to the magnification factor and the value of the zoom counter. A shift register for zooming consisting of a sequencer that changes the setting state of this switch array part in a predetermined order is provided, and instead of extending the clock, the display data itself is extended and then sent to the parallel-to-serial converter. The above-mentioned feature enables the expansion function to be realized without requiring high-speed operating circuits such as 1 frequency dividers and selectors, facilitates circuit timing design, and enables smooth scrolling. It accomplishes its purpose.

[Embodiment] FIG. 1 shows an embodiment of an external circuit for horizontally enlarged display according to the present invention.

In this embodiment, a zoom counter 30 that outputs a count value according to a horizontal expansion coefficient;
A zoom shift register 40 is provided to stretch the display data to an appropriate size based on a signal from the zoom shift register 40, and the parallel output of the zoom shift register 40 is sent to a parallel-to-serial converter 6 consisting of a shift register or the like. It is converted into a video signal.

The zoom counter 30 is comprised of a register that holds a horizontal expansion coefficient supplied from a CRT controller (see FIG. 6), and a counter that counts up to a count value corresponding to the expansion coefficient. That is, the zoom counter 30 repeatedly counts O and 1 when the magnification is 2x, for example, from O to 2 when the magnification is 3x, and from 0 to 3 when the magnification is 4x. It has become.

The zoom shift register 40 is constituted by a circuit as shown in FIG. 3, for example. Although not particularly limited, the figure shows an 8-bit configuration for handling 8-bit display data.

Reference numeral 41 denotes a latch circuit section for holding display data, and eight latch circuits are provided here corresponding to 8-bit display data supplied from a video RAM or the like.
4゜1, 7. Engineering 4.1°. . 8 data
A plurality of switches (MOSFET) Sl- that selectively pass the signal to any terminal among the output terminals Dot to DO8.
This is a switch array section consisting of S2-S3... The switch array section 42 of this embodiment has wiring and switches arranged so as to be able to expand from 1 to 4 times, although it is not particularly limited.
The data input and held in the switches 81 to S
4 to the output terminals D01 to DO4,
The data input to the input terminal DI2 is sent to the output terminals D02~
D08, input terminal D1. The data is output from output terminal D01~
The data of input terminal DI4 goes to D08, and the data of input terminal DI4 is sent to output terminal DO□~
To Do8, input terminal D1. The data of output terminal Do1~
D07, input terminal D1. The data is output terminal Dot~
D.

8, the data at the input terminal DI is output from the output terminals DO1 to DO.
7, input terminal D1. The data is output from output terminals DO5 to D0.
8, respectively.

Each switch Si in the switch array section 42.

52pS3... is, for example, the zoom counter 3
It is selectively turned on by a sequencer (or combinational logic circuit) consisting of a latch circuit 43 and a PLA (programmable logic array) 44 that hold the expansion coefficient Z1pZ2 supplied from 0 and the count values C1 and c2, and the expansion coefficient is Accordingly, the display data is expanded in sequence.

That is, the expansion coefficient Z1yZ2 and the count value cm
, c2, the magnification is 1x, 2x, and 3x.

A signal is sent to selectively turn on the switches SS, 82, 33, etc. so that the data (D I , ~D I a ) shown in Table 1 appears at the output terminals DO1 to DO8 when the number of times is 4. The eyes of the ROM within the PLA 44 are formed so as to be formed. As a result, the magnification factor Z1
*When Z2 is rO, OJ, the magnification is 1x, and the input terminal D1. ~D1. The input display data is transmitted as is to the output terminals Do□ to Do. On the other hand, the expansion factor Z
When 1tZ2 is ro, IJ, rl, OJ, rl, IJ, it means that the magnification is 2x, 3x, and 4x, respectively, and as shown in Table 1, the input terminals D1. ~D1. The data is expanded in two stages, three stages, and four stages, respectively, and transmitted to the output terminals DO1 to D08.

Table 1 For example, the operation of converting 8-bit display data into a video signal when the enlargement rate is 2 times will be explained. First, the first display data A is input to the input terminals DI, ~D■8
When the display data A is input, the timing signal L
In synchronization with D, the signal is taken into the latch circuit 41 in the zoom shift register 40 and held. Further, the enlargement coefficient 21+22 and the count value C1*C2 output from the zoom counter 30 at this time are taken into the latch circuit 43 and held in synchronization with the timing signal Lc.

In this case, since the count value C0 in the zoom counter 30 is normally set to "0", the first 4 bits of the display data A (all 82y a3+a4) are expanded twice (a1t81* a2e a2* a3
+ a3* a4p a4) is the output terminal Dot~Do8
sent to. This output data (al * al ta
2t a2y a3e a3t a4t a4) is taken into the parallel-to-serial converter 6 in synchronization with the load clock, and then in synchronization with the dot clock, the next 2 and 1 data such as "Signal 4° - is converted and output. Then, in synchronization with the load clock, the count value in the zoom counter 30 is updated and changes to "1". Therefore, the setting state of the switch array 42 in the zoom shift register 40 changes, and this time the latter 4 bits (a5t as, a
7saa) is stretched twice and becomes (a6ta6ta
6+ a6. a), al9 a8t aa) are sent to output terminals DOI to DO8. This is again taken into the parallel-to-serial converter 6 in synchronization with the load clock, and then shifted in synchronization with the dot clock.

FIG. 2 shows a method of enlarging display data A when the enlargement ratio is 2 times. When the magnification is 3x or 4x, the display data is expanded in 3 or 4 stages, respectively.

When the first display data is stretched, the next display data B is similarly stretched. In that case, the magnification rate can also be changed.

In this way, in this embodiment, since the display data is stretched, there is no need to stretch the clock. Therefore, the fourth signal indicating the timing of the signal when the magnification is 2x is used.
In the figure, display data A.

The only difference is the supply position of B, . It will be exactly the same as the one in the picture.

As a result, in this embodiment, only the parallel-to-serial converter 6 requires particularly high-speed operation. Therefore, the margin for signal timing becomes larger, and timing design for external circuits becomes much easier.

Further, in the above embodiment, the first count value in the zoom counter 30 is set to ro, 04, but if it is set to another value and updated from there,
Since the display can be started from the middle of the first display data, a scroll function can be easily added.

Furthermore, by changing the arrangement of the zoom shift register 40 in the switch array section 42 and the ROM of the PLA 44, the input terminals DI2 to D1. By making it possible to transfer the incoming signals horizontally one by one and appearing at the output terminals D01 to D07, smooth scrolling of the initial display data can be performed not only bit by bit but also dot by dot. will be able to do it.

Moreover, the zoom shift register 40 of this embodiment is
It consists of a plurality of latch circuits, a PLA, and a switch array section, and can be designed in a regular manner, so it has the advantage of being extremely easy to integrate.

In the above embodiment, the latch circuit 41 that latches display data at the stage before the switch array section 42 is also connected to the PLA.
A latch circuit 43 for latching the output signal from the zoom counter 30 is provided at the front stage of the zoom counter 30. shift register 4
The latch circuits 41 and 43 in 0 can also be omitted.

Furthermore, in the above embodiment, the zoom shift register 40
Although the bit configuration is an 8-bit configuration, the bit configuration is not limited to this, and may be a 16-bit configuration. Further, in the above embodiment, an enlargement of 1 to 4 times is shown, but the number of bits of the zoom counter 30 is increased and the PL
- It is also possible to change the eyes of the A44 ROM appropriately so that it has a magnification function of 5 times or more. It is also possible to use a decoder or random logic circuit instead of PLA.

Further, in the above embodiment, the magnification factor may be supplied from the CRT controller, but is not limited to this, but may be supplied from the microprocessor or keyboard constituting the graphic display system. Good too.

[Effects] (1) A zoom counter that performs counting according to the magnification factor, and a switch array section that can selectively pass each bit of display data to an arbitrary output terminal. Since the zoom shift register is provided with a sequencer that changes the setting state of this switch array part in a predetermined order according to the 0 value 8 / for 4, the display data is By stretching the signal and sending it to the parallel-to-serial converter, the expansion function can be achieved without the need for high-speed circuits such as dividers or selectors. This allows for the timing design of the circuit. This has the effect of making it easier.

(2) A zoom counter that counts according to the magnification factor, a switch array section that can selectively pass each bit of display data to an arbitrary output terminal, and a zoom counter that counts according to the magnification factor and the value of the zoom counter. Since the zoom shift register is provided with a sequencer that changes the settings of the lever switch array section in a predetermined order, the display data itself is stretched instead of the clock, and the parallel-to-serial converter By this action, the display data can be output from the middle, which has the effect of allowing smooth scrolling.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor. For example, in the above embodiment, the zoom shift register 40 is composed of the switch array section 42 and the PLA 44, but any circuit may have the function of extending the display data itself, and is not limited to the circuit format as in the embodiment. It's not something you can do. It can also be applied to a case where the enlargement function is omitted and only the scroll function is realized.

[Field of Application] In the above explanation, the invention made by the present inventor was mainly explained in terms of its application to the external circuit of a CRT controller in a graphic display system equipped with a CRT display device, which is the field of application behind the invention. but,
The present invention is not limited thereto, and can be used in general systems having a display device of the rask scan type.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of an external circuit for horizontal enlargement display according to the present invention, and FIG. 2 shows the operation of a zoom shift register when the circuit performs double enlargement. Explanatory diagram: FIG. 3 is a circuit diagram showing an example of a configuration of a zoom shift register. Fig. 4 is a timing chart showing the timing of each signal in the circuit of the embodiment. Fig. 5 (1) and (2) show the timing of each signal in the conventional circuit without enlargement and in the case of double enlargement. FIG. 6 is a block diagram showing an example of a graphic display system in which the horizontally enlarged display external circuit according to the present invention is used. FIG. 7 is a block diagram showing an example of a conventional external circuit for horizontally enlarged display. 1...Microprocessor, 4...Video RA
M, 5...CRT controller, 6...Parallel-serial converter, 10...Graphic display system (personal computer), 11...CR1 display device, 12...External Storage device, 13...Input operation device, 30...Zoom counter, 40...Zoom shift register, 41, 43°. ... Latch circuit section, 42 ... Switch array section, 4
4...PLA (programmable logic. array). Agent Patent Attorney Katsuma Ogawa To'\-' and Bi' \Meeeee

Claims (1)

[Claims] 1. A zoom device that expands the supplied display data according to an enlargement factor, and a parallel-to-serial converter that converts a parallel output signal of the zoom device into a serial signal. display control device. 2. The zoom means includes a switch array section that can selectively transmit each bit of display data supplied to an input terminal to an arbitrary one or more output terminals, and a switch array section that can selectively transmit each bit of display data supplied to an input terminal to an arbitrary one or more output terminals; Claim 1 comprising a combinational logic circuit that changes a setting state.
The display control device described in Section 1.