JPS61154032U - - Google Patents

Info

Publication number
JPS61154032U
JPS61154032U JP3603585U JP3603585U JPS61154032U JP S61154032 U JPS61154032 U JP S61154032U JP 3603585 U JP3603585 U JP 3603585U JP 3603585 U JP3603585 U JP 3603585U JP S61154032 U JPS61154032 U JP S61154032U
Authority
JP
Japan
Prior art keywords
adder
counter
pulse modulation
output
wired
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3603585U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3603585U priority Critical patent/JPS61154032U/ja
Publication of JPS61154032U publication Critical patent/JPS61154032U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Dc Digital Transmission (AREA)
JP3603585U 1985-03-15 1985-03-15 Pending JPS61154032U (US07709020-20100504-C00041.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3603585U JPS61154032U (US07709020-20100504-C00041.png) 1985-03-15 1985-03-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3603585U JPS61154032U (US07709020-20100504-C00041.png) 1985-03-15 1985-03-15

Publications (1)

Publication Number Publication Date
JPS61154032U true JPS61154032U (US07709020-20100504-C00041.png) 1986-09-24

Family

ID=30540858

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3603585U Pending JPS61154032U (US07709020-20100504-C00041.png) 1985-03-15 1985-03-15

Country Status (1)

Country Link
JP (1) JPS61154032U (US07709020-20100504-C00041.png)

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