JPS61145530A - Manufacture of thin-film transistor array - Google Patents

Abstract

PURPOSE:To increase a throughput and to improve the display quality of a liquid crystal display device by coating the reverse surface of a glass substrate with an acid resisting insulating film and forming a thin-film transistor (TR) on the top surface of the substrate. CONSTITUTION:A tantalum thin film is vapor-deposited on the reverse surface of the insulating substrate 1 and anode-oxidized to form the acid-resistant insulator film 2 having specific thickness and then titanium vapor-deposited on the top surface of the substrate 1 is etched to form a gate electrode 3 in a desired pattern. This gate electrode 3 is coated with a gate insulating film 4 and a semiconductor film 5 is formed thereupon. The film 5 is etched to form a metallic tin film 6 which form a drain and a source electrode, and a transparent electrode 7 is formed there. Further, the unnecessary part of the thin film 6 on the film 5 is etched away to form the drain electrode 8 and source electrode 9. Then, the film 5 is removed by wet etching and the reverse surface of the substrate 1 is protected by the insulator film 2 to increase the throughput and improve the display quality of the liquid crystal display device.

Description

Detailed Description of the Invention (Industrial Field of Application) The present invention relates to a method for manufacturing a thin film transistor array used in a liquid crystal display device, and in particular, a method for manufacturing a thin film transistor array using a thin film transistor array method with high sloop and high torque. Regarding.

(Prior art and its problems) In recent years, with the progress of office automation, the number of pixels of display devices used as man-machine interfaces has been actively increased.

In the field of liquid crystal displays, thin film transistor arrays for switching liquid crystals are being actively developed.

One method of manufacturing a conventional thin film transistor array for liquid crystal display is known as disclosed in Japanese Patent Application No. 126725/1983. FIGS. 2(a) to 2(h) are cross-sectional views showing a method for manufacturing one thin film transistor in order of steps to explain the conventional method for manufacturing a thin film transistor array.

The method for manufacturing the nickel is to form a gate electrode 3 on an insulating substrate 1.
Fig. 2(a)] and etching into a predetermined pattern [Fig. 2(b)]. Thereafter, a gate insulating film 4 and a semiconductor film 5 are formed thereon [FIG. 382(C)], and the semiconductor film is etched into a predetermined pattern (FIG. 382(d)).

After warping, a thin metal film 6 that will become the drain and source electrodes is formed on the entire upper part of the diagram [FIG. 2(e)], and unnecessary parts are etched away, leaving the thin metal film 6 in the area that covers the semiconductor layer 5 that will become the channel. Remove it [Figure 2(f)].

After that, a transparent electrode 7 is formed on the entire upper surface [Fig. 2 (2)]
.

Finally, the transparent electrode 7 is patterned into a desired pattern by etching, and at the same time the metal thin jI! 6 and drain electrode 8
and a source electrode 9 [FIG. 2(h)]. The liquid crystal display panel is a transmissive type,
A glass substrate is usually used as the insulating substrate 1 since it is desirable to be able to use both reflective types and is inexpensive. Further, as the semiconductor layer 5, amorphous silicon or polysilicon is suitable because of its transistor characteristics.

When the semiconductor layer 5 is etched by etching, etching, or etching in the conventional manufacturing method, if the semiconductor layer 5 is made of amorphous silicon or polysilicon, the glass substrate 1 is also etched because a mixed solution of fluorine and nitric acid is used. If the glass substrate is too busy, it will cause smearing. Therefore, if a thin film transistor array using this manufacturing method is used in a liquid crystal display, the display quality will be significantly degraded due to fogging of the glass substrate, which will cause l[1].
The method of covering the back side of the glass substrate 1 with a resist or the like during etching is that the resistance of the resist to II and nitric acid is low, so the resist easily peels off and there is a high probability that the glass substrate 1 will be etched. There are problems such as the surface being easily stained when resist is applied to the surface.

Note that using an alkaline solvent for etching amorphous silicon or polysilicon is undesirable because the etching uniformity is very bad.On the other hand, if the calf conductor layer 5 is etched by dry etching, the back side will be etched.

I don't want to be criticized, but I'm in charge of Drier.
It has a serious drawback of being poor in sloop and toe compared to toe and chingu.

(Object of the Invention) An object of the present invention is to provide a method for manufacturing a thin film transistor array with good throughput and display quality by eliminating such conventional drawbacks.

(Structure of the Invention) The present invention provides a method for manufacturing a thin film transistor array for switching, characterized in that at least the back surface of a glass substrate is coated with an acid-resistant insulating film, and thin film transistors are formed on the surface of the glass substrate. This is a manufacturing method.

(Detailed Description of Configuration) The present invention solves the problems of the prior art by adopting the above-described configuration. The present invention will be explained with reference to cross-sectional views of FIGS. 1(a) to 1(h) showing the steps of manufacturing a thin film transistor. In the manufacturing method of the present invention, a gate electrode 3 is placed on an insulating substrate 1 on which an acid-resistant insulating layer 2 is formed on at least the back surface of the insulating substrate 1.
[FIG. 1(a)] and etched into a predetermined pattern [FIG. 1(b)].

Thereafter, the first gate insulating film 4 and the semiconductor [5] are formed [FIG. 1(C)], and the semiconductor film 5 is etched into a predetermined pattern [FIG. 1(ψ)].Then, a drain and a semiconductor film 5 are formed on the entire upper surface. A gold Jli thin belly 6 is formed to serve as a ground electrode [11th
1(e)), the metal thin film in unnecessary parts is removed by etching, leaving the gold nI trap 6 in the part covering the semiconductor M5 which will become the channel [FIG. 1(f)].

After that, a transparent electrode 7 is patterned in a desired pattern on the entire upper surface, and at the same time, the metal thin film 6 on the semiconductor layer 5 serving as a channel is removed to form a drain electrode 8 and a source electrode 9 (see FIG. 1). Ru. Therefore, the step of etching the semiconductor layer 5 into a predetermined pattern (518
As shown in Fig. 2 (Year), the glass substrate 1 remains intact even if it is washed, punched, or etched because the acid-resistant cellulose layer 2 shields the back surface of the glass substrate 1.

You won't be tinged.

(Example) Examples of the present invention will be described in detail below with reference to FIG.

A tantalum thin film is deposited on the back surface of the glass substrate l and anodized to form a tag of 1000λ (%) to form an acid-resistant green material layer 2.
Then, titanium 100 was used as the gate electrode metal 3.
11Q (b).
). 7°M for titanium etching! :Nitric acid:Water=1
: A mixed solution of 1:100 was used.

In this process, almost all glass substrates can be processed using the tinda liquid.

Not checked. In this example, Ti was used as the metal for the gate electrode, but other metals such as A11Ta sOr %
Mo % W etc. can be used. Glass is hardly etched by these commonly used metal etching solutions for wiring. Then gate insulation on top of that! A silicon nitride film is used as I4.

Amorphous silicon film as semiconductor layer 5? a o
o □ Continuously formed using large plasma OVD method [Figure 1 (
C)], amorphous silicon was etched into a predetermined pattern by a photoresist method [FIG. 1(d)].

Etching liquid for amorphous silicon contains f.

m: A mixed solution of nitric acid:wood vinegar i1 [=1:5:15] was used.

In the conventional manufacturing method using this mixed solution, the glass substrate was etched and clouding occurred on the back surface, but the glass substrate in which Tatol, an acid-resistant insulating film, was formed on the back surface as in this example was not etched at all. No stuttering occurred. It should be noted that since the surface was coated with a silicon nitride film and the etching rate was sufficiently slower than that of amorphous silicon, almost no clouding occurred. Thereafter, 2000 ml of titanium is formed on the entire upper surface as the metal thin film 6 that will become the drain and source electrodes [FIG. 1 (6)), and unnecessary parts are etched, leaving the metal thin film 6 in the area that covers the semiconductor layer 5 that will become the channel. [Fig. 1(f)]. engineering,
The same tinde liquid used for the gate electrode was used. After that, apply I'l'O as a transparent electrode 7 on the entire upper surface using an argon spa and xsoo! [FIG. 1(g)], and patterning the transparent electrode 7 into a desired pattern using a photoresist method, simultaneously forming a metal thin film 6 on the semiconductor layer 5 as a channel.
was removed to form a drain electrode 8 and a source electrode 9 [
Figure 1 (h)). In the process of I'l'0, a mixed solution of Ka-hydrochloric acid and water in a ratio of 1:1 was used. In the I'I'O process, the glass substrate was not etched with the tinda solution.

(Effects of the Invention) If the method for manufacturing a thin film transistor according to the present invention is used,
Even if a wet etching method with high throughput is used, the glass substrate will not be etched and no clouding will occur. Therefore, even if a liquid crystal display is constructed using a thin-film transistor array made by Ren, it will not be possible to create an I! I quality does not deteriorate significantly. In this embodiment, T-O5, which is obtained by anodizing vapor-deposited tantalum, is used as the acid-resistant insulating film, but it goes without saying that Ta1Os, which is produced by other methods such as argon sputtering, can also be used. In addition to Ta2O, Si
It goes without saying that insulating films with high acid resistance, such as O, 81sN4, and A40a, can also be used.

As described in detail above, according to the present invention, it is possible to provide a method for manufacturing a thin film transistor array that has high sloop and torque and has good display quality on a liquid crystal display.

[Brief explanation of drawings]

FIG. 1 (---(Shunki) A cross-sectional view showing the manufacturing process of the thin film transistor array of the present invention, and FIGS. 2(a) to (h) are cross-sectional views showing the manufacturing process of the conventional thin film transistor array. In the figures, DESCRIPTION OF SYMBOLS 1... Insulating substrate, 2... Acid-resistant insulator layer, 3... Gate electrode, 4... Gate insulating film, 5
. . . semiconductor film, 6 . . . metal thin film serving as drain and source electrodes, 7 . . . transparent electrode, 8 . . . drain electrode, 9 . . . source electrode. Teens! +! Figure 7I-2 (0) (f) (b)
(Q) (C)
(h) (d) (e)

Claims (3)

[Claims] (1) A method for manufacturing a thin film transistor array, which comprises covering at least the back side of a glass substrate with an acid-resistant insulating film and forming thin film transistors on the surface of the glass substrate. (2) The method for manufacturing a thin film transistor array according to claim 1, wherein the semiconductor layer of the thin film transistor is made of amorphous silicon or polycrystalline silicon. (3) Acid-resistant insulating film is SiO, Si_3N_4, Al
2. The method of manufacturing a thin film transistor array according to claim 1, wherein the thin film transistor array is made of a thin film of _2O_3 or Ta_2O_3.