JPS61143068U - - Google Patents
Info
- Publication number
- JPS61143068U JPS61143068U JP2594485U JP2594485U JPS61143068U JP S61143068 U JPS61143068 U JP S61143068U JP 2594485 U JP2594485 U JP 2594485U JP 2594485 U JP2594485 U JP 2594485U JP S61143068 U JPS61143068 U JP S61143068U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- test circuit
- pseudo
- utility
- scope
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Testing Electric Properties And Detecting Electric Faults (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2594485U JPS61143068U (ko) | 1985-02-25 | 1985-02-25 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2594485U JPS61143068U (ko) | 1985-02-25 | 1985-02-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61143068U true JPS61143068U (ko) | 1986-09-04 |
Family
ID=30521489
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2594485U Pending JPS61143068U (ko) | 1985-02-25 | 1985-02-25 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61143068U (ko) |
-
1985
- 1985-02-25 JP JP2594485U patent/JPS61143068U/ja active Pending
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