JPS61141027A - Reader for mark card data - Google Patents

Reader for mark card data

Info

Publication number
JPS61141027A
JPS61141027A JP26490984A JP26490984A JPS61141027A JP S61141027 A JPS61141027 A JP S61141027A JP 26490984 A JP26490984 A JP 26490984A JP 26490984 A JP26490984 A JP 26490984A JP S61141027 A JPS61141027 A JP S61141027A
Authority
JP
Japan
Prior art keywords
read
ram2
reader
data
mark
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26490984A
Other languages
Japanese (ja)
Inventor
Kozo Kawabata
Nobuyuki Yamamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Tateisi Electronics Co filed Critical Omron Tateisi Electronics Co
Priority to JP26490984A priority Critical patent/JPS61141027A/en
Publication of JPS61141027A publication Critical patent/JPS61141027A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To read even different types of mark cards with a mark card reader by setting variably the timing with which the input data is held for a set period of time and supplied to a memory means according to a different type work card.
CONSTITUTION: This reader for mark card data consists of a latch 1 serving as a data signal holding, means, a RAM2, an oscillator 3 serving as a clock output means, a data write/read timing setting means 4 to the RAM2, fall and rise differentiating circuit 7 and 8, write/read deciding circuit 9, a multiplexer 10 and an address counter 11. The timing time T is set by a setting unit 6 of the means 4. When a data signal D, for example, is written to the RAM2, the RAM2 is controlled by a read signal R which is slower than a strobe signal S by the time T. While the latch 1 is reset by the next strobe signal S. Thus different types of mark cards can be read by a single mark card data reader.
COPYRIGHT: (C)1986,JPO&Japio
JP26490984A 1984-12-14 1984-12-14 Reader for mark card data Pending JPS61141027A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26490984A JPS61141027A (en) 1984-12-14 1984-12-14 Reader for mark card data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26490984A JPS61141027A (en) 1984-12-14 1984-12-14 Reader for mark card data

Publications (1)

Publication Number Publication Date
JPS61141027A true JPS61141027A (en) 1986-06-28

Family

ID=17409895

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26490984A Pending JPS61141027A (en) 1984-12-14 1984-12-14 Reader for mark card data

Country Status (1)

Country Link
JP (1) JPS61141027A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4872021B1 (en) * 2011-04-15 2012-02-08 孝文 三村 Rotary clamping machine

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4872021B1 (en) * 2011-04-15 2012-02-08 孝文 三村 Rotary clamping machine

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