JPS61137334A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS61137334A
JPS61137334A JP59259573A JP25957384A JPS61137334A JP S61137334 A JPS61137334 A JP S61137334A JP 59259573 A JP59259573 A JP 59259573A JP 25957384 A JP25957384 A JP 25957384A JP S61137334 A JPS61137334 A JP S61137334A
Authority
JP
Japan
Prior art keywords
lead
semiconductor device
support
semiconductor element
support lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59259573A
Other languages
English (en)
Other versions
JPH0334854B2 (ja
Inventor
Koichi Nakagawa
中川　興一
Kazunari Michii
一成 道井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59259573A priority Critical patent/JPS61137334A/ja
Publication of JPS61137334A publication Critical patent/JPS61137334A/ja
Publication of JPH0334854B2 publication Critical patent/JPH0334854B2/ja
Granted legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/4805—Shape
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
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    • H01L2924/01082—Lead [Pb]
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、半導体装置、特に半導体集積回路素子をリ
ードフレームに樹脂を用いて実装する半導体装置に関′
するものである。
〔従来の技術〕
第２図にリードフレームに半導体素子をダイボンド実装
する半導体装置の従来例を示す、１はリードフレームに
設けられたダイスパッド、２１は、ダイスパッド１から
延長して形成されたサポートリード、２ａ〜２ｔは上記
リードフレームに規定数設けられたリードフィンガーで
、これは同然上記ダイスパッド及びサポートリード２１
と同一平面上にある。３はダイボンド実装すべき半導体
素子、４は金属細線、５は半導体素子３に設けられた規
定数のアルミニウム電極である。
本従来装置では、ダイスバッド１上にダイボンド実装さ
れた半導体素子３はそのアルミニウム電極５がリードフ
ィンガー２ａ〜２ｔと金ａｍ線４で結線され、これが信
号ラインとなる。また半導体素子３のアルミニウム電極
５と、リードフレームのダイスパッドｌに接続されたサ
ポートリード２１との間にワイヤボンドすることがある
。これは半導体素子の電気的特性を安定化するために半
導体素子の裏面と半導体素子の表面のアルミニウム電極
とを電気的に同電位とするためである。第２図で言えば
、アルミニウム電極５とサポートリード２１とを結線す
るワイヤボンド４ａがこれであり、これをグランドボン
ドという。
なお半導体装置は、上記ワイヤボンドを行なったのち半
導体素子、ダイスパッド、サポートリード２１及びリー
ドフィンガー２ａ〜２ｔの先端部を含んで樹脂封止し、
上記サポートリード２１及びリードフィンガー２ａ〜２
ｔをカットすることによって完成し、上記サポートリー
ド２１及びリードフィンガー２ａ〜２ｔの半導体装置に
付随した部分が外部リードとなる。
〔発明が解決しようとする問題点〕
しかるに上記のような従来のワイヤボンド方法では、第
３図のような場合に問題がある。即ち、第３図では、半
導体素子３の電極５の配置が上記第２図とは異なってい
て、サポートリード２１の方向とグランドボンド４ａの
方向とが一致していない、この場合、リードフィンガー
２ａを結線するワイヤボンド４ｂはサポートリード２１
を横切って配線されることになる。第４図はこの様子を
示す正面図である。金属細線４ｂは第４図に示すように
ボンディングされるが、第４図の例のようにワイヤボン
ド４ｂのループが低くたれ下がったような場合は、リー
ドフィンガー２ａへの配線ワイヤ４ｂがサポートリード
２１に接触することが発生し、電気特性の不良となる。
本発明はこのような問題点を解消するためになされたも
ので、接続上の電気的不良を防止できる半導体装置を提
供することを目的とするものである。
〔問題点を解決するための手段〕
この発明に係る半導体装置は、サポートリードのダイス
パッド部への接続部分を該サポートリードと半導体素子
の電極とを結線するためのグランドボンドの方向と同一
方向に形成したものである。
〔作用〕
この発明においては、サポートリードのダイスパッド部
との接続部分をグランドボンドの方向と同一方向に形成
したから、他のリードフィンガーへの配線ワイヤがサポ
ートリードに接触するような電気的不良がおこらなくな
る。
〔実施例〕
以下、本発明の実施例を図について説明する。
第１図は本発明の一実施例による半導体装置を示す０図
に示すように、リードフレームのダイスパッド１に半導
体素子３をダイボンド実装したのち、アルミニウム電極
５とリードフィンガー２ａ〜２ｔとをそれぞれ金属細線
４で結び、信号ラインとする点は従来装置と同じである
が、図のような電極配置を育する本装置の場合、予めサ
ポートリード２１のダイスパッド１への接続部分６を電
。
極５とサポートリード２１とを結ぶグランドボンド４ａ
と同一方向に、即ち平面から見て上記接続部分６とグラ
ンドボンド４ａとが重なるように形成しておく、この場
合、他の電極５及びリードフレーム２ａ〜２ｔはこれら
自身及び両者を結ぶ金属細線４がグランドボンド４ａに
接触しない位置に形成されている。
このような本実施例装置では、サポートリード２１と隣
接するリードフィンガー２３への配線ワイヤは、もしこ
れがたれることがあってもサポートリード２１と短絡す
ることがなく、電気的不良の発生を防止できる。
〔発明の効果〕
以上のように、この発明によれば、半導体素子をリード
フレームにダイボンド実装し、樹脂封止する半導体装置
において、サポートリードのダイスパッドへの接続部分
をグランドボンド用の金属細線と同一方向に向けたので
、金属細線のタレ等による電気的不良の恐れがなくなる
という効果がある。
【図面の簡単な説明】 第１図は本発明の一実施例による半導体装置を示す平面
図、第２図は従来の半導体装置のダイボンドの例を示す
平面図、第３図は従来の半導体装置のダイボンドの他の
例を示す平面図、第４図は従来装置における電気的不良
の発生具合を示す正面図である。 １・・・ダイスパッド、２ａ〜２ｔ・・・リードフィン
アルミニウム電極。 なお図中同一符号は同−又は相当部分を示す。

Claims (1)

    【特許請求の範囲】
  1. （１）リードフレームに半導体素子をダイボンド実装し
    たのち、樹脂封止する半導体装置において、半導体素子
    をダイボンドするダイスパッドから延長して形成された
    サポートリードと、上記半導体素子の裏面電位を該半導
    体素子の表面のアルミニウム電極と同電位にするために
    上記号ポートリードと該アルミニウム電極間にワイヤボ
    ンド結線された金属細線とを備え、上記サポートリード
    と上記ダイスパッドとの接続部分が上記ワイヤボンド結
    線された金属細線と同一方向に形成されていることを特
    徴とする半導体装置。
JP59259573A 1984-12-07 1984-12-07 半導体装置 Granted JPS61137334A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59259573A JPS61137334A (ja) 1984-12-07 1984-12-07 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59259573A JPS61137334A (ja) 1984-12-07 1984-12-07 半導体装置

Publications (2)

Publication Number Publication Date
JPS61137334A true JPS61137334A (ja) 1986-06-25
JPH0334854B2 JPH0334854B2 (ja) 1991-05-24

Family

ID=17335997

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59259573A Granted JPS61137334A (ja) 1984-12-07 1984-12-07 半導体装置

Country Status (1)

Country Link
JP (1) JPS61137334A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5473514A (en) * 1990-12-20 1995-12-05 Kabushiki Kaisha Toshiba Semiconductor device having an interconnecting circuit board

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54141565A (en) * 1978-04-26 1979-11-02 Nec Corp Semiconductor device
JPS58169949A (ja) * 1982-03-30 1983-10-06 Matsushita Electronics Corp 半導体装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54141565A (en) * 1978-04-26 1979-11-02 Nec Corp Semiconductor device
JPS58169949A (ja) * 1982-03-30 1983-10-06 Matsushita Electronics Corp 半導体装置

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5473514A (en) * 1990-12-20 1995-12-05 Kabushiki Kaisha Toshiba Semiconductor device having an interconnecting circuit board
US5613295A (en) * 1990-12-20 1997-03-25 Kabushiki Kaisha Toshiba Semiconductor device having an interconnecting circuit board and method for manufacturing same
US5646830A (en) * 1990-12-20 1997-07-08 Kabushiki Kaisha Toshiba Semiconductor device having an interconnecting circuit board
US5715147A (en) * 1990-12-20 1998-02-03 Kabushiki Kaisha Toshiba Semiconductor device having an interconnecting circuit board

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