JPS61136252A - Composite semiconductor device - Google Patents
Composite semiconductor deviceInfo
- Publication number
- JPS61136252A JPS61136252A JP25849384A JP25849384A JPS61136252A JP S61136252 A JPS61136252 A JP S61136252A JP 25849384 A JP25849384 A JP 25849384A JP 25849384 A JP25849384 A JP 25849384A JP S61136252 A JPS61136252 A JP S61136252A
- Authority
- JP
- Japan
- Prior art keywords
- metal
- plate
- insulating plate
- connecting terminals
- outside connecting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Abstract
Description
【発明の詳細な説明】
〔発明の属する技術分野〕
本発明は複数の半導体ペレットが金属基板上に配列され
、外部接続端子と接続される複合半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a composite semiconductor device in which a plurality of semiconductor pellets are arranged on a metal substrate and connected to external connection terminals.
最近のパワーエレクトロニクスの急漱な発展のなかで、
静止電力変換装置のトランジスタ化が急速に進んでいる
。その中でモータ駆動用インバータについても出願人ら
によってトランジスタ化されてきている。With the recent rapid development of power electronics,
Transistorization of static power converters is rapidly progressing. Among these, the applicants have also developed a transistorized inverter for driving a motor.
第２図はこのようなモータ制御回路に使われるブリッジ
形インバータの等価回路を示す。FIG. 2 shows an equivalent circuit of a bridge type inverter used in such a motor control circuit.
この回路では構成するトランジスタ３やダイオード４な
どの半導体素子は前述のような用途では１素子あたり数
１０から数１００アンペアの電流容量を必要とするので
発熱量も多く、それぞれ大きな放熱板が用意されねばな
りない。さらにこれらすべてを一つの装置として一坏化
するにはいっそう大きな放熱板の上にトランジスタ３と
ダイオードをそれぞれ６個づつ配列して配蛛する必要が
ｓｂ、従ってそのようなものでは半導体素子間と外部接
続端子とを配線すると非常に複雑となるだけでなく大型
化する。In this circuit, semiconductor elements such as the transistor 3 and the diode 4 require a current capacity of several tens to several hundred amperes per element in the above-mentioned applications, and therefore generate a large amount of heat, so large heat sinks are prepared for each element. Must be. Furthermore, in order to integrate all of these into one device, it is necessary to arrange six transistors 3 and six diodes each on a larger heat sink, so in such a device, there are Wiring with external connection terminals not only becomes very complicated but also increases the size.
また低価格化および小型化を図るため、個々の半導体素
子をペレットのままで直接組み込み配線しようとすると
、製造過程で不良の半導体素子がたとえ１個だけ発生し
た場合でも、金座が不良となってしまう。これは経済的
には大きな損失であリ、製品の価格を高くするように価
格にはねかえり、一体化の経済的な益をほとんど帳消し
にしてしまうものであった。こういうこともあって、半
導体素子ペレットままで複合化することは困難であった
。Furthermore, in order to reduce costs and downsize, if individual semiconductor elements are directly assembled and wired as pellets, even if only one defective semiconductor element occurs during the manufacturing process, the metal pad may become defective. I end up. This was a huge economic loss, and would have a negative impact on prices, making the product more expensive, almost canceling out the economic benefits of integration. For these reasons, it has been difficult to synthesize semiconductor element pellets as they are.
本発明の目的はこのような多数の半導体素子と複雑な回
路配線を備える半導体装置を−そう小型化、低価格にし
た複合半２４坏装置を提供することである。It is an object of the present invention to provide a composite semi-24-piece device that is much smaller and less expensive than a semiconductor device having a large number of semiconductor elements and complicated circuit wiring.
本発明によれば、この目的は複合半導体装置が金属基板
上に絶縁板を介して金属橋板が脚部に二り固着されて載
置され、絶縁板とこの上の金属橋板とのそれぞれの板上
に塔載された少なくとも一つの半導体素子ペレットと外
部接続端子とが所定のパターンを備える前記絶縁板上に
形成された金属領域と、金属橋板上に絶縁板を介して形
成された金属領域にそれぞれ固着され、かつリードワイ
ヤによって配線されることＫより達成される。According to the present invention, this object is achieved by mounting a composite semiconductor device on a metal substrate with two metal bridge plates fixed to the legs through an insulating plate, and connecting the insulating plate and the metal bridge plate thereon to each other. At least one semiconductor element pellet mounted on the plate and an external connection terminal are formed on the metal region formed on the insulating plate with a predetermined pattern and on the metal bridge plate via the insulating plate. This is achieved by being respectively fixed to the metal regions and wired by lead wires.
以下本発明の一実施例を図を用いて説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第１図に本発明の樹脂封止形複合形半導体装置の被覆さ
れた封止樹脂が透視された斜視外観図を示す。FIG. 1 shows a perspective external view of the resin-sealed composite semiconductor device of the present invention, with the encapsulating resin covered therethrough being seen through.
金属基板１は銅などの良導電性および良熱伝導性材料に
よりつくられる。この金属基板１上に絶縁基板２が固着
され、この絶縁基板２の上の金属処理領域Ｈにトランジ
スタ３．ダイオード４のような半導体素子ペレットおよ
び外部接続端子５とともに金属基板１と同材料からなり
断面コ字形の金属橋板６が脚部１０により固着されて塔
載される。The metal substrate 1 is made of a material with good electrical conductivity and good thermal conductivity, such as copper. An insulating substrate 2 is fixed on this metal substrate 1, and a transistor 3. A metal bridge plate 6 made of the same material as the metal substrate 1 and having a U-shaped cross section is mounted together with a semiconductor element pellet such as a diode 4 and an external connection terminal 5, and is fixed by legs 10.
さらにこの金属橋板６の上にも半導体素子ペレット３．
４と、絶縁板２を介した外部接続端子７が設けられる。Furthermore, semiconductor element pellets 3 are placed on top of this metal bridge plate 6.
4 and an external connection terminal 7 via an insulating plate 2 are provided.
半導体ペレット３．４と外部接続端子５．１とは絶縁板
上では所定のパターンを備える導電領域に半田付けなど
により固着されているが、金属橋板２上では逆に！子を
互に絶縁するために絶縁板８に金属化処理をして外部接
続端子フを半田などによシ直立させている。さらに金属
基板ｌ上において、図では透視図としたために点線で示
した樹脂９により外部接続端子５，７のそれぞれの自由
端を露出するように封止される。On the insulating plate, the semiconductor pellet 3.4 and the external connection terminal 5.1 are fixed to a conductive area with a predetermined pattern by soldering or the like, but on the metal bridge plate 2, it is the opposite! In order to insulate the terminals from each other, the insulating plate 8 is metallized, and the external connection terminals are made upright by soldering or the like. Further, on the metal substrate l, the external connection terminals 5 and 7 are sealed with a resin 9 shown by dotted lines because the figure is a perspective view, so that the free ends of each of the external connection terminals 5 and 7 are exposed.
従って、本発明では半導体を一枚の金属基板上ではなく
、その上に積み重ねられた金属橋板にも半導体素子を直
接固着して配線し九ことＫより放熱性が良くなり、また
、積み重ねたことによゆ小型化が可能になった。Therefore, in the present invention, the semiconductor element is directly fixed and wired not on a single metal substrate, but also on the metal bridge plate stacked on top of it, resulting in improved heat dissipation. In particular, miniaturization has become possible.
本発明ではこの二うに半導体素子を二段に積み重ねる構
成のため、例えばトランジスタ６個、ダイオード６個と
複雑な配線からなるモータ駆動インバータについてもコ
ンパクトな大きさにすることができる。また小型化にな
るだけでなく、軽量化にもなり、部品が少なくなること
から生じる経済的な益も大きい。さらに半導体素子が２
段すなわち２つのグループに分かれているので、１つの
素子に不良が生じたときも１つのグループを不良にする
だけでよい。In the present invention, since the semiconductor elements are stacked in two stages, a motor drive inverter including six transistors, six diodes, and complicated wiring can be made compact. In addition to being smaller, it is also lighter and has fewer parts, which provides great economic benefits. In addition, two semiconductor elements
Since it is divided into stages, that is, two groups, even if one element becomes defective, it is only necessary to make one group defective.
その他事発明は前述のモータ駆動用インバータに限らず
他の複数の半導体素子を有する半導体装置にも適用でき
ることは言うまでもない。Other Matters It goes without saying that the invention is applicable not only to the above-mentioned motor drive inverter but also to other semiconductor devices having a plurality of semiconductor elements.
本発明によれば複合半導体装置において、金属基板上に
絶縁板を介して金属橋板が脚部により固着されて載置さ
れ、絶縁板とこの上の金属橋板とのそれぞれの板上に塔
載された少なくとも一つの半導体素子ペレットと外部接
続端子とが前記絶縁板上に形成された金属領域と、金属
橋板上に直接あるいは金属橋板上に絶縁板を介して形成
された金属領域にそれぞれ固着され、かつリードワイヤ
によって配線されることにより、多数の半導体素子と複
雑な回路配線を備える半導体装置をコンパクトにするこ
とができ、部品数が少なくなったので低価格にもするこ
とができる。According to the present invention, in a composite semiconductor device, a metal bridge plate is placed on a metal substrate via an insulating plate and is fixed by the legs, and a tower is placed on each of the insulating plate and the metal bridge plate thereon. At least one semiconductor element pellet and an external connection terminal mounted on the metal region formed on the insulating plate and the metal region formed directly on the metal bridge plate or on the metal bridge plate with an insulating plate interposed therebetween. By fixing them to each other and wiring them with lead wires, it is possible to make a semiconductor device with a large number of semiconductor elements and complicated circuit wiring compact, and because the number of parts is reduced, the cost can also be reduced. .
第１図は本発明の一実施例の透視斜視図、第２図はモー
タ駆動インバータ等価回路図である。
ｌ・・・金属基板、２，８・・・絶縁板、３・・・トラ
ンジスタペレット、４・・・ダイオードペレット、６・
・・金属橋板、５，７・・・外部接続端子、９・・・封
止樹脂、ｌＯ・・・金属橋板脚部。
第１図
＠ＩｋｍＴｌ＊ナリーFIG. 1 is a perspective view of an embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of a motor drive inverter. l... Metal substrate, 2, 8... Insulating plate, 3... Transistor pellet, 4... Diode pellet, 6...
...Metal bridge plate, 5, 7... External connection terminal, 9... Sealing resin, lO... Metal bridge plate leg. Figure 1 @IkmTl*Nally
Claims (1)
着されて載置され、絶縁板とこの上の金属橋板とのそれ
ぞれの板上に塔載された少なくとも一つの半導体ペレッ
トと外部接続端子とが前記絶縁板上に形成された金属領
域と、金属橋板上に絶縁層を介して形成された金属領域
にそれぞれ固着され、かつリードワイヤによつて配線さ
れてなることを特徴とする複合半導体装置。A metal bridge plate is placed on the metal substrate with an insulating plate interposed therebetween, and is fixed by the legs, and at least one semiconductor pellet is placed on each of the insulating plate and the metal bridge plate thereon, and an external A connecting terminal is fixed to a metal region formed on the insulating plate and a metal region formed on the metal bridge plate via an insulating layer, and is wired by a lead wire. Composite semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25849384A JPS61136252A (en) | 1984-12-07 | 1984-12-07 | Composite semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25849384A JPS61136252A (en) | 1984-12-07 | 1984-12-07 | Composite semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61136252A true JPS61136252A (en) | 1986-06-24 |
Family
ID=17320973
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25849384A Pending JPS61136252A (en) | 1984-12-07 | 1984-12-07 | Composite semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61136252A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6060772A (en) * | 1997-06-30 | 2000-05-09 | Kabushiki Kaisha Toshiba | Power semiconductor module with a plurality of semiconductor chips |
| JP2013247192A (en) * | 2012-05-24 | 2013-12-09 | Nec Access Technica Ltd | Power module |
-
1984
- 1984-12-07 JP JP25849384A patent/JPS61136252A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6060772A (en) * | 1997-06-30 | 2000-05-09 | Kabushiki Kaisha Toshiba | Power semiconductor module with a plurality of semiconductor chips |
| JP2013247192A (en) * | 2012-05-24 | 2013-12-09 | Nec Access Technica Ltd | Power module |
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