JPS61120433A - Die bonding device - Google Patents
Die bonding deviceInfo
- Publication number
- JPS61120433A JPS61120433A JP24194284A JP24194284A JPS61120433A JP S61120433 A JPS61120433 A JP S61120433A JP 24194284 A JP24194284 A JP 24194284A JP 24194284 A JP24194284 A JP 24194284A JP S61120433 A JPS61120433 A JP S61120433A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- data
- information
- die bonding
- identification information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
Abstract
Description
【発明の詳細な説明】
(発明の技術分野〕
本発明は半導体装置をリードフレーム等に固着する半導
体装置のダイボンディング装置に係り、特にダイレクト
ボンディングに適用されるダイボンディング装置に関す
る。DETAILED DESCRIPTION OF THE INVENTION (Technical Field of the Invention) The present invention relates to a die bonding apparatus for a semiconductor device for fixing a semiconductor device to a lead frame or the like, and particularly to a die bonding apparatus applied to direct bonding.
多数の半導体チップが形成された半導体ウェーハから選
択されたチップのみをリードフレーム等に直接固着する
方法を通常ダイレクトボンディングとよんでいる。この
種のダイレクトボンディングに用いられる従来のダイボ
ンディング装置では、ダイボンディング工程の前の電気
的テストの段階で不良チップ上にインク等を用いて印を
付け、このウェーハをウェーハ保持治具に粘着性シート
を用いて固定し、この不良印を検出する手段を持った装
置で順次一つづつ検出して、その結果、チップ位置と良
、不良のデータとを記憶媒体に記録し、後にこのウェー
ハに対応ずけて記録媒体からデータを読み出して良品の
チップのみをダイボンデイングしていた。A method of directly bonding only selected chips from a semiconductor wafer on which a large number of semiconductor chips are formed to a lead frame or the like is usually called direct bonding. In conventional die bonding equipment used for this type of direct bonding, defective chips are marked with ink or the like during the electrical test stage before the die bonding process, and the wafer is placed on a wafer holding jig with an adhesive. The wafer is fixed using a sheet, and the defective marks are detected one by one using a device equipped with a means for detecting the defective marks.As a result, the chip position and data of good and defective chips are recorded on a storage medium, and later transferred to this wafer. Accordingly, data was read from the recording medium and only good chips were die-bonded.
また他の装置では電気的テスト工程では不良チップに刻
印を付けず、直接記憶媒体にチップの位置と良、不良の
データを記録し、ウェーハと記憶媒体内のデータの順序
が入れかわらないように注意しながら記憶媒体からデー
タを読み出す手段を持ったダイボンディング装置に取付
け、記憶媒体内のデータに従って良品のみをダイボンデ
ィングするように構成されていた。Other equipment does not mark defective chips during the electrical testing process, but directly records the chip position and pass/fail data on the storage medium, so that the order of the data on the wafer and on the storage medium is not changed. The device was carefully attached to a die bonding device having means for reading data from the storage medium, and was configured to die bond only non-defective products according to the data in the storage medium.
第3図に前述した従来のダイボンディング装置を示す。FIG. 3 shows the conventional die bonding apparatus mentioned above.
データ記憶媒体1とウェーハマガジン2とを用意し、ウ
ェーハマガジン2内に収納された一検査済ウエーハ10
.11.・・・とこれに対応するデータ記憶媒体1内の
記録データ10a、11a。A data storage medium 1 and a wafer magazine 2 are prepared, and one inspected wafer 10 is stored in the wafer magazine 2.
.. 11. ... and the corresponding recorded data 10a, 11a in the data storage medium 1.
・・・とを対応させながらダイボンディング部3により
良品チップのみをダイボンディングする。. . . Only good chips are die-bonded by the die-bonding section 3 while corresponding to...
しかしこのような従来の装置では、ウェーハとデータと
の対応は電気テストを実施した順序がわかるようにその
データをデータ記憶媒体1に書き込み、この順序にウェ
ーハをダイボンディング装置にかけなければならない。However, in such conventional equipment, the correspondence between wafers and data requires that the data be written on the data storage medium 1 so that the order in which the electrical tests were performed can be known, and that the wafers be run through the die bonding equipment in this order.
したがって電気的テストを実施した後、ダイボンディン
グするまでの間にいくつかの工程やこれらの工程間の搬
送をおこなうざいにウェーハの順序が変わらないように
常に留意して管理しなければならない。したがって従来
のダイボンディング装置を用いる場合には、このような
点で作業の効率とその信頼性が悪く、特に不良印を付け
ないでダイボンディングをおこなう装置にあっては、ウ
ェーハの順序の入れ替りがあるかどうかを目視によって
発見することは不可能であった。Therefore, care must always be taken to ensure that the order of the wafers does not change due to several processes or transportation between these processes after electrical testing and before die bonding. Therefore, when using conventional die bonding equipment, work efficiency and reliability are poor in this respect, and in particular, equipment that performs die bonding without marking defects has the problem of changing the order of wafers. It was impossible to visually detect whether or not it was present.
本発明は上記事情を考慮してなされたもので、データ記
憶媒体内に格納されたチップの位置データおよび良、不
良の電気的特性データとそのデータのもととなったウェ
ーハとの対応を装置内で取ることのできるダイボンディ
ング装置を提供することを目的とする。The present invention has been made in consideration of the above-mentioned circumstances, and is an apparatus that allows correspondence between chip position data and good/bad electrical characteristic data stored in a data storage medium and the wafer that is the source of the data. The purpose of the present invention is to provide a die bonding device that can be used within a factory.
上記目的を達成するために本発明によるダイボンディン
グ装置は、ウェーハ内のチップ位置データと電気特性デ
ータとをウェーハ又はウェーハ保持治具上に記録された
ウェーハ識別データとともに格納したデータ記憶媒体と
、ウェーハ又はウェーハ保持治具から前記ウェーハ識別
データを読み取る識別データ読取部と、この識別データ
読取部で読み取ったウェーハの識別データと前記データ
記憶媒体内のウェーハの識別データとを対応ずけ、その
ウェーハの前記チップ位置データと電気特性データから
所望のデータを選択するデータ選択部とを備え、このデ
ータ選択部からの選択に基づいて所望チップのみをダイ
ボードすることを特徴とする。To achieve the above object, a die bonding apparatus according to the present invention includes a data storage medium storing chip position data and electrical property data within a wafer together with wafer identification data recorded on the wafer or a wafer holding jig; Alternatively, an identification data reading unit reads the wafer identification data from the wafer holding jig, and the wafer identification data read by the identification data reading unit is matched with the wafer identification data in the data storage medium, and the wafer identification data is The present invention is characterized in that it includes a data selection section that selects desired data from the chip position data and electrical characteristic data, and only the desired chips are die-boarded based on the selection from the data selection section.
第1図に本発明の一実施例によるダイボンディング装置
を示す。なお第3図に示した従来の装置と同一部分には
同一符号を付してその説明は省略する。FIG. 1 shows a die bonding apparatus according to an embodiment of the present invention. Components that are the same as those of the conventional device shown in FIG. 3 are designated by the same reference numerals, and their description will be omitted.
本発明による装置に用いられる被試験用ウェーハ7には
第2図(a)に示すようにそのウェーハを識別するため
の記号や番号等がウェーハ識別データ9として刻印され
ている。このウェーハ識別データ9は、ウェーハ7の裏
面やオリエンテーションフラット部に直接刻印してもよ
いが、第2図(b)に示すようにウェーハ7を搭載する
ウェーハ保持冶具6の適当な部分にウェーハ識別データ
8として記載してもよい。このような状態で識別データ
を付けられたウェーハ7がウェーハマガジン2に入れら
れて格納される。As shown in FIG. 2(a), the wafer to be tested 7 used in the apparatus according to the present invention is stamped with symbols, numbers, etc. as wafer identification data 9 for identifying the wafer. This wafer identification data 9 may be directly engraved on the back surface or orientation flat part of the wafer 7, but as shown in FIG. It may be written as data 8. In this state, the wafer 7 with identification data attached thereto is placed in the wafer magazine 2 and stored.
またデータ記憶媒体1内にはウェーハごとの電気的テス
トのデータがウェーハの識別データとともにデータ10
a、11a、・・・として格納されている。ウェーハマ
ガジン2から取出されるウェーハは識別データ読取部4
において、ウェーハ7あるいはウェーハ保持冶具6上に
刻印された識別データが読み取られる。Also, in the data storage medium 1, electrical test data for each wafer is stored in data 10 along with wafer identification data.
They are stored as a, 11a, . The wafer taken out from the wafer magazine 2 is read by the identification data reading section 4.
At this step, the identification data stamped on the wafer 7 or the wafer holding jig 6 is read.
一方データ記憶媒体1にはデータ選択部5が接続されて
おり、このデータ選択部5では識別データ読取部4から
の情報に基づき、データ記憶媒体1から同一のウェーハ
の識別データを持つデータのみを選択して読み出し、こ
れをダイボンディング部3に送る。ダイボンディング部
3はこのデータにしたがってダイボンディングをおこな
う。On the other hand, a data selection section 5 is connected to the data storage medium 1, and the data selection section 5 selects only data having identification data of the same wafer from the data storage medium 1 based on information from the identification data reading section 4. It selects, reads, and sends it to the die bonding section 3. The die bonding section 3 performs die bonding according to this data.
なおデータ記憶媒体1としてはフロッピーディスクが一
般的であるが、半導体メモリや磁気テープ等を用いるこ
とも可能である。このように本発明によるダイボンディ
ング装置のデータ記憶媒体内に、チップ位置データと電
気特性データとともにウェーハの識別データとを格納し
ているため、識別データ読取部4によってウェーハマガ
ジン2内のウェーハ識別データが読み取られると、これ
に対応したウェーハのチップ位置データと電気特性デー
タとを選択してデータ選択部5で読み出すことができる
。Although a floppy disk is generally used as the data storage medium 1, it is also possible to use a semiconductor memory, a magnetic tape, or the like. Since the data storage medium of the die bonding apparatus according to the present invention stores the wafer identification data together with the chip position data and the electrical property data, the identification data reading section 4 reads the wafer identification data in the wafer magazine 2. Once read, the corresponding wafer chip position data and electrical characteristic data can be selected and read out by the data selection unit 5.
(発明の効果〕
このように本発明によるダイボンディング装置を用いれ
ば、ウェーハとそのウェーハの電気的テストの結果であ
るチップ位置および電気特性データとを容易に対応させ
ることができるため、テスト工程からダイボンディング
工程までの間にいくつかの作業が実施されても、ウェー
ハの順序が変わってしまうことに注意をす゛る必要が無
くなる。(Effects of the Invention) As described above, by using the die bonding apparatus according to the present invention, it is possible to easily match a wafer with the chip position and electrical characteristic data that are the results of the electrical test of the wafer, so that Even if several operations are performed before the die bonding process, there is no need to worry about changing the order of the wafers.
またウェーハ表面に不良印を刻印していなくても容易に
データとの対応が取れることから、ウェーハの順番の入
れ変わりによって発生していた良品、不良品の判別が不
可能になるということが全く無くなる。Furthermore, since it is possible to easily match the data even if there is no defect mark engraved on the wafer surface, it is no longer possible to distinguish between good and defective products, which was caused by changing the order of the wafers. It disappears.
このように本発明によるダイボンディング装置を用いれ
ばウェーハの電気的テストの結果と実際のウェーハの結
果の対応が確実になり電−気的テスト工程とダイボンデ
ィング工程との1でのウェーハの取扱いを簡略化するこ
とができるためウェ゛−ハブロセスの効率を大幅に向上
させることができるという利点がある。As described above, by using the die bonding apparatus according to the present invention, the correspondence between the electrical test results of the wafer and the results of the actual wafer can be ensured, and the handling of the wafer in the electrical test process and the die bonding process can be improved. There is an advantage that the efficiency of the wafer process can be greatly improved because it can be simplified.
第1図は本発明の一実施例によるダイボンディング装置
を示す概念図、第2図(a)、(b)は本発明に用いる
ウェーハおよびウェーハ保持治具にウェーハの識別デー
タを刻印した状態を示す図、第3図は従来のダイボンデ
ィング装置を示す概念図である。
1・・・データ記憶媒体、2・・・ウェーハマガジン、
3・・・ダイボンディング部、4・・・識別データ読取
部、5・・・データ選択部、6・・・ウェーハ保持治具
、7・・・ウェーハ、8,9・・・ウェーハ識別データ
。
出願人代理人 猪 股 清
(b)(α)FIG. 1 is a conceptual diagram showing a die bonding apparatus according to an embodiment of the present invention, and FIGS. 2(a) and 2(b) show a state in which wafer identification data is engraved on a wafer and a wafer holding jig used in the present invention. The figure shown in FIG. 3 is a conceptual diagram showing a conventional die bonding apparatus. 1... data storage medium, 2... wafer magazine,
3... Die bonding section, 4... Identification data reading section, 5... Data selection section, 6... Wafer holding jig, 7... Wafer, 8, 9... Wafer identification data. Applicant's agent Kiyoshi Inomata (b) (α)
Claims (1)
ウェーハ又はウェーハ保持治具上に記録されたウェーハ
識別データとともに格納したデータ記憶媒体と、 ウェーハ又はウェーハ保持治具から前記ウェーハ識別デ
ータを読み取る識別データ読取部と、この識別データ読
取部で読み取ったウェーハの識別データと前記データ記
憶媒体内のウェーハの識別データとを対応づけ、そのウ
ェーハの前記チップ位置データと電気特性データから所
望のデータを選択するデータ選択部と を備え、このデータ選択部からの選択に基づいて所望チ
ップのみをダイボンドすることを特徴とするダイボンデ
ィング装置。[Scope of Claims] A data storage medium storing chip position data and electrical property data within a wafer together with wafer identification data recorded on a wafer or a wafer holding jig; An identification data reading unit reads data, and the identification data of the wafer read by the identification data reading unit is associated with the identification data of the wafer in the data storage medium, and the desired data is obtained from the chip position data and electrical property data of the wafer. What is claimed is: 1. A die bonding apparatus comprising: a data selection section for selecting data; and die-bonding only desired chips based on selections from the data selection section.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24194284A JPS61120433A (en) | 1984-11-16 | 1984-11-16 | Die bonding device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24194284A JPS61120433A (en) | 1984-11-16 | 1984-11-16 | Die bonding device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61120433A true JPS61120433A (en) | 1986-06-07 |
Family
ID=17081856
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP24194284A Pending JPS61120433A (en) | 1984-11-16 | 1984-11-16 | Die bonding device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61120433A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6703573B2 (en) | 1997-01-17 | 2004-03-09 | Micron Technology, Inc. | Method for sorting integrated circuit devices |
US7738988B2 (en) | 1997-03-24 | 2010-06-15 | Micron Technology, Inc. | Process and method for continuous, non lot-based integrated circuit manufacturing |
US7885782B2 (en) | 1997-02-26 | 2011-02-08 | Micron Technology, Inc. | Method in an integrated circuit (IC) manufacturing process for identifying and redirecting ICs mis-processed during their manufacture |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5939039A (en) * | 1982-08-26 | 1984-03-03 | Nec Home Electronics Ltd | Manufacture of semiconductor device |
JPS59136942A (en) * | 1983-01-26 | 1984-08-06 | Mitsubishi Electric Corp | Acceptable chip selecting device |
-
1984
- 1984-11-16 JP JP24194284A patent/JPS61120433A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5939039A (en) * | 1982-08-26 | 1984-03-03 | Nec Home Electronics Ltd | Manufacture of semiconductor device |
JPS59136942A (en) * | 1983-01-26 | 1984-08-06 | Mitsubishi Electric Corp | Acceptable chip selecting device |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6703573B2 (en) | 1997-01-17 | 2004-03-09 | Micron Technology, Inc. | Method for sorting integrated circuit devices |
US7885782B2 (en) | 1997-02-26 | 2011-02-08 | Micron Technology, Inc. | Method in an integrated circuit (IC) manufacturing process for identifying and redirecting ICs mis-processed during their manufacture |
US7738988B2 (en) | 1997-03-24 | 2010-06-15 | Micron Technology, Inc. | Process and method for continuous, non lot-based integrated circuit manufacturing |
US8315730B2 (en) | 1997-03-24 | 2012-11-20 | Micron Technology, Inc. | Methods for non lot-based integrated circuit manufacturing |
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