JPS61108172A - 薄膜トランジスタの製造方法 - Google Patents

薄膜トランジスタの製造方法

Info

Publication number
JPS61108172A
JPS61108172A JP59230705A JP23070584A JPS61108172A JP S61108172 A JPS61108172 A JP S61108172A JP 59230705 A JP59230705 A JP 59230705A JP 23070584 A JP23070584 A JP 23070584A JP S61108172 A JPS61108172 A JP S61108172A
Authority
JP
Japan
Prior art keywords
gate insulating
insulating film
thin film
semiconductor layer
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59230705A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0578948B2 (https=
Inventor
Koji Nomura
幸治 野村
Masaharu Terauchi
正治 寺内
Kuni Ogawa
小川　久仁
Atsushi Abe
阿部　惇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59230705A priority Critical patent/JPS61108172A/ja
Publication of JPS61108172A publication Critical patent/JPS61108172A/ja
Publication of JPH0578948B2 publication Critical patent/JPH0578948B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/675—Group III-V materials, Group II-VI materials, Group IV-VI materials, selenium or tellurium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
    • H10D30/6739—Conductor-insulator-semiconductor electrodes
JP59230705A 1984-11-01 1984-11-01 薄膜トランジスタの製造方法 Granted JPS61108172A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59230705A JPS61108172A (ja) 1984-11-01 1984-11-01 薄膜トランジスタの製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59230705A JPS61108172A (ja) 1984-11-01 1984-11-01 薄膜トランジスタの製造方法

Publications (2)

Publication Number Publication Date
JPS61108172A true JPS61108172A (ja) 1986-05-26
JPH0578948B2 JPH0578948B2 (https=) 1993-10-29

Family

ID=16912019

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59230705A Granted JPS61108172A (ja) 1984-11-01 1984-11-01 薄膜トランジスタの製造方法

Country Status (1)

Country Link
JP (1) JPS61108172A (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0534530A3 (en) * 1991-09-23 1996-08-28 Koninkl Philips Electronics Nv Method of manufacturing a device whereby a substance is implanted into a body
EP1005073A1 (en) * 1998-11-27 2000-05-31 Murata Manufacturing Co., Ltd. Method of forming dielectric thin film pattern and method of forming laminate pattern comprising dielectric thin film and conductive thin film

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0534530A3 (en) * 1991-09-23 1996-08-28 Koninkl Philips Electronics Nv Method of manufacturing a device whereby a substance is implanted into a body
EP1005073A1 (en) * 1998-11-27 2000-05-31 Murata Manufacturing Co., Ltd. Method of forming dielectric thin film pattern and method of forming laminate pattern comprising dielectric thin film and conductive thin film

Also Published As

Publication number Publication date
JPH0578948B2 (https=) 1993-10-29

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees