JPS609429B2 - How to control cycloconverter - Google Patents

How to control cycloconverter

Info

Publication number
JPS609429B2
JPS609429B2 JP15953780A JP15953780A JPS609429B2 JP S609429 B2 JPS609429 B2 JP S609429B2 JP 15953780 A JP15953780 A JP 15953780A JP 15953780 A JP15953780 A JP 15953780A JP S609429 B2 JPS609429 B2 JP S609429B2
Authority
JP
Japan
Prior art keywords
power
circuit
converter
cycloconverter
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15953780A
Other languages
Japanese (ja)
Other versions
JPS5785580A (en
Inventor
俊昭 奥山
譲 久保田
潤一 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15953780A priority Critical patent/JPS609429B2/en
Publication of JPS5785580A publication Critical patent/JPS5785580A/en
Publication of JPS609429B2 publication Critical patent/JPS609429B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M5/00Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
    • H02M5/02Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc
    • H02M5/04Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters
    • H02M5/22Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M5/25Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
    • H02M5/27Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means for conversion of frequency
    • H02M5/271Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means for conversion of frequency from a three phase input voltage

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Ac-Ac Conversion (AREA)

Description

【発明の詳細な説明】 本発明はサィクロコンバータの制御方法に係り、特に、
サィクロコンバータを構成する逆並列接続された正逆サ
ィリスタ変換器のそれぞれを、出力電流の極性に応じて
切換えて動作させるための制御方法に関する。
[Detailed Description of the Invention] The present invention relates to a method for controlling a cycloconverter, and in particular,
The present invention relates to a control method for switching and operating each of anti-parallel connected forward and reverse thyristor converters constituting a cycloconverter in accordance with the polarity of an output current.

第1図はサイクロコンバータの主回路部を示す回路図で
ある。
FIG. 1 is a circuit diagram showing the main circuit section of a cycloconverter.

サイクロコンバータの主回路は、正側の切換えを行なう
サィリスタ変換器1及び負側の切換えを行なうサィリス
タ変換器2より成る。
The main circuit of the cycloconverter consists of a thyristor converter 1 for positive side switching and a thyristor converter 2 for negative side switching.

これらを周波数f,の交流電源ACにより一定期間ずつ
交互に変換器1,2を動作させると、交流電源ACと異
なる周波数らの交流電圧が得られる。この周波数変換さ
れた交流電源により負荷である電動機3を駆動する。第
1図においては、各変換器を榛式的に図示しているが、
実際には交流相数分のアームを有している。変換器1,
2は、その点弧位相Qの余弦cosQを正弦波に変化さ
せることにより、その出力電圧を正弦波状に制御するこ
とができるもので、電動機電流も正弦波状となる。
When converters 1 and 2 are operated alternately for a fixed period of time using an AC power supply AC having a frequency f, an AC voltage having a frequency different from that of the AC power supply AC is obtained. The electric motor 3, which is a load, is driven by this frequency-converted AC power source. In Fig. 1, each converter is illustrated schematically, but
Actually, it has arms for the number of AC phases. converter 1,
No. 2 is capable of controlling the output voltage in a sine wave shape by changing the cosine cosQ of the firing phase Q into a sine wave, and the motor current also becomes a sine wave.

ところで、電流の極性が切換わる際には、導適する変換
器1から2、あるいは変換器2から1へと移るため、こ
れに応じて変換器の動作を切換える必要がある。無循環
電流式では、その切換えは一方の電流が消滅してから、
他方の点弧開始を行う必要があり、さもないと両変換器
を介して電源短絡を生じてしまう。それゆえ従来では、
技悪ケースを見込んで、切換時間(両変換器の出力電流
を零に保持する期間)を十分長く設定する必要があった
。しかしながらこの結果として、出力電流が零を過ぎる
際において、電流寮期間が長くなるため、電流波形が正
弦波から歪むようになる。特に、出力周波数が高い場合
は、電流零期間の出力電流の一周期に占める割合が長く
なるため波形歪が増大し、そのため電動機のトルクリプ
ルが問題となる場合が生じる。特に、圧延関係では交流
モータに対しても直流モー夕なみの低リプルが要求され
る場合があり、このような要求の対しては高速度の切換
えが要求される。本発明の目的は、切換え時間を最短に
しながら電流短絡の生じないサィクロコンバータの制御
方法を提供するにある。
By the way, when the polarity of the current is switched, it is transferred from the appropriate converter 1 to 2 or from converter 2 to 1, so it is necessary to switch the operation of the converter accordingly. In the non-circulating current type, the switching occurs after one current disappears.
It is necessary to initiate the other ignition, otherwise a short circuit would occur across both converters. Therefore, conventionally,
It was necessary to set the switching time (the period during which the output currents of both converters are held at zero) to be sufficiently long to take into account cases of bad technique. However, as a result of this, when the output current passes through zero, the current waveform becomes distorted from a sine wave because the current period becomes longer. In particular, when the output frequency is high, the proportion of the zero current period in one cycle of the output current becomes longer, resulting in increased waveform distortion, which may cause problems with motor torque ripple. Particularly in the rolling industry, there are cases where an AC motor is required to have as low ripple as a DC motor, and to meet such requirements, high-speed switching is required. SUMMARY OF THE INVENTION An object of the present invention is to provide a method for controlling a cycloconverter that does not cause current short circuits while minimizing switching time.

この目的を達成するために本発明は、切換後に導通すべ
きサィリスタ変換器の制御遅れ角Qを当該変換器の点弧
開始直前から所定時間の間において所定値以上に保つよ
うにしたものである。
In order to achieve this object, the present invention maintains the control delay angle Q of the thyristor converter to be made conductive after switching to a predetermined value or more for a predetermined period of time from immediately before the start of ignition of the converter. .

実施例の説明の前に本発明の原理について説明する。電
源短絡が生じるケースとしては、時間の経過と共に電流
が零になるべき一方の変換器に電流が流れている間に、
次に導通すべき他方の変換器が点弧するときであり、こ
れは希に生ずるケースであるが、変換器の電流が零であ
ることを検出する際の不確実さに基づいて起りうるもの
である。このように、電源短絡は、一方の変換器からも
う一方の変換器に動作を移す際において、次に導通すべ
き変換器のゲート遮断が解かれる時点において発生する
Before explaining the embodiments, the principle of the present invention will be explained. A power supply short circuit occurs when current is flowing through one converter, which should become zero over time.
The next time the other transducer should conduct fires, which is a rare but possible occurrence based on the uncertainty in detecting zero current in the transducer. It is. Thus, a power supply short circuit occurs when the gate of the next converter to be turned on is removed when operation is transferred from one converter to another.

電源短絡が生じると、変換器1,2のサィリスタを通し
て電源線間が短絡される形となり、その閉回路と過大な
電流が流れる。しかし検討の結果、発明者らは次の事実
を把握した。すなわち、次に導通すべき変換器のゲート
遮断を解く際において、その変換器の制御遅れ角Qが9
0度のように大きな値であれば、万一電源短絡が生じて
も短絡開回路に大きな電流は流れないこと、逆にQが3
0度のように小さな値であれば、最初の点弧によって過
電流が発生し、ヒューズの溶断等が起りうろことである
。第2図a,b,c,d、第3図、第4図の各々は以上
の事実を具体的に説明するための説明図である。
When a short circuit occurs in the power supply, the power supply lines are short-circuited through the thyristors of the converters 1 and 2, and an excessive current flows through the closed circuit. However, as a result of study, the inventors found the following fact. That is, when releasing the gate cutoff of the converter to be turned on next, the control delay angle Q of that converter is 9.
A large value such as 0 degrees means that even if a short circuit occurs in the power supply, no large current will flow in the shorted open circuit; conversely, if Q is 3
If the value is as small as 0 degrees, the initial ignition will generate an overcurrent, which may cause the fuse to blow. Each of FIGS. 2a, b, c, and d, FIG. 3, and FIG. 4 is an explanatory diagram for specifically explaining the above facts.

第2図a,b,c,dは、三相交流電源からこれとは異
なる周波数の単相交流を得るサィクロコンバータの主回
路であって、正側変換器の電流が流れ続けている期間中
に、逆側変換器のゲート・サプレスが解除されその点弧
が開始された場合の、短絡モードを示す。
Figure 2 a, b, c, and d are the main circuits of a cycloconverter that obtains single-phase AC at a different frequency from a three-phase AC power supply, and the period during which the current in the positive converter continues to flow. In the figure, the short-circuit mode is shown when the gate suppression of the reverse transducer is released and its firing is initiated.

第2図a,bはサィリスタRPとTN′の導通によって
作られる短絡回路(図示破線)を、第2図c,dはサィ
リス夕TNとSP′の導通によって作られる短絡回路を
各々示している。第2図b及びdは時間経過後の電流循
環を示している。その時のサィリスタ導適期間及び各短
絡回路が生じる期間を示したのが第3図a,b,cであ
る(但し、重なりを無視)。第3図aはサィリスタ導適
期間を示し、第3図bは電源相電圧でRP〜TP及びR
N′〜TN′の導適状態を示し、第3図cは同相に電源
相電圧を示すがRN〜TN及びRP′〜TPの導適状態
を示している。短絡電流は、短絡回路に含まれる電源電
圧によって流れトまた短絡防止用の直流リアクトル及び
交流電源のリアクタンスが、その立上りを抑制する。し
たがって、短絡電流の大きさは短絡回路に作用する電源
電圧の時間積分量に比例する。第3図b,cにおけるハ
ッチングした面積がこの電圧時間積分量に比例し、図/
示由は短絡回路に含まれる二つの交流電源、の差が正の
ときであって短絡電流が正弦波的に変化する場合に増加
する方向の短絡電流を流せる電圧、図示eは短絡回路に
含まれる二つの交流電源の差が負のときであって短絡電
流が正弦波的に変化する場合に減少する方向の短絡電流
を流せる電圧であることを示す。第3図各図は、正側変
換器の点弧位相角QF=150度の状態でゲ−ト遮断が
行われ、正側電流が消滅しない間に逆側変換器が点弧位
相角QR=90度で点弧開始された場合を示している。
このときはeのものが先行するか、あるいは由が先行し
ても次に大きなeが現われるため、短絡がたとえ生じた
としても、速やかに電流は消滅し、短絡が回復すること
を示している。一方、第4図a,b,cは、前述と同様
QF=150度でゲート遮断が行われ、正側電流が消滅
しない間に逆側変換器がQR=30度で点弧開始された
場合を示す。
Figures 2a and 2b show short circuits (dashed lines in the figure) created by conduction between thyristors RP and TN', and Figures 2c and d show short circuits created by conduction between thyristors TN and SP', respectively. . Figures 2b and 2d show the current circulation over time. FIGS. 3a, b, and c show the thyristor conduction period and the period in which each short circuit occurs at that time (however, overlapping is ignored). Figure 3a shows the thyristor conduction period, and Figure 3b shows the power supply phase voltage from RP to TP and R.
The conductive state of N' to TN' is shown, and FIG. 3c shows the conductive state of RN to TN and RP' to TP, although FIG. The short-circuit current flows due to the power supply voltage included in the short-circuit, and the short-circuit prevention DC reactor and the reactance of the AC power supply suppress its rise. Therefore, the magnitude of the short circuit current is proportional to the time-integrated amount of the power supply voltage acting on the short circuit. The hatched areas in Fig. 3b and c are proportional to this voltage-time integral, and the
The reason for this is when the difference between the two AC power supplies included in the short circuit is positive, and when the short circuit current changes in a sinusoidal manner, the voltage that allows the short circuit current to flow in the direction of increasing, e is included in the short circuit. When the difference between the two AC power sources is negative and the short circuit current changes in a sinusoidal manner, it indicates that the voltage is such that the short circuit current can flow in a decreasing direction. Each figure in Figure 3 shows that the gate is shut off when the firing phase angle QF of the positive side converter is 150 degrees, and that the reverse side converter is firing at the firing phase angle QR = 150 degrees while the positive side current does not disappear. The case where ignition is started at 90 degrees is shown.
In this case, either e comes first, or even if reason comes first, the next largest e appears, so even if a short circuit occurs, the current quickly disappears and the short circuit is recovered. . On the other hand, Fig. 4 a, b, and c show the case where the gate is cut off at QF = 150 degrees as described above, and the reverse side converter starts firing at QR = 30 degrees before the positive side current disappears. shows.

この場合は■が先行し、しかもそれが大のため過大な短
絡電流が発生する。以上が点弧角につて前述した差異の
生じる理由である。そこで本発明では、次のようにして
過電流の発生を防止する。即ち、変換器のゲート遮断を
解く際に、この変換器の制御遅れ角Qがある値以下とな
らないよう制限を加え最初の点弧を行う。このとき、第
5図aのように電源短絡が生じるケースであれば、すで
に非導通であるべき変換器(ゲート信号は遮断されてい
る)にある程度の電流が流れることになるから、このこ
とを検知し、ゲート遮断を解除した側の変換器の点狐位
相を十分大きな値、例えば150度となるよう制御する
か(以下、ゲートシフト)、あるいはその変換器を再度
ゲート遮断する。このようにして、短絡開回路の電流を
速やかに消滅させることができる。一方、第5図bのよ
うに電源短絡が生じないケースでは、すでに非導通であ
るべき変換器には電流が流れることはないから、このこ
とを検知し、それ以後は前述した制御遅れ角Qの制限を
解き、本来の動作を行わせる。
In this case, ■ precedes, and because it is large, an excessive short-circuit current occurs. This is the reason for the above-mentioned difference in firing angle. Therefore, in the present invention, the occurrence of overcurrent is prevented in the following manner. That is, when the gate of the converter is released, a restriction is imposed so that the control delay angle Q of the converter does not become less than a certain value, and the first ignition is performed. At this time, if a short circuit occurs in the power supply as shown in Figure 5a, a certain amount of current will flow through the converter, which should already be non-conducting (the gate signal is cut off), so this should be considered. Either the phase of the converter on the side whose gate has been detected and whose gate has been released is controlled to a sufficiently large value, for example, 150 degrees (hereinafter referred to as gate shift), or the gate of that converter is shut off again. In this way, the current in the short-circuit open circuit can be quickly extinguished. On the other hand, in the case where a power supply short circuit does not occur as shown in Figure 5b, no current flows through the converter, which should already be non-conducting, so this is detected and from then on, the control delay angle Q Remove the restrictions and allow the device to perform its intended actions.

第6図は本発明の実施例を示すブロック図である。FIG. 6 is a block diagram showing an embodiment of the present invention.

第6図の実施例においては、第1図の主回路構成に本発
明を適用した例を示している。第6図において、制御装
置は前段からの電流指令信号(正弦波信号)と電流検出
器5の出力信号の偏差を増中する電流偏差増中器4、該
増中器4の出力信号とバイアス設定器8からの信号を論
理和回路22の信号に応じて選択し出力する切換回路6
,7、論理回路18からの信号が発せられる間は切換回
路6,7からの信号の上限を制限するリミッタ回路9,
10、譲りミッタ回路9,10からの信号に応じてサィ
リスタ変換器1,2の点弧位相を制御するための自動パ
ルス移相器1 1,12、フリップフロツブ回路17か
らの信号に応じて自動パルス移相器11,12の出力信
号を通過又は遮断するスイッチ回路13,14、電流指
令信号の極性を判別する極性判別回路15、電流寮検出
回路16、電流指令の樋性反転と電流零のAND条件に
より出力信号が切換わるフリップフロップ回路17、電
流指令の樋性反転からフリップフロップ回路17の出力
信号が切換るまでの間は切換回路6,7がバイアス設定
器8の信号を選択し出力するように信号を発し、また、
該信号が消滅する時刻から所定時間の間はリミッタ回路
9,10が動作するように信号を発する論理回路18、
変換器1,2の入力電流を検出する電流検出器19,2
0、変換器1のゲート信号を遮断中に変換器1に電流が
流れる場合、あるいは変換器2にゲート信号が供給され
る期間中に変換器1に電流が流れる場合、及び変換器2
のゲート信号を遮断中に変換器2に電流が流れる場合、
あるいは変換器1にゲート信号が供給される期間中に変
換器2に電流が流れる場合において信号を発する電源短
絡検出回路21、該検出回路21および論理回路18か
らの信号の論理和を出力する論理和回路22、検出回路
21から信号が発せられた際、変換器1,2のゲート信
号を遮断するようにフリツプフロップ回路17からの信
号を遮断するスイッチ回路23,24より成る。
The embodiment shown in FIG. 6 shows an example in which the present invention is applied to the main circuit configuration shown in FIG. In FIG. 6, the control device includes a current deviation intensifier 4 that increases the deviation between the current command signal (sine wave signal) from the previous stage and the output signal of the current detector 5, and the output signal of the intensifier 4 and the bias A switching circuit 6 that selects and outputs the signal from the setter 8 according to the signal from the OR circuit 22.
, 7, a limiter circuit 9 that limits the upper limit of the signals from the switching circuits 6 and 7 while the signal from the logic circuit 18 is being issued;
10. Automatic pulse phase shifter 1 for controlling the firing phase of the thyristor converters 1, 2 in response to signals from yield transmitter circuits 9, 10. 1, 12, in response to signals from flip-flop circuit 17. Switch circuits 13 and 14 that pass or block the output signals of the automatic pulse phase shifters 11 and 12, a polarity determination circuit 15 that determines the polarity of the current command signal, a current detection circuit 16, and current command reversal and current zero. The flip-flop circuit 17 whose output signal is switched according to the AND condition of signal to output, and
a logic circuit 18 that issues a signal so that the limiter circuits 9 and 10 operate for a predetermined period of time from the time when the signal disappears;
Current detectors 19 and 2 that detect input currents of converters 1 and 2
0, when current flows through converter 1 while the gate signal of converter 1 is cut off, or when current flows through converter 1 during the period when the gate signal is supplied to converter 2, and when converter 2
If current flows through converter 2 while the gate signal is cut off,
Alternatively, a power supply short circuit detection circuit 21 that issues a signal when current flows through the converter 2 during a period when a gate signal is supplied to the converter 1, and a logic that outputs the logical sum of the signals from the detection circuit 21 and the logic circuit 18. It consists of switch circuits 23 and 24 that cut off the signal from the flip-flop circuit 17 so as to cut off the gate signals of the converters 1 and 2 when a signal is issued from the sum circuit 22 and the detection circuit 21.

以上の構成による本発明の実施例の動作を次に説明する
The operation of the embodiment of the present invention having the above configuration will be described next.

先ず、電流偏差増幅器4は電流指令信号(正弦波)と、
電流検出信号の偏差に応じた信号を出力し、また自動パ
ルス移相器11,12にはこの信号に応じて変換器1,
2の点弧位相を制御することから、変換器の出力電流は
電流指令に比例するよう正弦波状に制御される。
First, the current deviation amplifier 4 receives a current command signal (sine wave),
A signal corresponding to the deviation of the current detection signal is output, and the automatic pulse phase shifters 11 and 12 are outputted according to this signal.
Since the ignition phase of No. 2 is controlled, the output current of the converter is controlled in a sinusoidal manner so as to be proportional to the current command.

本発明の対象とする正逆切換時の動作を説明する。電流
指令の磁性が反転すると、そのことが樋性判別回路15
からフリップフロップ回路17に伝えられる。
The operation at the time of forward/reverse switching, which is the object of the present invention, will be explained. When the magnetism of the current command is reversed, this indicates that the gutter discrimination circuit 15
from there to the flip-flop circuit 17.

しかし変換器の電流が零となるまではフリツプフロツプ
回路17の出力信号はそのままで反転することがない。
この期間であることを論理回路18で検知し、信号を論
理和路22を介して切換回路6,7に加える。すると、
切換回路6,7はバイアス設定器8の信号を選択し、自
動パルス移相器11,2に加えるため、導適している変
換器の点弧位相は十分大きな値となるようゲートシフト
される。これにより変換器の電流は急速に消滅する。す
ると電流零検出回路16から信号が発せられるため、フ
リツプフロツプ回路17の出力信号は反転する。これに
伴い、論理回路18から切換回路6,7に加えられた信
号は消滅するが、同時にこれ以後所定の時間、論理回路
18からリミツタ回路9,1川こ信号が送られる。この
結果、増中器4の出力信号は切換回路6,7を通るが、
リミッタ回路9,10が動作するため、その大きさ(c
osQ相当)は上限値が制限されて自動パルス移相器1
1,12に加えられる。一方、フリツプフロツブ回路1
7の出力信号が反転したことから、スイッチ回路13,
14の動作が反転し、それまで導適していた側の変換器
はゲ−ト遮断が行われ、次に導通すべき側はゲート遮断
が解除される。このようにして、次に導通すべき変換器
は、制御遅れ角Qがある値より大きな値を保って点弧開
始される。ここで、もし電源短絡が起るケースであれば
、非導通であるべき変換器に電流が流れることとなるた
め、そのことを電源短絡検出回路21で検出する。
However, until the current in the converter becomes zero, the output signal of the flip-flop circuit 17 remains unchanged and is not inverted.
The logic circuit 18 detects this period and applies a signal to the switching circuits 6 and 7 via the OR path 22. Then,
The switching circuits 6, 7 select the signal of the bias setter 8 and apply it to the automatic pulse phase shifters 11, 2, so that the firing phase of the suitable transducer is gate shifted to a sufficiently large value. This causes the converter current to dissipate rapidly. Then, since a signal is generated from the current zero detection circuit 16, the output signal of the flip-flop circuit 17 is inverted. Accordingly, the signal applied from the logic circuit 18 to the switching circuits 6 and 7 disappears, but at the same time, a signal is sent from the logic circuit 18 to the limiter circuits 9 and 1 for a predetermined period of time. As a result, the output signal of the multiplier 4 passes through the switching circuits 6 and 7,
Since the limiter circuits 9 and 10 operate, their size (c
(equivalent to osQ) has a limited upper limit and cannot be used as an automatic pulse phase shifter 1.
Added to 1 and 12. On the other hand, flip-flop circuit 1
Since the output signal of 7 has been inverted, the switch circuits 13,
The operation of step 14 is reversed, and the gate of the converter on the side that was previously suitable for conduction is cut off, and the gate cutoff of the side that should be made conductive next is released. In this way, the transducer to be turned on next is started with the control delay angle Q maintained at a value greater than a certain value. Here, if a power supply short circuit occurs, current will flow through the converter which should be non-conductive, and this is detected by the power supply short circuit detection circuit 21.

この検出は、フリツプフロップ回路17と電流検出器1
9,20との信号に基づいて、ゲート遮断期間中に電流
が流れるか否かを判断して行う。このようにして電源短
絡が検出されると、その信号を論理和回路22を介して
切換回路6,7に伝え、該切換回路の出力信号をバイア
ス設定器8からの信号に切換えてゲートシフトを行わせ
る。この結果、短絡閉回路の電流は速やかに減少し消滅
する。このため、過電流の発生は防止される。同様のこ
とはゲートシフトによらずとも、ゲート遮断によっても
可能である。
This detection is performed by the flip-flop circuit 17 and the current detector 1.
Based on the signals 9 and 20, it is determined whether or not current flows during the gate cutoff period. When a power supply short circuit is detected in this way, the signal is transmitted to the switching circuits 6 and 7 via the OR circuit 22, and the output signal of the switching circuit is switched to the signal from the bias setting device 8 to perform gate shift. Let it happen. As a result, the current in the shorted closed circuit quickly decreases and disappears. Therefore, occurrence of overcurrent is prevented. The same thing can be done not only by gate shifting but also by gate blocking.

その場合は第6図に破線で示すように、検出回路21の
信号をスイッチ回路23,24に加え、フリップフロッ
プ回路17の出力信号を両方とも遮断するようにしてゲ
ート遮断が行なわれる。電源短絡の回復後は、そのまま
運転停止させるかあるいは自動復帰させることができる
In that case, as shown by the broken line in FIG. 6, the gate is cut off by applying the signal from the detection circuit 21 to the switch circuits 23 and 24 and cutting off both output signals from the flip-flop circuit 17. After the power supply short circuit is recovered, the operation can be stopped or automatically restarted.

前者の場合は、検出回路21の内に記憶要素を設けてお
き、電源短絡を検出したならば、検出回路の出力信号が
そのまま保持されるよう構成することで実現される。後
者の場合は、電源短絡の回復が検出されたならば、基本
的にはゲートシフトおよび遮断を解除するが、安全をみ
てすぐ解除することはやめ、所定の時間の後に解除する
。このためには、検出回路21の内に時間遅れ要素を設
けておき、短絡回復後一定時間は信号を出し続けるよう
検出回路21を構成することで実現される。なお、図示
は省略してあるが、検出回路21の出力信号は他の相の
ものと連系をとり、ある一相で電源短絡が検出されたな
らば、他の全ての相の電流が同時に零となるように動作
が行われるよう構成されている。一方、電源短絡が生じ
ないケースであれば、検出回路21からは信号は発せら
れることはない。
The former case is realized by providing a storage element in the detection circuit 21 and configuring the output signal of the detection circuit to be held as is when a power supply short circuit is detected. In the latter case, once recovery from the power supply short circuit is detected, the gate shift and cutoff are basically canceled, but for safety reasons, the gate shift and cutoff are not canceled immediately, but are canceled after a predetermined period of time. This can be achieved by providing a time delay element in the detection circuit 21 and configuring the detection circuit 21 to continue outputting a signal for a certain period of time after the short circuit is recovered. Although not shown in the figure, the output signal of the detection circuit 21 is interconnected with those of other phases, and if a power supply short circuit is detected in one phase, the currents of all other phases are simultaneously The structure is such that the operation is performed so that the value becomes zero. On the other hand, if a power supply short circuit does not occur, the detection circuit 21 will not emit any signal.

論理回路18からリミッタ回路9,10‘こ加えられた
信号は、所定時間の後に消滅することから、リミッタ回
路9,10の動作は停止し、増中器4の出力信号はその
まま自動パルス移相器11,12に伝えられる。これ以
後は平常の動作が行われる。以上のように動作するので
、万一の電源短絡時にも過電流が流れることはない。
Since the signal applied from the logic circuit 18 to the limiter circuits 9, 10' disappears after a predetermined time, the operation of the limiter circuits 9, 10 is stopped, and the output signal of the multiplier 4 is automatically pulse phase shifted. It is transmitted to the vessels 11 and 12. After this, normal operation is performed. Since it operates as described above, no overcurrent will flow even in the unlikely event of a short circuit in the power supply.

したがって本発明によれば、切換時間を最短に設定した
場合においても、万一の電源短絡に際して過電流が流れ
ることがなく、また電源短絡を安全に回復させることが
できる。
Therefore, according to the present invention, even if the switching time is set to the shortest possible time, no overcurrent will flow in the unlikely event of a short circuit in the power supply, and the short circuit in the power supply can be safely recovered.

なお、前記実施例では、ゲート遮断が解除される際、自
動パルス移相器11,12に加える信号をリミッタ回路
9,10により上限を制限して点弧遅れ角Qがある値よ
り小さくならないよう制限しているが、そのようなもの
に限らず、例えば、ゲート遮断が解除される際は、点弧
角Qがその時点から所定時間は所定値を保って点弧制御
されるようなものでも本発明は適用でき同様の効果が得
られる。
In the above embodiment, when the gate cutoff is released, the upper limit of the signal applied to the automatic pulse phase shifters 11 and 12 is limited by the limiter circuits 9 and 10 so that the firing delay angle Q does not become smaller than a certain value. However, it is not limited to such things, for example, when the gate cutoff is released, the firing angle Q may be controlled to maintain a predetermined value for a predetermined time from that point onwards. The present invention can be applied and similar effects can be obtained.

また、前記実施例ではサィクロコンバータに適用した例
について述べたが、直流電動機を制御するレオナード装
置に適用しても同様の効果が得られる。
Further, in the above embodiment, an example in which the present invention is applied to a cycloconverter has been described, but similar effects can be obtained even if the present invention is applied to a Leonard device that controls a DC motor.

レオナード装置の構成は、サィクロコンバータの−相分
と同一であり、前述と同一の動作を行わせることにより
、電動と回生の切換を速やかに行わせることができる。
The configuration of the Leonard device is the same as the -phase component of the cycloconverter, and by performing the same operation as described above, it is possible to quickly switch between electric power and regeneration.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はサィクロコンバータの主回路部を示す回路図、
第2図a,b,c,d、第3図a,b,cおよび第4図
a,b,cの各々は本発明の原理を示す説明図、第5図
a,bは電源短絡の生じる場合と、生じない場合の動作
説明図、第6図は本発明の実施例を示すブロック図であ
る。 1,2・・・・・・サィリスタ変換器、3・・…・電動
機、4・・・・・・電流偏差増幅器、5・・・・・・電
流検出器、6,7・・・・・・切換回路、8・・・・・
・バイアス設定器、9,10・・・・・・リミツ夕回路
、11,12・・・・・・自動パルス移相器、13,1
4・・・・・・スイッチ回路、15・・・・・・犠牲判
別回路、16・・・・・・電流雲検出回路、17・・・
・・・フリツプフロップ回路、18・・・・・・論理回
路、19,20・・・・・・電流検出器、21・・…・
電源短絡検出9,20・・・・・・電流検出器、21・
・…・電源短絡検出回路、22・・・・・・論理和回路
、23,24…・・・スイッチ回路。 豹′図 希乙図 茶3図 希 々− 図 菟づ図 約る図
Figure 1 is a circuit diagram showing the main circuit of the cycloconverter.
Figure 2 a, b, c, d, Figure 3 a, b, c, and Figure 4 a, b, c are explanatory diagrams showing the principle of the present invention, and Figure 5 a, b are power supply short-circuit diagrams. FIG. 6 is a block diagram illustrating an embodiment of the present invention. 1, 2... Thyristor converter, 3... Electric motor, 4... Current deviation amplifier, 5... Current detector, 6, 7...・Switching circuit, 8...
・Bias setting device, 9, 10...Limit circuit, 11, 12...Automatic pulse phase shifter, 13, 1
4...Switch circuit, 15...Sacrifice discrimination circuit, 16...Current cloud detection circuit, 17...
...Flip-flop circuit, 18...Logic circuit, 19,20...Current detector, 21...
Power supply short circuit detection 9, 20...Current detector, 21.
...Power short circuit detection circuit, 22...OR circuit, 23, 24...Switch circuit. Leopard's figure rare Otsuzu tea 3 figures rare - figure 菟zu fig.

Claims (1)

【特許請求の範囲】 1 制御整流素子で構成してなる電力変換器を2基有し
、これら電力変換器を逆並列接続し、前記逆並列接続さ
れた回路を介して交流電源と負荷とを接続し、これら電
力変換器を交流電源により一定期間ずつ交互に動作させ
、負荷に前記交流電源の周波数と異なる周波数の交流電
力を供給できるサイクロコンバータを制御する方法にお
いて、一方の電力変換器から他方の電力変換器に動作を
移す際に次に導通すべき前記電力変換器の制御遅れ角を
当該電力変換のゲート遮断解除直前から所定時間の間所
定値以上に保つことを特徴とするサイクロコンバータの
制御方法。 2 特許請求の範囲第1項において、前記制御遅れ角は
、90度以上とすることを特徴とするサイクロコンバー
タの制御方法。 3 制御整流素子で構成してなる電力変換器を2基有し
、これら電力変換器を逆並列接続し、前記逆並列接続さ
れた回路を介して交流電源と負荷とを接続し、これら電
力変換器を交流電源により一定期間ずつ交互に動作させ
、負荷に前記交流電源の周波数と異なる周波数の交流電
力を供給できるサイクロコンバータを制御する方法にお
いて、一方の電力変換器から他方の電力変換器に動作を
移す際に次に導通すべき前記電力変換器の制御遅れ角を
当該電力変換のゲート遮断解除直前から所定時間の間所
定値以上に保つと共に、前記所定時間の間における電源
短絡の検出に応じて導通すべき側の前記電力変換器に対
しゲートシフトあるいはゲート遮断を実行することを特
徴とするサイクロコンバータの制御方法。 4 特許請求の範囲第3項において、前記電源短絡の検
出は、前記サイクロコンバータに流入する電流の検出値
に基づくことを特徴とするサイクロコンバータの制御方
法。
[Claims] 1. Two power converters configured with controlled rectifying elements are provided, these power converters are connected in anti-parallel, and an AC power source and a load are connected through the anti-parallel connected circuit. A method for controlling a cycloconverter capable of supplying alternating current power of a frequency different from the frequency of the alternating current power source to a load by alternately operating these power converters for a fixed period of time using an alternating current power source, A cycloconverter characterized in that the control delay angle of the power converter to be turned on next when the operation is transferred to the power converter is maintained at a predetermined value or more for a predetermined period of time from immediately before the gate cutoff of the power converter is released. Control method. 2. A cycloconverter control method according to claim 1, wherein the control delay angle is 90 degrees or more. 3. It has two power converters composed of controlled rectifying elements, these power converters are connected in anti-parallel, and an AC power source and a load are connected through the anti-parallel connected circuit, and these power converters are connected in parallel. In a method of controlling a cycloconverter that can supply alternating current power of a frequency different from the frequency of the alternating current power source to a load by operating the converters alternately for a fixed period of time using an alternating current power source, one power converter operates the other power converter. The control delay angle of the power converter to be turned on next when transferring the power converter is maintained at a predetermined value or more for a predetermined time from immediately before the gate cutoff of the power converter is released, and in response to the detection of a power supply short circuit during the predetermined time. A method for controlling a cycloconverter, characterized in that a gate shift or a gate cutoff is executed for the power converter on the side to be made conductive. 4. The cycloconverter control method according to claim 3, wherein the detection of the power supply short circuit is based on a detected value of a current flowing into the cycloconverter.
JP15953780A 1980-11-14 1980-11-14 How to control cycloconverter Expired JPS609429B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15953780A JPS609429B2 (en) 1980-11-14 1980-11-14 How to control cycloconverter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15953780A JPS609429B2 (en) 1980-11-14 1980-11-14 How to control cycloconverter

Publications (2)

Publication Number Publication Date
JPS5785580A JPS5785580A (en) 1982-05-28
JPS609429B2 true JPS609429B2 (en) 1985-03-09

Family

ID=15695927

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15953780A Expired JPS609429B2 (en) 1980-11-14 1980-11-14 How to control cycloconverter

Country Status (1)

Country Link
JP (1) JPS609429B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3702994B2 (en) * 1999-03-03 2005-10-05 本田技研工業株式会社 Power supply

Also Published As

Publication number Publication date
JPS5785580A (en) 1982-05-28

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