JPS609134A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS609134A
JPS609134A JP58115891A JP11589183A JPS609134A JP S609134 A JPS609134 A JP S609134A JP 58115891 A JP58115891 A JP 58115891A JP 11589183 A JP11589183 A JP 11589183A JP S609134 A JPS609134 A JP S609134A
Authority
JP
Japan
Prior art keywords
pads
package
semiconductor
function
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58115891A
Other languages
Japanese (ja)
Other versions
JPH0763066B2 (en
Inventor
Yoshihiro Takemae
Tomio Nakano
Kimiaki Sato
Masataka Mizukoshi
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58115891A priority Critical patent/JPH0763066B2/en
Publication of JPS609134A publication Critical patent/JPS609134A/en
Publication of JPH0763066B2 publication Critical patent/JPH0763066B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]

Abstract

PURPOSE:To enable to make a contribution to increase cavity to reduce wiring capacitance and the like of the titled semiconductor device by a method wherein a plurality of pads having the same function are provided, and a suitable pad is selected and connected to each package, thereby enabling to make short a lead wire. CONSTITUTION:Each of pads 1-16 has different kind of function respectively, and it is arranged along the two sides of the semiconductor device. Pads 4', 5', 12' and 13' have the function same as that of the pads 4, 5, 12 and 13. Accordingly, when they are mounted on a package, a lead wiring is performed on either of 4 and 4', 5 and 5', 12 and 12', and 13 and 13'. As a pad suitable for a package can be selected as above-mentioned, a lead wiring can be made shorter, thereby enabling to increase the cavity, to contribute reduction in the wiring capacitance and to simplify the performance of a wire bonding.
JP58115891A 1983-06-29 1983-06-29 Semiconductor device Expired - Lifetime JPH0763066B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58115891A JPH0763066B2 (en) 1983-06-29 1983-06-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58115891A JPH0763066B2 (en) 1983-06-29 1983-06-29 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS609134A true JPS609134A (en) 1985-01-18
JPH0763066B2 JPH0763066B2 (en) 1995-07-05

Family

ID=14673749

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58115891A Expired - Lifetime JPH0763066B2 (en) 1983-06-29 1983-06-29 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0763066B2 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6098645A (en) * 1983-11-02 1985-06-01 Mitsubishi Electric Corp Manufacture of ic package
JPS6251231A (en) * 1985-08-30 1987-03-05 Fujitsu Ltd Semiconductor integrated circuit device
US4974053A (en) * 1988-10-06 1990-11-27 Mitsubishi Denki Kabushiki Kaisha Semiconductor device for multiple packaging configurations
US5287000A (en) * 1987-10-20 1994-02-15 Hitachi, Ltd. Resin-encapsulated semiconductor memory device useful for single in-line packages
JP2006286688A (en) * 2005-03-31 2006-10-19 Elpida Memory Inc Semiconductor device
JP2006339338A (en) * 2005-06-01 2006-12-14 Elpida Memory Inc Semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57192046A (en) * 1981-05-21 1982-11-26 Fujitsu Ltd Integrated circuit device
JPS59100550A (en) * 1982-11-30 1984-06-09 Mitsubishi Electric Corp Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57192046A (en) * 1981-05-21 1982-11-26 Fujitsu Ltd Integrated circuit device
JPS59100550A (en) * 1982-11-30 1984-06-09 Mitsubishi Electric Corp Semiconductor device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6098645A (en) * 1983-11-02 1985-06-01 Mitsubishi Electric Corp Manufacture of ic package
JPS6251231A (en) * 1985-08-30 1987-03-05 Fujitsu Ltd Semiconductor integrated circuit device
JPH0455333B2 (en) * 1985-08-30 1992-09-03 Fujitsu Ltd
US5287000A (en) * 1987-10-20 1994-02-15 Hitachi, Ltd. Resin-encapsulated semiconductor memory device useful for single in-line packages
US4974053A (en) * 1988-10-06 1990-11-27 Mitsubishi Denki Kabushiki Kaisha Semiconductor device for multiple packaging configurations
JP2006286688A (en) * 2005-03-31 2006-10-19 Elpida Memory Inc Semiconductor device
JP2006339338A (en) * 2005-06-01 2006-12-14 Elpida Memory Inc Semiconductor device
JP4618598B2 (en) * 2005-06-01 2011-01-26 エルピーダメモリ株式会社 Semiconductor device

Also Published As

Publication number Publication date
JPH0763066B2 (en) 1995-07-05

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