JPS6084878A - Semiconductor device having negative resistance characteristic and manufacture thereof - Google Patents

Abstract

PURPOSE:To enable to suppress the peripheral current component and to obtain the stabler negative resistance characteristic by a method wherein a remarkable difference in the concentration or a concentration gradient is formed to the impurity profile in an epitaxially grown Si semiconductor layer in a Schottky barrier diode. CONSTITUTION:After a thin insulation film 8 is formed on the surface of the epitaxial layer 4, an N<+> type high concentration semiconductor layer 6 is formed by implantation of N type impurity ions in the surface of the epitaxial layer via insulation film. It is possible to form the semiconductor layer 6 at the same time with a collector contact region or an emitter region. After this semiconductor layer is formed, a contact hole 9 of a smaller area than that of the surface of this semiconductor layer is bored in the thin insulation film covering its surface. Thereafter, an electrode material layer 9 for Schottky barrier diode is provided so as to come to junction with this semiconductor layer through this contact hole.

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to a semiconductor device exhibiting negative resistance characteristics and a method for manufacturing the same, and particularly relates to a technique that is effective when incorporated into an LSI (integrated circuit). .

[Background Art] As a semiconductor device exhibiting negative resistance characteristics, PNl)N
Diodes (Japanese Patent Publication No. 33-7573) and PIN diodes (Japanese Patent Publication No. 28-6077) are known. PNPN diode is P-N-P-N 4
The PIN diode is formed by sandwiching one layer (semiconductor layer with sufficiently low impurity concentration) between P-type and N-type semiconductor layers. The present inventor discovered a problem that, because of this structure, this type of element is not compatible with the bipolar LSI manufacturing process and is difficult to incorporate into the LSI circuit vh.

[One aspect of the invention] An object of the present invention is to provide a semiconductor device having negative resistance characteristics that is effective for integration, and in particular can be easily incorporated into a bipolar LSI.

Another object of the present invention is to provide a method for manufacturing a semiconductor device having the above object.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Summary of the Invention] A brief overview of typical inventions disclosed herein is as follows.

That is, a high concentration semiconductor layer having the same conductivity type as the low concentration semiconductor layer and a high impurity concentration is formed on a low concentration semiconductor layer having a low impurity concentration formed on a semiconductor substrate, and An electrode material layer is provided on top of the electrode material layer to be bonded thereto, and a significant concentration difference is formed in the semiconductor profile directly under the bonding surface between the electrode material layer and the high concentration semiconductor layer to provide negative resistance characteristics, thereby integrating the electrode material layer. It facilitates

[Embodiment] FIG. 1 is a cross-sectional structural diagram showing an embodiment of a semiconductor device according to the present invention.

In the figure, 1 is a P-type silicon semiconductor substrate;
An N+ type buried layer 2 and a P+ type semiconductor region 3 serving as a Champorus 1 header are formed on the surface. Semiconductor substrate 1
An N-type epitaxially grown silicon semiconductor layer 4 is formed on the upper buried layer 2 . The semiconductor M4 is composed of an N-type semiconductor layer (low concentration semiconductor layer) 5 having a low impurity concentration of, for example, the lΩ mark or less, and an N1 type semiconductor layer (high concentration semiconductor layer) 6 having a high impurity concentration, and its impurity profile has a significant concentration difference or concentration gradient. The low concentration semiconductor layer 5 forms the lower layer of the semiconductor layer 4, and the high concentration semiconductor layer 6 forms the upper layer. An element isolation insulating film 7 made of 5i02 is formed around the epitaxially grown silicon semiconductor layer 4 to electrically isolate it from other active regions. The semiconductor layer 4 is
This insulating film 7 covers its periphery, and its upper surface, that is, the surface of the second semiconductor layer 6, is covered by a thin insulating film 8 made of 5i02, which is much thinner than this insulating film 7. This thin insulation s8 has a high concentration semiconductor layer 6
A contact 69 smaller in area than the surface of
An electrode material layer 10 for Schott to Kibaria diodes is provided so as to be bonded to the surface of the Schottler-Kivalier diode.

As is clear from the above description of the structure, a Schottky barrier is formed by the junction between the electrode material layer IO and the high concentration semiconductor layer 6, and therefore, the device is basically a Schottky barrier diode (S BD). However, in the above configuration, the current-voltage characteristic exhibits a negative resistance characteristic as shown by the curve (a) in FIG. Note that the 0 curve (b) shows the normal characteristics of SBD.

In the configuration of FIG. 1, the negative resistance characteristic shown in curve (b) of FIG. 2 appears because the impurity concentration of the epitaxially grown silicon semiconductor layer 4 is This is because there is a significant difference in impurity concentration in the profile. This was clarified by the following experimental results conducted by the inventor. That is, in FIG. 1, the high concentration semiconductor layer 6 is given a high impurity concentration by ion implantation;
In other words, if the semiconductor layer 4 is formed only of the low concentration semiconductor layer 5, it does not exhibit negative resistance characteristics; ■ Negative resistance characteristics appear only when the dose of ion implantation is large; ■ There is no correlation between the current-voltage characteristics of negative resistance characteristics and the dose of ion implantation 4. This has been confirmed through experiments. In this case, the concentration of the highly doped semiconductor layer 6 is approximately 1
×1017~2×10111/c i, low concentration semiconductor layer 5
The concentration of Gel is preferably around 5×10′/cJ. In addition,
The result (2) means that the negative resistance characteristics can be controlled by the dose of ion implantation.

The inventor also found that the occurrence of negative resistance characteristics strongly depends on the peripheral shape of the SBD junction, and that negative resistance characteristics occur when the contact etch time, which is a process parameter that determines the peripheral shape of the SBD junction, is short. We also obtained an experimental result that it does not occur when the time is long. This is thought to be because, depending on the contact etch time, a peripheral current component from the periphery of the SBD junction surface is added to a current component flowing through the center of the SBD junction surface, resulting in normal characteristics. That is, S
The current component flowing through the center of the B-D junction surface exhibits a negative resistance characteristic as shown in curve (a) in Figure 2, and the peripheral current component from the periphery of the SBD junction surface is added to this. Therefore, it is thought that the SBD will have normal characteristics as shown in curve (b) of FIG. 2. Therefore, as shown in FIG. 1, if the peripheral current component of the SBD junction surface is suppressed by the contact hole 9, a semiconductor device exhibiting more stable negative resistance characteristics can be obtained.

The semiconductor device as described above can be manufactured in a process similar to that of a Schottky barrier diode in an LSI manufacturing process.

That is, an N+ type buried M2 and a P+ type semiconductor region 3 serving as a channel stopper are formed on one surface of a P type silicon semiconductor substrate 1, and an N− type epitaxial layer 4 is grown thereon. The surface of the grown epitaxial layer 4 is subjected to secondary oxidation to form a 5i02 film, and a Si3N4 film is deposited thereon.

After performing isolation oxidation using this Si3N4 film as a mask to form an insulating film 7 for element isolation, the Si3N4
Remove membrane. The above steps are performed using conventionally known bipolar L
The manufacturing process is exactly the same as the SI manufacturing process. The 5i02 film formed by secondary oxidation may be removed together with the Si3N4 film, but it may also be left as a thin insulating film 8. If removed,
For example, the thin insulating film 8 can be formed separately along with the formation of the S i O2 film on the surface of the base region. After forming a thin insulating film 8 on the surface of the epitaxial layer 4 in this way, N-type impurity ions are implanted into the surface of the epitaxial layer 4 through the thin insulating film 8 to form an N1-type high concentration semiconductor layer 6. do. The lower part of the epitaxial layer 4 has the same low impurity concentration as when it was grown as the N- type low concentration semiconductor layer 5. The N+ type high concentration semiconductor layer 6 can be formed simultaneously with the formation of the collector contact region or the emitter region. After forming the high concentration semiconductor layer 6, a contact hole 9 having an area smaller than the surface area of the high concentration semiconductor layer 6 is opened in the thin insulating film 8 covering the surface thereof. Note that the opening of contacts 1 to hole 9 can be performed simultaneously with the opening of contacts 1 to hole 9 in other active regions. After the contact hole 9 is formed, an electrode material layer 9 for a Schottky barrier diode is provided so as to be connected to the high concentration semiconductor layer 6 through the contact hole 9, thereby obtaining the structure shown in FIG. Finally, the device is completed by covering with a protective film or the like.

[Effects] ■ A significant concentration difference or concentration gradient is created in the impurity profile in the epitaxially grown silicon semiconductor layer of the Schottky barrier diode to provide negative resistance characteristics, so negative resistance can be formed at the LSI level. A semiconductor device having these characteristics can be provided.

(1) Since it can be manufactured using the same process as the Kibaria diode, the semiconductor device according to the present invention can be manufactured without adding a new process, especially in bipolar LSI.

■A thin insulating film is formed on the surface of the highly concentrated semiconductor layer that forms the upper part of the epitaxially grown silicon semiconductor layer, and contact holes 1 to 6, which are smaller than the surface area of the second semiconductor layer, are opened in this thin insulating film. Since the electrode material layer is bonded to the high-concentration semiconductor layer through the electrode material layer, it is possible to suppress the amount of peripheral current, and more stable negative resistance characteristics can be obtained.

The invention made by this inventor has been specifically explained above based on Examples, but it goes without saying that this invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor.

[Field of Application] The present invention can be widely used in bipolar integrated circuits and the like.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional groove diagram showing an embodiment of a semiconductor device according to the present invention, and FIG. 2 is a diagram showing current-voltage characteristics of the semiconductor device according to the present invention. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Buried layer, 3... Channel stopper (P+ type semiconductor region), 5... Low concentration semiconductor layer, 6... High concentration semiconductor layer, 7... Element Isolation insulation +i, g...thin insulating film, 9...contact 1
-6, 10... Electrode material layer, (a)... Negative resistance characteristics, (b)... Normal characteristics as SBD. 1, - /l

Claims (1)

[Claims] 11. There is a low-concentration semiconductor layer on the surface of the semiconductor matrix, and a high-concentration semiconductor layer with a high impurity concentration of the same conductivity type on the surface of this low-concentration semiconductor layer. A semiconductor device having negative resistance characteristics, characterized by the presence of an electrode material layer that is in contact with the other layers. 2. The semiconductor base includes a semiconductor substrate of a first conductivity type, and a buried layer of a conductivity type opposite to the first conductivity type on one surface of the semiconductor base, and a first conductivity type that is epitaxially grown on the buried layer. A semiconductor device having negative resistance characteristics according to claim 1, comprising a low concentration semiconductor layer of a second conductivity type opposite to the conductivity type. 3. An insulating film having a contact hole smaller than the surface area of the high concentration semiconductor layer is provided between the high concentration semiconductor layer and the electrode material layer, and the electrode material layer connects to the high concentration semiconductor layer through the contact hole. Claim 1 joined with
A semiconductor device having negative resistance characteristics as described in . 4. A low concentration semiconductor layer having the same conductivity type as the buried layer and a low impurity concentration is epitaxially grown on the semiconductor substrate of the first conductivity type in which a buried layer of the opposite conductivity type is formed on the − plane. After forming an insulating film on the surface of the layer, impurity ions of the same conductivity type as that of the low-concentration semiconductor layer are implanted into the surface of the low-concentration semiconductor layer through this insulating film. A negative resistance characterized by forming a semiconductor layer, removing at least a part of the insulating film on the surface of the high concentration semiconductor layer, and then forming an electrode material layer on the high concentration semiconductor layer to be connected thereto. A method for manufacturing semiconductor devices with special characteristics. 5. A patent in which the insulating film is removed only at a contact hole 1 which is smaller than the surface of the high concentration semiconductor layer, and the electrode material layer is formed so as to be connected to the high concentration semiconductor layer through the contact hole 1. A method for manufacturing a semiconductor device having negative resistance characteristics according to claim 4.