JPS6076846A - Carrier reproducing pll - Google Patents

Carrier reproducing pll

Info

Publication number
JPS6076846A
JPS6076846A JP58184024A JP18402483A JPS6076846A JP S6076846 A JPS6076846 A JP S6076846A JP 58184024 A JP58184024 A JP 58184024A JP 18402483 A JP18402483 A JP 18402483A JP S6076846 A JPS6076846 A JP S6076846A
Authority
JP
Japan
Prior art keywords
circuit
output
frequency
carrier
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58184024A
Other languages
Japanese (ja)
Inventor
Michiro Shibui
Kazuaki Noda
Takahisa Tsuchiya
Bunichi Otsuka
Original Assignee
Nippon Telegr & Teleph Corp <Ntt>
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegr & Teleph Corp <Ntt>, Sony Corp filed Critical Nippon Telegr & Teleph Corp <Ntt>
Priority to JP58184024A priority Critical patent/JPS6076846A/en
Publication of JPS6076846A publication Critical patent/JPS6076846A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/18Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22Demodulator circuits; Receiver circuits
    • H04L27/227Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2275Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses the received modulated signals
    • H04L27/2276Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses the received modulated signals using frequency multiplication or harmonic tracking

Abstract

PURPOSE:To convert the output of a counter circuit into a carrier reproduction signal by comparing the frequency output of a counter circuit of a division ratio variable control type with a frequency corresponding to the carrier of a descending data signal and varying the division ratio of the counter circuit according to the result of said comparison. CONSTITUTION:A carrier reproducing circuit 22 gives two-multiplication to the output of an AGC circuit by a multiplying circuit 30 to obtain an output having a frequency double as much as the carrier frequency of a descending data signal. This output is received by a phase comparator 32 in the form of an input signal S1 through a BPF31 having a pass frequency approximate to a double frequency. The output S2 of the comparator 32 is converted into a DC output S3 by an averaging circuit 33 consisting of an LPF and applied to a level comparator 34. The comparison output S4 is applied to a dividing circuit 35 of a division variable type as a division ratio switching signal. An output pulse S5 of the circuit 35 is fed back to the circuit 32 and also transmitted to a phase wave detecting circuit as a reproduction carrier signal.
JP58184024A 1983-10-01 1983-10-01 Carrier reproducing pll Pending JPS6076846A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58184024A JPS6076846A (en) 1983-10-01 1983-10-01 Carrier reproducing pll

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58184024A JPS6076846A (en) 1983-10-01 1983-10-01 Carrier reproducing pll

Publications (1)

Publication Number Publication Date
JPS6076846A true JPS6076846A (en) 1985-05-01

Family

ID=16146007

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58184024A Pending JPS6076846A (en) 1983-10-01 1983-10-01 Carrier reproducing pll

Country Status (1)

Country Link
JP (1) JPS6076846A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6340426A (en) * 1986-08-06 1988-02-20 Hitachi Ltd Timing pll device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57162560A (en) * 1981-03-31 1982-10-06 Nec Corp Reproducing circuit of demodulating carrier wave

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57162560A (en) * 1981-03-31 1982-10-06 Nec Corp Reproducing circuit of demodulating carrier wave

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6340426A (en) * 1986-08-06 1988-02-20 Hitachi Ltd Timing pll device

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