JPS6037070A - Information processing device - Google Patents

Abstract

PURPOSE:To prevent the access of a third person and to discriminate an unnormal unit by deriving the first and the second operating values by an inputted collating number, obtaining the third and the fourth operating values from a stored collating number to compare them with each other. CONSTITUTION:When an IC containing card 19 is inserted into a master machine, a data signal input/output terminal 28a, etc. are connected, and controlled to a start stage. When a collating number X is inputted from the input use keyboard of the master machine, a random number R is generated, a function S= f(A, X, R) and a function T=g(A, X, R) are operated, and a value of S is transferred to the card 19 side. A is a group number given to a group. When a data transfer of values of R and S is received, the card 19 side executes the operation of a function S'=f(A', X', R) (A' and X' are a group number and a collating number stored in an information storing circuit 22). When the collating number X is correct, S=S' is obtained to use the card subsequently as usual. If the number collation is unsuccessful four times continuously, the storage in the circuit 22 is erased automatically. Also, it is also impossible to use an unnormal master machine.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention has an information storage unit that includes at least a verification number storage section and an information storage section made of a semiconductor memory circuit, and an input means for inputting a verification number from the outside. The present invention relates to an information processing device composed of an information processing unit.

In recent years, for example, so-called IC-embedded storage media, in which a semiconductor chip is embedded in a card body made of plastic material and information data is written and stored in the semiconductor storage circuit, have been developed. Information processing systems using units are also beginning to be put into practical use. In an information processing system in which the above-mentioned information storage unit is used as a so-called cash card for financial institutions such as banks, it is necessary to prevent unauthorized use of cards that have been lost or stolen. In order to do this, a verification number (PIN, password, etc.) is set in advance, and only a specific person who knows the verification number can input the verification number from an external source to confirm that the card is the legal holder. certify that the information is valid, control the processing such as a predetermined transaction, or access the information data stored in the semiconductor memory circuit,
It is possible to control so that necessary information can be retrieved and used.

However, the information storage unit using the conventional storage medium with a built-in IC as described above cannot easily store its stored contents, compared to the conventional information storage unit using a storage medium that uses magnetic storage writing, such as a magnetic card. Although it becomes more difficult to read or forge, a person who is familiar with this type of information processing technology can still access the stored information with an appropriate reading device and read or forge the contents. It is possible to do so.

In other words, even when used as a cash card as mentioned above, in the past, only checks were made regarding whether the structure of the card itself was valid or whether the verification number input from the outside corresponded to the card correctly. Because the system is configured to check, once the stored information in the card is accessed and the verification number stored and written in the card is read, or by someone with very good technical knowledge, If a card with a completely similar structure is forged, it will be impossible to completely prevent unauthorized use, and especially in the case of cash cards used offline, it is impossible to completely prevent unauthorized use. Since this system relies entirely on checks based on stored memory contents, etc., if a large number of structurally similar cards are counterfeited, the damage will be very great.

The present invention solves the above-mentioned drawbacks of conventional information processing devices, and an object of the present invention is to prevent important information in an information storage unit such as an IC built-in card from being accessed by a third party. To provide an information processing device that is free from danger and that can discriminate an information storage unit that is not legitimate from the side of the information processing unit.

Hereinafter, the present invention will be explained in detail according to the drawings.

FIG. 1 and FIG. 2 are a schematic structural diagram and a system block diagram, respectively, of an information processing apparatus according to an embodiment of the present invention. The information processing apparatus of this example includes a base unit 6 shown in a perspective view in FIG. 1(a), and an IC built-in card 19 shown in a plan view in FIG. 1(b). The master device 6 provided as an information processing unit has a display section 7 made of a donmatrix type liquid crystal display device, an input keyboard 8, and an IC built-in card insertion section 9. Further, an IC built-in card (hereinafter simply referred to as a card) 19 provided as an information storage unit includes a circuit mounting section 29 including one or more RC chips, and a data signal input/output terminal 28.
a, a control signal input/output terminal 28b, and two power supply input terminals 28c. The four connection terminals are exposed from the card body made of plastic material, and when the card 19 is inserted into the insertion portion 9 of the base unit 6, the corresponding connection terminals on the base unit 6 side, which will be described later, are exposed. and are configured to be connected to each other.

Next, FIG. 2 is a block diagram showing the outline of the system configuration of the information processing apparatus of this example, in which (a) shows the base unit 6 side, and (b) shows the card 19 side.

The RAM II is for storing data such as CPU data and programs loaded from outside.
, a ROM 12 storing monitor programs, routine programs, etc., an I10 port 13 for human output control, and a video RA Mll 8 section occupying a part of the address area of the R8 Mll, and the above-mentioned A display control controller 14 including a driver section of the display section 7, a display section 7 connected to the controller I/roller 14, an input keyboard 8 connected to the I10 boat 13, and the aforementioned It is composed of a power supply circuit 16 and the like for supplying power to each block. Note that 17 is the CPU
This is a path line that connects 0 and each block. Also connected to the I10 port 13 are a data signal input/output terminal 18a and a control signal input/output terminal 18b, and a power supply circuit 16 is also connected to a power supply terminal 18c. .

On the other hand, the card 19 side has a so-called microcomputer type configuration, and includes a CPU 20 consisting of an arithmetic unit, a control unit, etc., a ROM 21 that stores programs, and data for verification such as verification numbers and information data. an information storage circuit 22 consisting of a so-called non-volatile semiconductor storage circuit such as MNOS for storing information such as;
I10 port 23 for input/output control between parent vi6,
A driver 24 for applying a driving voltage for memory writing and memory erasing to the information storage circuit 22, and a card 1.
Power supply circuit 26 for supplying power to each block on the 9 side
It is composed of etc. Also, CPU20 and ROM21,
A pass line 27 is provided between the information storage circuit 22 and the I10 port 23, and the aforementioned data signal input/output terminal 28a and control signal input/output terminal 28b are connected to the I10 port 23. circuit 26
The above-mentioned power supply input terminal 28C is connected to the terminal 28C.

Note that when writing new memory into the information storage circuit 22, erasing memory, or changing the memory contents, a control signal sent from the CPU 20 via the control bus of the pass line 27 is used. Accordingly, a write drive signal or an erase drive signal is generated by the driver 24, and these signals are sent to a specified address in the information storage circuit 22 (the address specified by the address bus of the pass line 27). is configured to be applied to the However, in the following description, when writing, erasing, changing, etc. of the memory of the information storage circuit 22 is mentioned, the operation of the driver 24 and the like will not be explained each time.

Note that in FIGS. 2(a) and 2(b), the power supply circuit 16.
The power supply lines from 26 to each other block are shown by broken lines, and the path lines 17 and 27 actually consist of a data bus, an address bus, and a control bus, but the diagram is simplified. For this reason, illustration of the distinction between each bus is omitted.

Further, when the card 19 is inserted into the insertion portion 9 of the base unit 6, the data signal input/output terminal 28a is connected to the data signal input/output terminal 18a and the control signal input/output terminal 2.
8b is configured to be electrically connected to the control signal input/output terminal 18b, and the power input terminal 28c is electrically connected to the power supply terminal 18C. Therefore, in this example, control signals and data signals are transferred between the base unit 6 side and the card 19 side.
This is done via the 10 ports 13 and 23, and also through the connection between the data signal input/output terminals 18a and 28a and the control signal input/output terminals 18b and 28b. In addition, when the above-mentioned mutual signal transfer is performed, the I10 boat on the data sending side converts the signal from parallel to serial before sending it out, and the I10 boat on the data receiving side receives the received signal. Perform serial/parallel conversion. However, in the following, when explaining the specific signal transfer between the base unit 6 side and the card 19 side, we will explain the route through which the signal is transferred in each case. The following shall be omitted. Further, in this example, the card 19 side is configured to be supplied with power from the parent device 6 side via the power supply terminal 18c and the power input terminal 28c.

Next, FIG. 3 is a flowchart 1 of a routine program regarding the information processing apparatus of this example, in which (a) shows a flowchart of the program stored in the ROM 12 on the base unit 6 side, and (b) ) shows a flowchart of the program stored in the ROM 21 on the card 19 side. The operation of the information storage device of this example will be described below with reference to the drawings.

First, when the card 19 is inserted into the insertion section 9 of the base unit 6,
The base unit 6 side and the card 19 side are both controlled to the start stage shown in FIG. 3 by processing such as an emergency interrupt on the base unit 6 side and by processing such as a reset interrupt on the card 19 side.

First, on the card 19 side, check whether the value of M indicating the number of consecutive failures in number matching is 3 or more in step b-1.
) is checked, and if it is 3 or more, a memory clear warning signal is transferred to the base unit 6 side as a standby state signal on the card 19 side (step b-2), and if it is less than 3, a standby state signal is transmitted. Then, the normal standby state signal is transferred to the base unit 6 side (step b-3), and in any case, the next step is to wait for the data transfer of the values of R and S, which will be described later, from the base unit 6 side (step b-3). Proceed to -4). Note that the value M indicating the number of consecutive failures in number verification is stored in a predetermined address of the information storage circuit 22 mentioned above, and as will be described later, it is not possible to perform verification by inputting an incorrect verification number manually. If it fails, the value is counted and amplified (step b-1
1) is cleared to 0 (step b-8) if the correct verification number is entered manually and the verification is successful.

On the other hand, the base unit 6 side waits for a standby state signal from the card 19 side (step a-1), and if it is a memory clear warning signal (step a-2), the display unit 7 If the number verification fails, a warning will be displayed to clear the information data in the information storage circuit 22 (1.1).
Step a-3), and if the standby state signal is the normal standby state signal, leave it as is, and in any case, the green bean 1- of reference number X from the next long sword keyboard 8
The process then proceeds to the stage of waiting for (step a-4). When the verification number is input here, a random number R is generated (step a-5), and then the function S=f (Δ, X, R) is calculated (step a-6), and the function 'I' = g(A,X
, R) (step a-7), and transfer the values of R and S of the calculation result to the card 19 side (step a-,8)
After that, the process proceeds to the stage (step a-9) of waiting for a determination signal to be returned from the next card H). Note that A above is a type of organization number uniquely assigned to a group when the condolence storage device is used within a certain group related to a specific company or financial institution. This data is used to more completely protect against access by people outside the above group.

On the other hand, on the card 19 side, from the stage (step b-4) of waiting for the data transfer of the values of R and S from the base unit 6 side,
When those data are actually received, the function S'-f (A
', X'', R) (step b-15).

Here, A' and X' are a group number and a reference number, respectively, which are stored and written in advance in a predetermined address of the information storage circuit 22. If the same intra-group card corresponds correctly to a predetermined intra-group parent device, both group numbers, that is, the value of A' stored in the card 19 and the parent device 6 side. This value is the same as the value of A stored in . In addition, if the above-mentioned verification number The values of the verification numbers X' are the same. Therefore, base unit 6 and card 1
If the correspondence with 9 is correct and the reference number entered manually is also correct, perform calculations by substituting the same data value as a variable to the same function f on the base unit 6 side and the card 19 side. Therefore, the calculated value S of the function f on the base unit 6 side and the calculated value S' of the function f on the card 19 side should naturally be equal.

That is, it is 1 on the card 19 side, and in the next step it is checked whether the above two calculated values S and S' are equal to each other (step b-6), and if they are equal, first the card 19 is
Since the base unit 6 is recognized as legitimate, the side determines that the verification has been performed correctly and transmits a memory access permission signal as a determination signal to the base unit 6 (step 1). 7) l,, and after clearing the value of M mentioned above to 0 (step b-8), the function T'-(
A'.

X', R) (step b-9) l, , parent as block 6
The calculated value T' is transferred to the other side (step b-10).

From the point of view of the notebook 19 side, the above has already provided grounds for acknowledging that the base unit 6 is legitimate, so from now on, the information storage circuit 22 will not be able to store the information. This means that you are now ready to perform normal work with memory access permitted.

On the other hand, if the calculated values S and S' are not equal, it is determined that the entered verification number is not correct or that the base unit 6 is not valid, so verification may not be performed correctly. After increasing the value of M by 1 (step b-11) as a result of determining that the
Step of checking whether the value of M is 4 or more (step b-i
Proceed to 2). Here, if the value of M is 4 or more, the memory of the information data in the information storage circuit 22 is cleared (at least part of it is cleared (step b-13)), and a memory clear execution signal is sent as a determination signal. Transfer to base unit 6 side (
After step b-14), the process proceeds to a stage for performing special tasks on a regular basis. In addition, if the value of M is less than 4, a verification number re-input designation signal is transferred to the base unit 6 as a determination signal (step b-
15) and then return to the starting stage again.

On the other hand, on the base unit 6 side, if the judgment signal transferred from the card 19 side is a verification number re-input designation signal (step a-10), a designation to input the verification number again from the keyboard is made. is performed on the display section 7 (step a-11), and then the process returns to the start stage again. Furthermore, if the determination signal is not the collation number re-input designation signal but a memory clear execution signal (step a-12), the display section will indicate that the storage of information data in the information storage circuit 22 has been cleared. 7 (step a-13)
), then proceed to the stage for performing special work at the time of verification/nonconformity determination. In addition, if the determination signal is neither the collation number re-input designation signal nor the memory clear execution signal described in ``1'' but is a memory access permission signal, the step of waiting for the transfer of the calculated value T'' from the card 19IIJ (
The process proceeds to step a-14), and when the calculated value T' is actually sent, the process proceeds to a step (step a-15) of checking whether the calculated value T' is equal to the above-mentioned calculated value T. move on.

Here, the above T and T' correspond to the base unit 6 and the card 19 correctly, as in the case of the relationship between S and S' described above,
If the reference number entered manually is also correct, the same data value will be substituted as a variable to the same function g on the base unit G side and the card 19 side to perform calculations.
Naturally, the calculated value T of the function g on the base unit 6 side and the calculated value T' of the function g on the card 19 side are equal.

Therefore, when the above T and T' are equal, even from the perspective of the base unit G, there is a basis for recognizing that the entered verification number is correct and that the card 19 is legitimate. As a result of the determination that the verification was performed correctly, normal work in the memory access permission state, such as displaying the contents of the information data stored in the information storage circuit 22, is performed. It is controlled so that it can perform confirmation, storage and correction of new information data, calculations and judgments based on information data, transactions, and other tasks.

Furthermore, if T and T' are not equal, the memory access permission signal, which is transferred only when the input verification number is determined to be correct, has already been transferred from the card 19 (step b-7). ), the fact that it is no longer possible to match the card at this stage means that it can be immediately recognized that card 19 is not legitimate. The process then proceeds to a stage where a special task is performed, such as sending an alarm to a predetermined location to notify that an unauthorized card is being used.

As described above, in this example, if the act of failing number verification using an incorrect verification number is performed four times in a row, the memory of information data in the information storage circuit 22 of the card 19 is automatically erased. Since the information data is configured so that it can be accessed and used illegally by someone who does not know the identification number, it is completely prevented from being accessed or used illegally.

In addition, even if you obtain a card whose verification number is known and try to access the information data in the information storage circuit 22 to understand the data contents and data structure, it is impossible to use a card other than an authorized information processing unit. In this case, the verification of S and S' mentioned above on the card 19 side (step b-6) will eventually fail, and access will be refused from the card 19 side. In other words, by creating an information processing unit that is functionally similar to a regular base unit, or by using a base unit for another group,
Even if you try to check the data contents and data structure in the card, as long as the group number A and function f etc. mentioned above are different,
Even if you enter the verification number correctly, you will not be able to access it. Therefore, when the card 19 as in the above-mentioned embodiment is used as a cash card, the data on the card 19 will not be processed at all unless a formal information processing unit owned by a financial institution belonging to the same group is used. Since it is impossible to access and investigate the details, it is completely possible to prevent the data contents and data structure of the cash card from being read and forged by someone outside the financial institution. .

Further, according to the configuration of the above-described embodiment, it is possible to easily identify a counterfeit card even when viewed from the standpoint of the base unit 6. In other words, even if a functionally similar card is forged, unless you know the function g, group number A, etc. used to calculate the calculation value based on the verification number,
The above function g that should be set as part of the program in the ROM 21 of the card 19, or the information storage circuit 2
Since there is no way to confirm that the organization number A', etc. that should be stored in advance in memory in the device 2 is correct and valid, it is necessary to check T and T' on the official base unit 6 side (step a-15).
This will result in failure and the use of counterfeit cards will become impossible.

Note that FIG. 4 shows a modification of a part of the flowchart 1- in FIG. 3 described above, and also in FIG.
) shows the parent vlG side, and (b) shows the card 19 side. However, the parts other than those shown are completely the same as those in FIG. 3 described above.

In this example, two random numbers R, and R2 are generated on the main unit G side (Step 2 a-5) L, and the calculated value S is a function f (A,
X, R1) (step a-6), the calculated value T is calculated by the function f (S, X, R2) (step a-6).
-7), and the calculated value S and random numbers R1 and R2 are transferred to the card 19 side (step a-8). On the other hand, on the card 19 side, the calculated value S' is the function f (
A', X'.

R+) (step b-5), the calculated value T
' is the operation of the function f (A', X', R2) (step b
-9), respectively.

That is, in this example, the calculated values S and T are calculated by substituting two different random numbers RI and R2 to the same function f, but even with this configuration, the input verification number In addition to whether or not is correct, from the standpoint of the base unit 6, the group number A' of the 19 cards and the function f
It is clear that it is possible to determine whether the group number A and function f of the six base units are legitimate from the standpoint of the 19 cards.

As described above, according to the present invention, when viewed from the perspective of the entire system of the information processing device, it is possible to check whether the input verification number is correct or not. From the perspective of the main unit), the information storage unit (card) being used
It becomes possible to check whether the information is legitimate, and also from the perspective of the information storage unit (card) side, it is possible to check whether the information storage unit (card) is legitimate or not. This means that accessing and reading important information data can be completely prevented.

Therefore, even when the IC built-in card as in the above-described embodiment is used as a so-called cash card for financial institutions such as banks, the fear of the card being forged is eliminated. In other words, even if you forge a functionally similar card without worrying about the data corresponding to the group number A mentioned above or the data content related to calculations such as the calculation functions f and g, it will not be used for legitimate information processing. It is clear that it can be easily identified from the unit side. Furthermore, even if you obtain a legitimate card with a known verification number and attempt to forge the same card by improving its data content and data structure, if you do not obtain a legitimate information processing unit, the information on the card 19 will be completely lost. Since it is not possible to access and examine the data in detail, it is impossible to forge a card that can be used fraudulently.

In the above-mentioned embodiment, the verification number X' stored in the verification number storage section in the storage circuit is configured to be equal to the verification number X inputted from the outside. There is no need to configure the system as follows; for example, it is also possible to configure the system so that the two have a certain correspondence relationship, and based on the correlation between the two, it is possible to determine the actual matching between the two. . Similarly, when using the group number mentioned above, the group number A on the base unit 6 side and the group number A' on the 19 cards do not necessarily have to be the same, and as above, there is a correlation between the two. It is possible to configure such that a substantial match between the two is determined based on the above.

Furthermore, in the case of the embodiments shown in FIGS. 3 and 4, there is a function for calculating the calculated values S and T on the base unit 6 side, and a function for calculating the calculated values S' and T' on the card 19 side. The functions for determining the values are set as the same functions f and g (only f in FIG. 4), but it is clear that it is not necessary to set them as the same function. In other words, it is clear that in this case as well, it is sufficient that the two functions have a certain correlation and are configured so that matching can be substantially determined.

In the above-mentioned embodiment, when the card 19 side finally refuses access, the memory in the information storage circuit 22 is cleared, but it is not necessary to clear the memory. It is sufficient if access can be reliably prevented. Furthermore, even when clearing the memory, not only the organization number A', the collation number X', and other stored data in the information storage circuit 22, but also the
OM21 is a so-called EE that can be electrically written and erased.
P-I? If configured with OM, ROM2
It is clear that it is also effective to erase important information in the program written in the program No. 1, such as the function part for calculating the calculated value.

Furthermore, in the above-mentioned embodiments, the reference number storage section, information storage section, etc. are constituted by so-called non-volatile semiconductor memory circuits such as MNOS that can electrically write and erase memory.
It is also possible to configure the verification number storage section and the information storage section with a RAM, which is a so-called volatile storage circuit, and to configure this RAM so that it is constantly banked up in terms of energy with an auxiliary battery or the like.

Note that it is also possible to use the information processing unit according to the present invention by connecting it to another large computer or the like online.

[Brief explanation of the drawing]

1 to 3 show an information storage device according to an embodiment of the present invention, FIGS. 1 and 2 are a schematic structural diagram and a system block diagram, respectively, and FIG. 3 is a routine program diagram. Flowchart diagram. FIG. 4 shows a partial modification of the flowchart 1-diagram of FIG. In all of Figures 1 to 4, (a) shows the base unit side, and (b) shows the IC side.
The built-in card side is shown respectively. 6--------Base unit, 7--Display section, 8--------
Keyboard for one person, 9------ IC built-in card insertion part, 10.2O---CPU, 1l-
------RAM, 11 a-----Video RAM section, 12.2l-----ROM, 13
．． 23--------1 / O-Bo 1-114----
-----Controller, 16.26------Power supply circuit, 17.27------Bus line, 18 a
, 28 a---Data signal input/output terminal, 1
8b, 28 b------Control signal input/output terminal, 18C-----Power supply terminal, 19
---I C built-in card, 22...-1--information storage circuit, 24-----driver, 28 C-----
-1 power input terminal Fig. 1 (a) - (b) (Q) Fig. 4 (b)

Claims (1)

[Claims] (1) Consisting of an information storage unit that includes at least a verification number storage section and an information storage section made of a semiconductor memory circuit, and an information processing unit that has at least an input means for inputting a verification number from the outside. In the information processing device, the information processing unit includes a calculation means for calculating first and second calculation values based on the reference number inputted from the input means, and a calculation means for calculating the first and second calculation values based on the reference number input from the input means, and a calculation unit for calculating the first calculation value for the information storage. and means for transferring the information to the unit side, and the information storage unit records 1,
a calculation means for calculating third and fourth calculation values based on the reference numbers identified in a; and means for transmitting the third calculation value to an information processing unit; has a determining means for comparing the second calculated value with the third calculated value transferred from the information storage unit to determine a match, and the information storage unit includes the An information processing apparatus characterized by comprising a determining means for comparing a fourth calculated value with the first calculated value transferred from the information processing unit to determine whether or not the fourth calculated value is verified.