JPS6027470B2 - VIR signal discrimination circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION A color video signal consisting of a luminance signal and a carrier color signal is subjected to various distortions during its transmission process.

In particular, carrier color signals are susceptible to distortion due to differential gain and differential phase. In order to remove such transmission distortion, there is a system in which a reference signal, a so-called VIR signal, is inserted into the received signal, and automatic color level adjustment and automatic hue correction are performed based on this VIR signal. The VIR signal is inserted into the first horizontal section of each vertical section, and as shown in Figure 1, the chrominance reference signal Svc is inserted into the chrominance reference section, and the following luminance reference signal is inserted into the luminance reference section. The brightness reference signal SvY is further composed of a black reference signal Sv8.

When the vedestal level is 01RE (brightness level) and the maximum white level is 1001RE, the burst signal S
For B, the peak-to-peak value during shaking is selected to be 401RE. Chrominance reference signal Svc is burst signal S8
It is also a sine wave signal of 3.58M ratio, the amplitude and phase are respectively equal to those of the burst signal SB, and it is superimposed on the brightness level 70RE corresponding to the brightness level of average skin color.

The level of the luminance reference signal SvY is selected to be 601RE, and the level of the black reference signal Sv8 is selected to be 7.51RE. When a phase distortion occurs in the carrier color signal (chrominance signal), a similar phase distortion occurs in the Vm signal SI, so the phase shift of the VIR signal SI with respect to the burst signal SB becomes the phase distortion of the carrier color signal.

Therefore, if, for example, the demodulation axis is controlled according to this deviation,
It is possible to correct the shift in hue centered on skin color due to phase distortion. Also, since the oscillation of the VIR signal S corresponds to the level of the carrier color signal, it is possible to keep the color level (color saturation) constant by controlling this oscillation to be constant. Ru. By the way, such automatic correction is performed only when the VIR signal S is present in the received signal.
A determination circuit is provided to determine whether the signal SI is present.

This determination circuit generally detects the output corresponding to the first grid of each vertical section from among the video detection outputs, and determines whether or not the detection level is above a predetermined threshold. The detection level is omE~7 as shown in Figure 2A.
Selected between 0 and E. By the way, like this, the detection level L
If it is set as shown in FIG. 2A, there is a risk of malfunction under the conditions described below.

Prior to the explanation, first, in this type of color television receiver, the gains of the high frequency booster circuit and the video intermediate frequency booster circuit are generally controlled by the output of the AGC circuit. If an AGC circuit is provided, a constant video detection output will always be obtained when the electric field strength of the received signal exceeds a certain level.

However, if the input electric field is very weak, even if the AGC circuit is operating, its level will not be equal to the level at the appropriate value. Therefore, if the received signal is negatively modulated, its beta The level will be higher than the vedestal level at the appropriate value, and will not be close to the white level. That is, the relationship is as shown in FIG. 2A, 8. Now, the detection level L of the V melon signal S (if the detection circuit is configured with a Schmitt circuit, it has hysteresis characteristics, so there are two detection levels LU and LL).
It will have . ) is set as shown in FIG. 2A, the received signal in a weak electric field will have a relationship as shown in FIG. 2B. Therefore, in such a case, if the detection level L is set as shown in the figure, detection will be performed as if the VIR signal is present even though the VIR signal S, is not present. This will cause malfunction. In order to solve this malfunction, it is conceivable to set the detection level L to an intermediate level, for example, a value close to 50 mE, instead of selecting a low value as shown in A in the figure.

However, if the input electric field is further reduced than in the above case, the S/N will deteriorate and the vedestal level will become closer to the white level side, so it will be higher than the detection level L set to the intermediate value. It may be received in the following state. In such a case, although the VIR signal SI is still present, it is determined that the VIR signal S is absent, and malfunction cannot be avoided. As the input electric field strength becomes weaker in this way, the amount of noise increases and the S/N ratio deteriorates, and at the same time, the above-mentioned vedestal level of the received signal also increases accordingly.

Therefore, accurate automatic correction cannot be achieved unless the presence or absence of the VIR signal S is detected as well as the presence of noise. In a state where the S/N is poor, even if the V rudder signal S is present, the image quality will not deteriorate if automatic correction is not performed using it. In other words, at the same time as the VIR signal SI is detected,
Correct transmission distortion correction cannot be performed unless noise is detected. Assuming that this condition is satisfied, VI
A noise detection circuit may be provided separately from the discrimination circuit for the R signal S, but this would only complicate the configuration and would be meaningless.

The present invention takes these points into consideration, and is designed to specifically make it possible to determine the presence or absence of a complete VIR signal S, including noise.

The television receiver according to the present invention will be described in detail below with reference to the drawings. In FIG. 5, 1 is a high frequency booster circuit, 2 is a mixer, 3 is a local oscillator, 4 is an intermediate frequency booster circuit, 5 is an audio signal circuit system, and 6 is a speaker. Further, 7 is a video detection circuit which detects a color video signal including the VIR signal S. 10 is an AGC circuit.

The detection output is supplied to a bandpass amplifier 8 to extract only the carrier color signal (including the burst signal SB), which is supplied to a color demodulation circuit 9 as is well known, and the color signal is demodulated.

In this example, it is assumed that each color difference signal of RY to BY is obtained. On the other hand, 1 1 is 3. The output luminance signal is supplied to the matrix circuit 14 together with the above-mentioned color difference signal through the intensifier 12 and the delay circuit 13 to obtain each of the R to B primary color signals. , are supplied to the picture tube 15.

The carrier color signal is further supplied to a burst signal extracting circuit 20, and a burst signal SB is extracted from the signal.As is well known, this burst signal SB is supplied to an oscillator 22 via a ringing amplifier 21, .5 Shugoz
A continuous wave signal is formed.

The continuous wave signal is supplied to the color demodulation circuit 9 described above via a phase modulation circuit 23 described later. Note that 25 is a chromaticity signal detection circuit. Further, 30 indicates a synchronization separation circuit, and the separated horizontal synchronization signal SH is of course supplied as a sampling signal through the above-mentioned sampling circuit 2 and the delay circuit 34, but this horizontal synchronization signal SH is As is well known, the signal is supplied to the horizontal deflection system 31 as its drive signal. Similarly, the vertical synchronizing signal Sv is supplied to the vertical deflection system 31V. In addition, these synchronization signals SH and Sv are V as described later.
Gate pulse forming circuit 3 for gating the IR signal SI
2, and in the horizontal section of the 1st electric train, Fig. 6B
Pulses Pi and Pv as shown by and C are formed.

One pulse Pi is obtained corresponding to the chrominance reference part, and the other pulse Pv is obtained corresponding to the luminance reference part. Count the signal SH,
It can be formed by detecting the insertion section of the VIR signal S, and driving a monostable multipipulator or the like using this detection output. 'Then, V
Regarding color correction using the IR signal SI, the color correction detects the B-Y output and adjusts the color level adjustment circuit (gain control circuit) 48 provided at the front stage of the demodulation circuit 9 according to the center value of the B-Y output. All you have to do is control the amplifier gain. Therefore, the B-Y output obtained from the demodulation circuit 9 is
0. The color correction circuit 40' has a matrix circuit 41, which has a B-Y output and a delay circuit 13.
The Y output obtained through

The matrix output is fed to a clamp circuit 42 and VI
Clamp the chrominance reference portion in the R signal S. The clamp output is supplied to a sampling and holding circuit 43 to which the pulse Pv shown in FIG. 6C is supplied, whereby the level difference between the chrominance reference signal Svc and the intensity reference signal SvY is sampled and held. This hold output is the color adjustment circuit 4 described above.
8 as a control signal, and closed loop control is performed such that the level difference between the chrominance reference signal Svc and the luminance reference signal SvY is constant. With this closed loop control,
The color level is adjusted using the skin color as the medium ID.
Since the hue correction circuit 60 based on the VIR signal S has a similar configuration, its outline will be explained below.

Reference numeral 62 represents a Clasop circuit, and reference numeral 63 represents a sampling hold circuit, each of which receives a sampling pulse P as described above.
i, Pv are combined.

However, as the demodulated output input to the clamp circuit 62, the R and Y outputs are used to detect phase distortion.

The output of the hold circuit 63 is supplied to the phase modulation circuit 23 as a control signal, and as a result, the output phase is controlled according to the control signal, making it possible to correct a phase shift centered on skin color. Note that when a color video signal without the Vm signal S is received, automatic color and hue correction is not performed, so in such a case automatic switching is performed to enable manual adjustment. .

To explain from the perspective of the color, 45 is a variable resistor for manual adjustment, that is, a color volume, and the output obtained from the movable element is supplied to the signal switching circuit 46 provided at the output stage of the hold circuit 43. . 65 is a manual volume for hue adjustment.

66 indicates a signal switching circuit. These two signal switching circuits 4
5 and 66 are respectively formed as switching circuits,
As the switching pulse, the discrimination output obtained by the discrimination circuit 50 of the Vm signal S is used. As shown in the figure, the discrimination circuit 50 includes a clamp circuit 51 and a sampling I/J hold circuit 52.
and a comparison circuit 53, a specific example of which is shown in FIG.

The video detection output coupled to the terminal 50a is supplied to an asymmetrical clamp circuit 51 through an emitter follower type transistor Q.

This clamp circuit 51 is composed of a capacitor 54, a switching transistor Q2 connected in parallel to the signal path thereof, and a resistor 55 for setting the clamp voltage. The resistor 55 is composed of ten pairs of resistors 55A and 558 connected in series as shown in the figure, and the connection point thereof is connected to the emitter side of the switching transistor Q2. A switching pulse SH is applied to the base of the transistor Q2 via a resonant circuit 56.

The operation of the clamp circuit 51 configured in this manner will be described below. When the transistor Q2 is turned on by the supply of the switching pulse SH, its on-resistance differs depending on the potential relationship of the transistor Q2. In other words, when the potential Vc on the collector side is in the - direction, higher than the 0 potential VE on the emitter side, the on-resistance is small.On the contrary, when the potential VE on the collector side is in the opposite direction, higher than the 0 potential VE on the emitter side, the on-resistance is small. Resistance increases. That is, transistor Q2
shows asymmetric characteristics depending on the direction of the current. Therefore, if a video detection output of an appropriate level as shown in FIG. When a video detection output in a weak electric field as shown in FIG. B is input, the following clamping operation is performed.

There is noise N in the horizontal synchronization signal SH to be clamped.
is mixed in, the average level of the noise N that oscillates around the synchronous peak value becomes higher than the synchronous peak value due to the difference in the on-resistance of the transistor Q2.

Accordingly, the clamp potential is shifted by the average level ΔE of the noise N as shown in FIG.
That is, the value is clamped in a state where the DC component is superimposed by ΔE. When the noise N is mixed in this way, the collector potential Vc may become lower than the emitter potential VE even when the transistor Q2 is in the on state, and in that case, an asymmetric clamping operation occurs.

In other words, when the level of the clamp portion of the video signal shifts to the white level side of the video signal, the on-resistance of the switching circuit in the direction of the current flowing through the switching circuit composed of transistor Q2 etc. If the switching circuit is configured with an asymmetrical switching circuit so that the on-resistance of the switching circuit is smaller than the on-resistance of the switching circuit in the opposite direction, an asymmetrical clamping operation that can achieve the object of the present application can be achieved. The clamp output is sent to the sampling hold circuit 52 through an emitter follower type transistor Q3.
As shown in the figure, this hold circuit 52 is composed of a symmetrical switching transistor Q4 and a hold capacitor 57.

As a symmetrical transistor Q, LEC (LowEmi
A sampling pulse Pi obtained corresponding to the chrominance reference portion is supplied to its base terminal 52a. Therefore, the video detection outputs shown in FIGS. 3A and 3B are sampled and held. The hold output is fed to a comparison circuit 53. In this example, a Schmitt trigger circuit is used as the comparison circuit 53, and a pair of transistors Q5 making up this circuit
, Q6, for example, the transistor Q5, is supplied with the above-mentioned hold output, and the other transistor Q8 is supplied with the reference voltage VR.

As the reference voltage VR, a voltage divided by resistors 58A to 58C is used. This reference voltage VR is the detection level L shown in FIG. 3, and if the hold output in the chrominance reference part is larger than this detection level L, the terminal connected to the collector side of the transistor Q A discrimination output Rc is obtained at 53a. In the case of FIG. 3A, the discrimination output Pc is obtained, and even with the video detection output containing noise N as shown in FIG. 3B, the chrominance reference signal Sv
If the level of c is equal to or higher than the detection level L, a discrimination output Pc is obtained.

However, as shown in Figure 4B, the input electric field is weak and S
In the case of a degraded video detection output of /N, the level of the chrominance reference signal Svc naturally falls below the detection level L as shown in the figure, so in this case, even if the VIR signal SI exists, It is determined that this does not exist. As a result, in a weak electric field, the received signal with degraded S/N is not automatically corrected by the VIR signal S, and the volume is 4.
The color and hue are adjusted to those set in 5 and 65. Although the detection level L can be set arbitrarily, it can be said that it is most ideal if it is selected as shown in FIG. 8, for example. FIG. 8 is a diagram showing the relationship between input electric field strength and noise, where curve M shows the AGC output and curve M2 shows the noise level at that time.
If the input level is above X, the AGC operation will work, but in this state there are relatively many errors. Taking this into consideration, in this example, the AGC operation works and the video detection output is:
Assuming an input level of X2, for example, in which a predetermined level relationship is maintained and there is a relatively large amount of noise, if the input level is below X2, the VIR signal S
, is controlled so that automatic correction by the VIR signal is not performed.

That is, X2 becomes the detection level L (that is, LU). Figure 3B
is an example of an input level of X2 or higher, and Fig. 4B shows the S/N
This example shows a case where the input level is very poor, for example, sudden. As described above, the present invention has the feature that the presence or absence of the Vm signal S can be reliably determined with an extremely simple determination circuit, and that malfunctions thereof can be eliminated. In addition to this feature, it is also possible to detect the noise level at the same time, so even if the VIR signal S, exists, in a state where the S/N is degraded, the VI
As a result of not performing automatic correction using the R signal S, it is possible to prevent deterioration of image quality. Of course, with the configuration of the present invention, even when the nozzle N is not considered, the VIR signal S can be reliably determined. In the above embodiment, the video detection output is used as the signal input to the discrimination circuit 50, but it is of course possible to use the luminance signal itself.

That is, even if the output obtained from the trap circuit 11 is supplied to the input terminal 50a of the clamp circuit 51, the same operation can be performed. Furthermore, in the discrimination circuit 50, pulse clamping is performed at the synchronized portion of the video detection output, but the same effect can be obtained by performing this at the vedestal portion and clamping this vedestal level. be.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of a VIR signal, FIGS. 2 to 4 are diagrams used to explain the present invention, and FIG. 5 is an example of a case where the VIR signal discrimination circuit according to the present invention is applied to a television receiver. The system diagram, FIGS. 6 and 8 are diagrams for explaining the operation thereof, and FIG. 7 is a specific configuration diagram showing an example of the VIR signal discrimination circuit. 50 is a discrimination circuit for the VIR signal S, 51 is a clamp circuit, 52 is a sampling hold circuit, 53 is a comparison circuit,
4. 6 and 66 are signal conversion circuits, 48 is a bell adjustment circuit,
23 is a phase modulation circuit, 9 is a color demodulation circuit, Pi, Pv
is the sampling pulse. Figure 1 Figure 8 Figure 2 Figure 3 Figure 4 Mountain boat Figure 6 Figure 7

Claims (1)

[Claims] 1 A capacitor, a switching circuit that turns on at the clamp portion of the video signal, and a clamp voltage source are connected in series to the video signal source, and the level of the clamp portion of the video signal shifts to the white level side of the video signal. the switching circuit is asymmetrically switched so that the on-resistance of the switching circuit in the direction of the current flowing through the switching circuit is smaller than the on-resistance of the switching circuit in the direction opposite to the direction of the current when the switching circuit is turned on; Detecting the signal level corresponding to the VIR signal section of the video signal via the capacitor,
A VIR signal discriminating circuit characterized in that the presence or absence of the VIR signal is determined based on the magnitude of this signal level.