JPS60231368A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法Info
- Publication number
- JPS60231368A JPS60231368A JP59086243A JP8624384A JPS60231368A JP S60231368 A JPS60231368 A JP S60231368A JP 59086243 A JP59086243 A JP 59086243A JP 8624384 A JP8624384 A JP 8624384A JP S60231368 A JPS60231368 A JP S60231368A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- type transistor
- semiconductor
- transistor portion
- semiconductor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
- H01L21/30612—Etching of AIIIBV compounds
- H01L21/30621—Vapour phase etching
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
- H10D30/475—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
- H10D30/4755—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/05—Manufacture or treatment characterised by using material-based technologies using Group III-V technology
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- General Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Element Separation (AREA)
- Junction Field-Effect Transistors (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59086243A JPS60231368A (ja) | 1984-05-01 | 1984-05-01 | 半導体装置の製造方法 |
US06/728,080 US4615102A (en) | 1984-05-01 | 1985-04-29 | Method of producing enhancement mode and depletion mode FETs |
EP85303057A EP0175437B1 (en) | 1984-05-01 | 1985-04-30 | Production of gaas enhancement and depletion mode hemt's |
KR1019850002915A KR890004456B1 (ko) | 1984-05-01 | 1985-04-30 | 반도체장치의 제조방법 |
DE8585303057T DE3566594D1 (en) | 1984-05-01 | 1985-04-30 | Production of gaas enhancement and depletion mode hemt's |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59086243A JPS60231368A (ja) | 1984-05-01 | 1984-05-01 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60231368A true JPS60231368A (ja) | 1985-11-16 |
JPH033935B2 JPH033935B2 (enrdf_load_stackoverflow) | 1991-01-21 |
Family
ID=13881366
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59086243A Granted JPS60231368A (ja) | 1984-05-01 | 1984-05-01 | 半導体装置の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60231368A (enrdf_load_stackoverflow) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62213173A (ja) * | 1986-03-14 | 1987-09-19 | Hitachi Ltd | 半導体装置の製造方法 |
JPS63222462A (ja) * | 1987-03-12 | 1988-09-16 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JPS63228673A (ja) * | 1987-03-18 | 1988-09-22 | Fujitsu Ltd | 化合物半導体集積回路装置及びその製造方法 |
JPH01152674A (ja) * | 1987-12-09 | 1989-06-15 | Fujitsu Ltd | ヘテロ接合電界効果トランジスタ |
US5021857A (en) * | 1988-11-29 | 1991-06-04 | Fujitsu Limited | Two dimensional electron gas semiconductor device |
KR100233830B1 (ko) * | 1996-08-28 | 1999-12-01 | 정선종 | 이-메스페트와 디-메스페트 제조용 기판 구조 및 제조방법과 이를 이용한 이-메스페트와 디-메스페트 구조 및 제조방법 |
US6078067A (en) * | 1996-09-27 | 2000-06-20 | Nec Corporation | Semiconductor device having mutually different two gate threshold voltages |
US6218685B1 (en) | 1998-01-08 | 2001-04-17 | Matsushita Electronics Corporation | Semiconductor device and method for fabricating the same |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6338872A (ja) * | 1986-07-30 | 1988-02-19 | 堂腰 純 | 氷の製法 |
-
1984
- 1984-05-01 JP JP59086243A patent/JPS60231368A/ja active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6338872A (ja) * | 1986-07-30 | 1988-02-19 | 堂腰 純 | 氷の製法 |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62213173A (ja) * | 1986-03-14 | 1987-09-19 | Hitachi Ltd | 半導体装置の製造方法 |
JPS63222462A (ja) * | 1987-03-12 | 1988-09-16 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JPS63228673A (ja) * | 1987-03-18 | 1988-09-22 | Fujitsu Ltd | 化合物半導体集積回路装置及びその製造方法 |
JPH01152674A (ja) * | 1987-12-09 | 1989-06-15 | Fujitsu Ltd | ヘテロ接合電界効果トランジスタ |
US5021857A (en) * | 1988-11-29 | 1991-06-04 | Fujitsu Limited | Two dimensional electron gas semiconductor device |
KR100233830B1 (ko) * | 1996-08-28 | 1999-12-01 | 정선종 | 이-메스페트와 디-메스페트 제조용 기판 구조 및 제조방법과 이를 이용한 이-메스페트와 디-메스페트 구조 및 제조방법 |
US6078067A (en) * | 1996-09-27 | 2000-06-20 | Nec Corporation | Semiconductor device having mutually different two gate threshold voltages |
US6218685B1 (en) | 1998-01-08 | 2001-04-17 | Matsushita Electronics Corporation | Semiconductor device and method for fabricating the same |
Also Published As
Publication number | Publication date |
---|---|
JPH033935B2 (enrdf_load_stackoverflow) | 1991-01-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |