JPS60224236A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS60224236A
JPS60224236A JP8041884A JP8041884A JPS60224236A JP S60224236 A JPS60224236 A JP S60224236A JP 8041884 A JP8041884 A JP 8041884A JP 8041884 A JP8041884 A JP 8041884A JP S60224236 A JPS60224236 A JP S60224236A
Authority
JP
Japan
Prior art keywords
resin
pellet
sheet
plastic sheet
pellets
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8041884A
Other languages
English (en)
Inventor
Nobutoshi Takebashi
信逸 竹橋
Fujiko Kinoshita
木下　富士子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP8041884A priority Critical patent/JPS60224236A/ja
Publication of JPS60224236A publication Critical patent/JPS60224236A/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
    • H01L2221/68322—Auxiliary support including means facilitating the selective separation of some of a plurality of devices from the auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H01L2221/68336—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding involving stretching of the auxiliary support post dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、半導体装置の製造方法に関し、特に半導体ベ
レットのダイボンド方法に関するものである。
従来例の構成とその問題点 従来の樹脂によるダイポンディング方法（特開昭５９−
６５５１号）を第１図を用いて説明する。
同図（ａ）において、半導体素子が形成さ扛た半導体ウ
ェハ１に同図（ｂ）に示す通りダイに沿って縦横に溝２
を形成する。次に同図（Ｃ）の通りペレットマウント用
樹脂４（以下樹脂と称す）を塗布したプラスチックシー
ト３にウェハ１を貼付ける。しかるに同図（ｄ）で樹脂
が塗布さ扛てないプラスチックシート５で半導体ウェハ
１にかぶせ、同図（ｅ）において、縦横方向にローラー
等で圧力を加え、さきに形成した溝２で個々のベレット
７に分割する。６は個々のペレットの分割部である。し
かるのち半導体ウェハにかぶせたプラスチックシート６
を除去し、同図（イ）のごとく、樹脂４を形成したプラ
スチックシート３を引き伸しベレットの間隔８をひろげ
ると個々に分割さｎ、適当間隔にプラスチックシート３
に配列されしかも下面に樹脂４が付着したベレット了が
得ら牡る。同図（ｑ）における７はペースト状マウント
材料が付着した１個のペレットである。
次に第２の従来例を第２図を用いて説明する。
なお各部の番号は第１図と同じである。第２の従来例が
第１の従来例と異なる点は第２図（ｂ）に示すとおり樹
脂４をプラスチックシートではなく半導体ウェノ・１の
裏面に塗布した点である。次に同図（Ｃ）において、前
記樹脂４を塗布した半導体ウエノ・１をプラスチックシ
ート３に貼付けると第１図（Ｃ）と同じ状態となる。以
後の工程は第１図と同じである。しかし、以上の第１．
第２の従来例によると次の様な問題点が生じる。
（１）半導体ウエノ・分割においてプラスチックシート
ラかぶせるという工程が必要となって自動化がむずかし
くなる。
（２）半導体ウェハ表面がプラスチックシートと接触し
、しかも加圧されるので、半導体ウエノ・に損傷を及ぼ
し、いちじるしく歩留りを低下させる。
（３）分割という工程が必要である。
（４）半導体ウェハ表面からの加圧による分割は不可能
である。
（５）分割後プラスチックシー）ｆ引き伸ばすことによ
りペレット下部の樹脂がプラスチックシートの伸びに伴
ない移動、変形し、ベレット裏面に形成させることは不
可能である。
以上の様に問題点が多数有しており、実現性はきわめて
少ない。
発明の目的 本発明の目的は従来の問題点を解消した実現性のきわめ
て高いもので、効率的にかつ信頼性の高いダイボンドを
行なうことを目的とする。
発明の構成 本発明の構成は、プラスチックシートに樹脂を介してウ
ェハを貼付け、ウェハと樹脂層に溝を形成すせ、前記フ
ィルムシートよりペレットを取りはずす工程において前
記ペレット裏面に樹脂材料を転写形成し、しかるのちペ
レットのダイボンドを行う方法である。
実施例の説明 本発明の実施例を図面を用いて説明する。
第３図は本発明に用いるプラスチックシートの構成を示
したもので、ベースとなるプラスチックシート１１の一
主面に樹脂層１２を形成させる。樹脂１２は硬化の初期
段階でいわゆるＢステージ状態であることが望ましい。
次にこれを用いた本発明のダイボンド方法の実施例を第
４図に示す。なお図面に用いる番号は第３図と同じであ
る０同図（−）において、プラスチックシート１１に形
成した樹脂１２の面に半導体ウェハ１３を貼付ける。同
図（ｂ）において、貼付けら扛たウェノ・１３と樹脂１
２の両方にフルダイシングにより溝１４を形成させる。
これによって形成された溝１４よりウェノ１１３は個々
のペレットに分離さｎ１分割工程が不要になり、又、分
割の際の加圧によるペレットの損傷がない。
次に同図（Ｃ）において、プラスチックシート１１を引
き伸ばさない状態にリング１７等で保持し、プラスチッ
クシート１１下よりつきあけピン１６でペレット１６を
つきあげペレット１６の裏面に樹脂１２を転写形成させ
、プラスチックシート１１より取りはずすことにより、
樹脂１２が裏面に付着したペレット１６を得る。この時
、プラスチックシート１１は引き伸ばさず保持固定さ扛
ているため、ベレット１６下部の樹脂層１２はプラスチ
ックシート１１の伸びによる移動、変形を起こすことが
なく、これによってペレット１５の裏面へ確実に樹脂１
２が転写形成さ扛、ペレット１６の取りはずしか容易と
なる。同図（ｊ）において１６はプラスチックシートよ
り取りはずしたペレットで、１２は裏面に形成した樹脂
である。
こうしたのち、樹脂１２を介してペレット１６を適当な
支持基板（図示せず）にダイボンドする。
なお、使用する樹脂１２の材料は熱硬化性および熱可塑
性樹脂を単独で用いてもよいが、導電性。
熱伝導性を高めるためＡｑ等の導電性材料を混入させて
も良い。導電性樹脂１２を用いることにより、支持基板
との良好な電気的接続を得ることが可能となる。
発明の効果 以上の説明より明らかな通り、本発明は、ダイシング時
に半導体ウェハと樹脂層に溝を形成させることによって
、分割工程が不要となり、分割時に発生していた半導体
ペレットの損陥が抵下し、工程の自動化が比較的簡単に
行なうことが串来る。
又、プラスチックシートを引き伸ばさないため半纏体ペ
レット下部の樹脂層の移動、変形が発生せず、前記半導
体ペレットをプラスチックシートより取りはずしか容易
に行なえ、さらに半導体ペレット裏面への樹脂の転写形
成が確実に行なうことが可能になる。
【図面の簡単な説明】
第１図（ａ）〜（ｑｌおよび第２図（ａ）〜（ｑ）は従
来における半導体ペレットのダイボンド方法（特開公昭
５９−６５５１）ｉ示す工程図、第３図は本発明に用い
るプラスチックシートの構造断面図、第４図（ｃＬ）〜
＜ａ）は第３図を用いたダイボンド方法の実施例を示し
た工程図である。 １１・・・・・・プラスチックシート、１２・・・・・
・樹脂（層）１４・・・・・・溝、１５・・・・・・半
導体ペレット。 代理人の氏名　弁理士　中　尾　敏　男　ほか１名第１
図 第１図 げン 第２図

Claims (1)

    【特許請求の範囲】
  1. と、前記半導体ウェノ・および前記樹脂材料層に溝を形
    成する工程と、前記シートから前記半導体ベレットを取
    りはずして、前記半導体ベレ・ント裏面に前記樹脂材料
    層を転写形成する工程と、前記樹脂材料層を介して前記
    半導体ベレットをダイボンドする工程を含むことを特徴
    とした半導体装置の製造方法。
JP8041884A 1984-04-20 1984-04-20 半導体装置の製造方法 Pending JPS60224236A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8041884A JPS60224236A (ja) 1984-04-20 1984-04-20 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8041884A JPS60224236A (ja) 1984-04-20 1984-04-20 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
JPS60224236A true JPS60224236A (ja) 1985-11-08

Family

ID=13717740

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8041884A Pending JPS60224236A (ja) 1984-04-20 1984-04-20 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS60224236A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1246236A1 (en) * 2001-03-30 2002-10-02 Lintec Corporation Semiconductor chip carrying adhesive tape/sheet, semiconductor chip carrier, semiconductor chip mounting method and semiconductor chip packaging body
EP1521299A3 (en) * 2003-10-02 2005-10-05 Sony Corporation Method of mounting a semiconductor chip with an adhesive film and apparatus using the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1246236A1 (en) * 2001-03-30 2002-10-02 Lintec Corporation Semiconductor chip carrying adhesive tape/sheet, semiconductor chip carrier, semiconductor chip mounting method and semiconductor chip packaging body
EP1521299A3 (en) * 2003-10-02 2005-10-05 Sony Corporation Method of mounting a semiconductor chip with an adhesive film and apparatus using the same
US7214567B2 (en) 2003-10-02 2007-05-08 Sony Corporation Method of producing semiconductor package, apparatus for producing semiconductor package, and adhesive film

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