JPS60209186A - Voltage detecting circuit - Google Patents

Voltage detecting circuit

Info

Publication number
JPS60209186A
JPS60209186A JP6552384A JP6552384A JPS60209186A JP S60209186 A JPS60209186 A JP S60209186A JP 6552384 A JP6552384 A JP 6552384A JP 6552384 A JP6552384 A JP 6552384A JP S60209186 A JPS60209186 A JP S60209186A
Authority
JP
Japan
Prior art keywords
transistor
voltage
diode
terminal
emitter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6552384A
Other languages
Japanese (ja)
Inventor
Koichi Fukaya
深谷 弘一
Haruo Niki
仁木 春生
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC Corp
Nippon Electric Co Ltd
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd, NEC IC Microcomputer Systems Co Ltd filed Critical NEC Corp
Priority to JP6552384A priority Critical patent/JPS60209186A/en
Publication of JPS60209186A publication Critical patent/JPS60209186A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To detect the difference between electric signals with optional voltages by applying signals to be compared to the base and emitter of a transistor Tr, and leading out the collector output of the Tr through a current mirror circuit. CONSTITUTION:The signals to be compared are supplied to detection terminals (a) and (b), the terminal (b) is connected to the base of the Tr Q1 through a diode D1 for level shifting, and the base of the Tr Q1 is biased by a constant current source (e). The terminal (a), on the other hand, is connected to the emitter of the Tr Q1 through a resistance R1, the collector output of the TrQ1 is applied to the current mirror circuit of a diode D3 and a Tr Q3 through the current mirror circuit of a diode D2 and a Tr Q2, and a resistance R2 is regarded as a load to obtain an output Vd at an output terminal (d). Further, a constant current source (f) is set equal to the current flowing through the Tr Q1 when the voltage between both terminals (a) and (b) is zero. Therefore, this detecting circuit detects the difference voltage between two signals with optional voltages without reference to the voltage at a power terminal (c).

Description

【発明の詳細な説明】 (技術分野) 本発明は電圧検出回路に関するもので、特に集積回路化
に適したものである。
DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a voltage detection circuit, and is particularly suitable for integration into an integrated circuit.

(従来技術) 従来の検出回路の多くは電源電圧で比較すべき電気信号
を受ける電源回路を駆動しているので。
(Prior art) Most conventional detection circuits use power supply voltage to drive a power supply circuit that receives electrical signals to be compared.

比較すべき電気信号が電源電圧よシも高いともはや比較
検出することができなかった。
If the electrical signal to be compared was higher than the power supply voltage, comparison could no longer be detected.

(発明の目的) 本発明の目的は、任意の電圧を持つ電気信号の差を検出
する事ができる電圧検出回路を提供することにある。
(Object of the Invention) An object of the present invention is to provide a voltage detection circuit that can detect a difference between electrical signals having arbitrary voltages.

(発明の構成) 本発明によればトランジスタのペースおよびエミッタに
比較すべき信号を加え、このトランジスタのコレクタ出
力をカレントミラー回路により取り出した電圧検出回路
を得る。
(Structure of the Invention) According to the present invention, a voltage detection circuit is obtained in which a signal to be compared is applied to the pace and emitter of a transistor, and the collector output of this transistor is extracted by a current mirror circuit.

(発明の実施例) 以下に、図面を参照して本発明をよシ詳細に説明する。(Example of the invention) The present invention will be explained in detail below with reference to the drawings.

第1図は本発明の一実施例である。a及びbは検出端子
で、各検出端子a、bにはそれぞれ比較される信号が与
えられる○Cは電源供給端子、dは出力端子である。検
出端子すはレベルシフト用のダイオードD、を通してト
ランジスタQ1のベースに接続されている。トランジス
タQ1のベースは定電流源1によシバイアスされている
。検出端子(a)は抵抗R1を介してトランジスタQ1
のエミッタに接続されている。トランジスタQ】のコレ
クタからの出力はダイオードD2とトランジスタQ2と
のカレントミラー回路を介してダイオードD3とトラン
ジスタQ3とのカレントミラー回路に加えられ、抵抗ル
を負荷として出力端子dから出力Vdが取シ出されてい
る。定電流源2は雨検出端子a、b間の電圧が零の時に
トランジスタQ1に流れる電流と等しく設定されている
FIG. 1 shows an embodiment of the present invention. A and b are detection terminals, and signals to be compared are given to each detection terminal a and b. ○C is a power supply terminal, and d is an output terminal. The detection terminal S is connected to the base of the transistor Q1 through a level shifting diode D. The base of transistor Q1 is biased by constant current source 1. The detection terminal (a) is connected to the transistor Q1 via the resistor R1.
is connected to the emitter of The output from the collector of transistor Q is applied to the current mirror circuit of diode D3 and transistor Q3 via the current mirror circuit of diode D2 and transistor Q2, and the output Vd is taken from output terminal d with resistor L as a load. It's being served. The constant current source 2 is set to be equal to the current flowing through the transistor Q1 when the voltage between the rain detection terminals a and b is zero.

いま、雨検出端子a、b間の電圧をvsとすると、ダイ
オードD1.トランジスタQ1及び抵抗R1の間には次
の関係が成立している。
Now, if the voltage between rain detection terminals a and b is vs, the diode D1. The following relationship holds true between transistor Q1 and resistor R1.

vS十v、□=:=IQ0.R1+VBB□ ・旧・・
・・・(1)ただし、VFI:ダイオードDlQ順方向
電圧VBE□ニド2ンジスタQtのベース・エミッタ間
電圧に:ボルツマン定数 T:絶対温度 q:電子の電荷 I8D:ダイオードDIの飽和電流 ■8Q:トランジスタqの飽和電流 I8:定電流源1の電流 Iqx:)2ンジスタQtのエミッタ電流これらよシ、
トランジスタQ1のエミッタ電流は IQI=(V8+
ΔVBB)/R□ ・・・・・・・・・(4)と表され
る〇 これよシ、出力端子dの電圧Vdは、トランジスタQ1
. Q2. Qaの電流増幅率が大きい場合ベース電流
を無視することができ、次式の様になる。
vS tenv, □=:=IQ0. R1+VBB□ ・Old・・
...(1) However, VFI: diode DlQ forward voltage VBE □ Nido 2 transistor Qt base-emitter voltage: Boltzmann constant T: absolute temperature q: electron charge I8D: saturation current of diode DI ■8Q: Saturation current I8 of transistor q: Current Iqx of constant current source 1:) Emitter current of transistor Qt
The emitter current of transistor Q1 is IQI=(V8+
ΔVBB)/R□ ・・・・・・・・・(4) 〇Otherwise, the voltage Vd of the output terminal d is the voltage Vd of the transistor Q1
.. Q2. When the current amplification factor of Qa is large, the base current can be ignored, and the following equation is obtained.

Va= (IQ、 −I2)・烏 ・・・・・・・・・
(6)ただム■2:定電流源2の電流 ここで、I2はvs=00時の電流と等しく設定されて
いて、式(4)、 (5)よシ I2=ΔVBF、@A、 ・・・・・・・・・(7)た
だしΔVBE(0):VS:Oの時のΔVBEIQI(
0):VS=0の時の工Q1 と表される。
Va= (IQ, -I2)・Crow ・・・・・・・・・
(6) 2: Current of constant current source 2 Here, I2 is set equal to the current when vs = 00, and according to equations (4) and (5), I2 = ΔVBF, @A, ・・・・・・・・・・(7) However, ΔVBE(0):ΔVBEIQI( when VS:O
0): Expressed as Q1 when VS=0.

このように1式(4)〜(8)から出力端子dの電圧V
dは、 V(1=(VB+ΔVBE−ΔVnn(o))4’Lz
/ILI −”(’1■d:8:■5−R2/R,1・
・・叫・・(財)となシ、出力端子dには雨検出端子a
、b間の差電圧■5にほぼ比例した電圧Vdが発生する
仁とになる0 ところで、比較すべき電圧を受ける検出端子a。
In this way, from Equations 1 (4) to (8), the voltage V at output terminal d
d is V(1=(VB+ΔVBE−ΔVnn(o))4'Lz
/ILI-”('1■d:8:■5-R2/R,1・
・・Shouts・・(Foundation) Tonashi, output terminal d has rain detection terminal a
, b generates a voltage Vd that is approximately proportional to the voltage difference between 5 and 5. By the way, the detection terminal a receives the voltage to be compared.

bはトランジスタQ1のベースとエミッタに接続されて
おシ、回路の電源端子Cとは分離されている。
b is connected to the base and emitter of the transistor Q1, and is separated from the power supply terminal C of the circuit.

従って、この検出回路は電源端子Cの電圧とは無関係に
任意の電圧をもつ2つの信号の差電圧を検出することが
できる。すなわち、電源電圧よシも電圧の高い信号の差
電圧をも検出できる。
Therefore, this detection circuit can detect the difference voltage between two signals having arbitrary voltages, regardless of the voltage at the power supply terminal C. That is, it is possible to detect a voltage difference between signals having a higher voltage than the power supply voltage.

次に、第2図に本発明の他の実施例を示す。この実施例
では第1図の実施例にさらに抵抗几3.R4゜R,、R
6をカレントミラー回路を構成しているダイオードとト
ランジスタのオフセットを抑えるために付加している。
Next, FIG. 2 shows another embodiment of the present invention. In this embodiment, in addition to the embodiment shown in FIG. 1, a resistor 3. R4゜R,,R
6 is added to suppress the offset between the diode and transistor that constitute the current mirror circuit.

雨検出端子a、b間の抵抗R8は、電流検出用の抵抗で
あシ、電圧を直接比較する場合には必要ない。なお、第
1図と同一記号の素子及び端子は同一物を示す。
The resistor R8 between the rain detection terminals a and b is a resistor for current detection, and is not necessary when directly comparing voltages. Note that elements and terminals with the same symbols as in FIG. 1 indicate the same items.

第2図の実施例では、雨検出端子a、b間の電圧vsと
出力端子dの電圧vdとの関係は、第1図の実施例と同
じであるが、検出端子a、b間に挿入した抵抗R8によ
、り電流値を検出できる。すなわち。
In the embodiment shown in FIG. 2, the relationship between the voltage vs between the rain detection terminals a and b and the voltage vd at the output terminal d is the same as in the embodiment shown in FIG. The resistor R8 allows the current value to be detected. Namely.

抵抗几Sを流れる電流■oに対して ■、=几、・工0 ・・・・・・・・・・・・(ロ)と
なることから、式(6)、(6)よシVd中工0・R5
−R2/R,□ ・・・・・・・・・0劃となシ、等測
的に電流工oを検出している。
For the current ■o flowing through the resistor S, ■, = 几, · 0 ・・・・・・・・・・・・(B) Therefore, according to equations (6) and (6), Vd Medium engineering 0/R5
-R2/R, □ ・・・・・・・・・At 0, the current flow o is detected isometrically.

次に、第3図にさらに別の実施例を示す。この第3図に
おいても、第2図と同一記号の素子及び端子は同一物を
示している。相違点はダイオードD1の代りにNPN 
トランジスタQ4のベース・エミッタ間を使用している
ことである。周知の様に、ダイオードの順方向電圧とト
ランジスタのベース・エミッタ間電圧とは酷似している
ため、第3図の例でも第2図と同様の特性が得られるこ
とは明らかである。また第2図の実施例では、電流検出
用の抵抗R8を流れる電流■oとして定電流源1の電流
工1がそのまま含まれるが、これに対して第3図の実施
例ではトランジスタQ4のベース電流分しか含まれない
という効果があシ、電流工oの少ない回路に特に有効で
ある。
Next, FIG. 3 shows yet another embodiment. Also in FIG. 3, elements and terminals having the same symbols as those in FIG. 2 indicate the same elements. The difference is that NPN is used instead of diode D1.
The reason is that the area between the base and emitter of transistor Q4 is used. As is well known, since the forward voltage of a diode and the base-emitter voltage of a transistor are very similar, it is clear that the example shown in FIG. 3 can also obtain characteristics similar to those shown in FIG. 2. Furthermore, in the embodiment shown in FIG. 2, the current 1 of the constant current source 1 is included as is as the current ■o flowing through the current detection resistor R8, whereas in the embodiment shown in FIG. This method has the effect that only the current is included, and is particularly effective for circuits with a small amount of current.

以上の様に本発明によれば、検出回路を駆動する電源電
圧にかかわらず、任意の2つの電圧の差を検出し、この
差に比例した電圧を得ることができる電圧検出回路を実
現できる。
As described above, according to the present invention, it is possible to realize a voltage detection circuit that can detect a difference between any two voltages and obtain a voltage proportional to this difference, regardless of the power supply voltage that drives the detection circuit.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による電圧検出回路の一実施例を示す回
路図、第2図は本発明による別の実施例を示す回路図、
第3図はさらに別の実施例を示す回路図である○
FIG. 1 is a circuit diagram showing one embodiment of a voltage detection circuit according to the present invention, FIG. 2 is a circuit diagram showing another embodiment according to the present invention,
FIG. 3 is a circuit diagram showing yet another embodiment.

Claims (1)

【特許請求の範囲】 1)比較すべき信号を受ける第1および第2の端子と、
該第1の端子にエミッターが接続され。 該第2の端子にベースが接続されたトランジスターと、
該トランジスターのコレクタに入力部が接続されたカレ
ントミラー回路と、該カレントミラー回路から出力を取
シ出す手段とを含むことを特徴とする電圧検出回路。 2)前記カレントミラー回路は前記トランジスタのコレ
クターと接地電位間に接続された第1のダイオードと、
該第1のダイオードに並列にペース・エミッタ間が接続
された第2のトランジスタと、該m2のトランジスタの
コレクタと電源端子間に接続された第2のダイオードと
、該第2のダイオードにベース・三ミッタ間が並列に接
続された第3のトランジスタとを含むことを特徴とする
特許請求の範囲第1項記載の電圧検出回路。
[Claims] 1) first and second terminals receiving signals to be compared;
An emitter is connected to the first terminal. a transistor whose base is connected to the second terminal;
A voltage detection circuit comprising: a current mirror circuit having an input section connected to the collector of the transistor; and means for extracting an output from the current mirror circuit. 2) the current mirror circuit includes a first diode connected between the collector of the transistor and ground potential;
a second transistor connected between the pace and the emitter in parallel to the first diode; a second diode connected between the collector of the m2 transistor and the power supply terminal; and a base and emitter connected to the second diode. 2. The voltage detection circuit according to claim 1, further comprising a third transistor having three transmitters connected in parallel.
JP6552384A 1984-04-02 1984-04-02 Voltage detecting circuit Pending JPS60209186A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6552384A JPS60209186A (en) 1984-04-02 1984-04-02 Voltage detecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6552384A JPS60209186A (en) 1984-04-02 1984-04-02 Voltage detecting circuit

Publications (1)

Publication Number Publication Date
JPS60209186A true JPS60209186A (en) 1985-10-21

Family

ID=13289463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6552384A Pending JPS60209186A (en) 1984-04-02 1984-04-02 Voltage detecting circuit

Country Status (1)

Country Link
JP (1) JPS60209186A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01212364A (en) * 1988-02-19 1989-08-25 Matsushita Electric Ind Co Ltd Load current detection circuit
JP2016027336A (en) * 2015-08-27 2016-02-18 ラピスセミコンダクタ株式会社 Comparison circuit and semiconductor device
US9620982B2 (en) 2011-05-16 2017-04-11 Lapis Semiconductor Co., Ltd. Comparator circuit, semiconductor device, battery monitoring system, charging prohibition method, and computer-readable medium

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01212364A (en) * 1988-02-19 1989-08-25 Matsushita Electric Ind Co Ltd Load current detection circuit
US9620982B2 (en) 2011-05-16 2017-04-11 Lapis Semiconductor Co., Ltd. Comparator circuit, semiconductor device, battery monitoring system, charging prohibition method, and computer-readable medium
JP2016027336A (en) * 2015-08-27 2016-02-18 ラピスセミコンダクタ株式会社 Comparison circuit and semiconductor device

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