JPS6020608A - Differential amplifier circuit - Google Patents

Abstract

PURPOSE:To obtain a stable amplification characteristic by making a variable constant-current flow to an emitter follower transistor, adjusting its constant- current value, and offsetting its offset voltage. CONSTITUTION:Signals Vin1, Vin2 of the same potential are supplied through emitter follower transistors Q3, Q4 to the bases of differential amplification transistors Q1, Q2, respectively. In case when such an offset that an output voltage Vout1 becomes higher than Vout2 is generated, a Zener diode is short-circuited selectively so that a resistance value of a resistance circuit provided on the emitter of a transistor Q8 becomes small. As a result, a current I2 becomes large, a base-emitter voltage Vbe of the transistor Q4 becomes large, and an input voltage Vin2 supplied to the base of the transistor Q2 is made lower relatively than the other input voltage Vin1. In this way, a current flowing to the transistor Q2 decreases, and it is made equal to both output voltages Vout1, Vout2.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a differential amplifier circuit, and, for example, to a technique effective for a differential amplifier circuit that requires low offset.

[Background technology]

A differential amplifier circuit has an offset in which an output voltage appears even when the same input voltage is supplied due to variations in the characteristics of paired elements.

As an offset adjustment circuit for such differential amplification, a circuit as shown in FIG. 1 can be considered.

This circuit is composed of a resistance circuit made up of a plurality of series resistors provided at the collectors of differential transistors Ql and Q2 constituting an operational amplifier circuit, and a Zener diode provided in parallel with each resistance element. Then, in the probing process when the operational amplifier circuit including the offset adjustment circuit is completed on the semiconductor wafer, a breakdown current is supplied from the probe according to the measurement results to selectively destroy (short circuit) the Zener diode. do.

The inventor's research has revealed that such an offset adjustment method causes the following problems. That is, in the above-mentioned offset adjustment method, the load resistance value of the differential amplifier circuit is also changed, so that the differential amplifier circuit becomes unbalanced. Further, since a trimming circuit (pad, Zener diode) is connected to the load resistance circuit, the amplification characteristics are undesirably affected.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a differential amplifier circuit that realizes offset adjustment without adversely affecting the amplification operation.

The above and other objects and novel features of this invention include:
It will become clear from the description of this specification and the accompanying drawings.

[Requirements for invention]

A brief overview of typical inventions disclosed in this application is as follows.

In other words, an input voltage is supplied to the base of the differential amplification transistor via an emitter follower transistor, and a variable constant current source is provided at the emitter of the emitter follower transistor to adjust the constant current value to adjust the voltage between the base and emitter. By changing the offset, the offset is offset.

〔Example〕

FIG. 2 shows a circuit diagram of an embodiment in which the present invention is applied to an input stage differential amplifier circuit of an operational amplifier circuit. Each circuit element in the figure is formed on a semiconductor substrate such as silicon by a known semiconductor integrated circuit manufacturing technique.

In this embodiment, the differential amplification transistor Ql.

The common emitter of Q2 is connected to constant current source I.

In addition, the collectors of the differential amplification transistors Ql and Q2,
Each is connected to a load resistor RL. The following input bassine circuit is provided at the bases of the differential amplification transistors Ql and Q2.

That is, the input signals Vinl and Vin2 are respectively input to the emitter follower transistors Q3. It is supplied to the bases of differential amplification transistors Ql and Q2 via Q4. The emitter follower transistor Q3. The emitter of Q4 is provided with the following circuit for offset adjustment.

Although not particularly limited, transistor Q5. receiving a predetermined bias voltage VB. Q6, and a transistor Q7 for forming a variable constant current source. QB and series resistors 8R-R are each provided in series. In addition, each of the series resistors 8R-R has a Zener diode D1.
~D3 and D4~D6 are each provided in parallel form. Selectively destroy (short circuit) these Zener diodes
Therefore, pads P1 to P4 and P are connected to the connection points of each resistor.
5 to P8 are provided, respectively. The above transistor Q?
, QB are supplied with a constant voltage V ref.

When forming such a resistor trimming circuit on a semiconductor substrate, the emitter follower transistor Q3.
Q4 is often formed with a relatively large interval. For this reason, transistor Q5. The provision of Q6 prevents the wiring capacitance from intervening in the signal path and adversely affecting the signal transmission characteristics. Therefore, emitter follower transistor Q3. Q4 and a transistor Q7 that constitutes a constant current source. When the transistors QB and QB are formed close to each other, the transistors Q5 and Q6 may be omitted.

In this embodiment, 17 resistance values from R to 17R can be set by selectively shorting the Zener diodes D1 to D4. Therefore, (Vref −V
A constant current If (I2) of /R to (Vref - Vbe) /17R can be formed.

Now, when none of the Zener diodes are short-circuited, the resistance value of the resistor circuit is set to 17H. In addition, the input voltages V inl and V1, which have the same voltage value,
When an offset occurs in the relationship between the output voltages Voutl and Vout2 such that Voutl is higher than Vout2, in other words, when the current flowing through the transistor Q1 is smaller than the current flowing through the transistor Q2, the current flowing through the transistor Q8 The Zener diode is selectively shorted to reduce the resistance value of the resistor circuit provided at the emitter. As a result, the current ■2 increases, and the voltage Vbe between the base and emitter of the emitter follower transistor Q4 increases, and the input voltage Vin2 supplied to the base of the differential amplification transistor Q2 is relatively set to the other input voltage V. Lower than inl. This reduces the current flowing through the transistor Q2, making it possible to equalize the re-output voltages Voutl and Voutl.

Note that by setting the value of the resistor R to a sufficiently high resistance value that is higher than the voltage supplied across the resistor R, it is also possible to form a substantial constant current using only these resistor circuits. In this case, the transistor Q7. Q8 can be omitted.

Further, the trimming resistor circuit may be provided only on one emitter follower transistor Q3 or Q4 side. In this case, the bipolar offset can be dealt with by setting the resistance value of the fixed resistor within the resistance value adjustment range formed by trimming.

〔effect〕

(1) The substantial input voltage of the differential amplification transistor can be adjusted by the change in the voltage between the base and emitter formed by flowing a variable constant current through the emitter follower transistor. This provides the effect that the offset voltage can be offset.

(2) Since the variable constant current source for offset adjustment is separated from the signal path of the differential amplifier circuit, it is possible to obtain the effect that the parasitic capacitance of the offset adjustment circuit does not adversely affect the signal. .

(3) Since the offset adjustment circuit and the load circuit are separated, the load resistance will not become unbalanced due to offset adjustment. Therefore, it is possible to obtain the effect that the offset adjustment does not adversely affect the amplification characteristics.

(4) Buffer transistor Q7. By providing the QB, even if the trimming circuit and the differential amplifier circuit are separated from each other, their wiring capacitance and the like are not included in the signal path. Therefore, the effect of increasing the degree of freedom in layout can be obtained.

Although the invention made by the present inventor has been specifically explained based on Examples above, this invention is not limited to the above Examples (although it is possible to make various changes without departing from the gist of the invention). For example, as the offset adjustment circuit using resistor trimming, various embodiments can be adopted, such as one using fuse means formed of a polysilicon layer or the like instead of a Zener diode. The specific circuit configuration of the source can take various embodiments.

[Application field]

INDUSTRIAL APPLICABILITY The present invention can be widely used in devices including a differential amplifier circuit configured with a semiconductor integrated circuit and having a built-in offset adjustment circuit.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an example of an offset adjustment circuit considered prior to the present invention, and FIG. 2 is a circuit diagram showing an embodiment of the present invention.

Claims (1)

[Claims] 1. A differential amplification circuit including differential amplification transistors Ql and Q2 and load means provided at the collectors of these transistors Ql and Q2, respectively; Transistor Ql. emitter-follower transistors Q3.Q2, each transmitting an input signal to the base of Q2. Q4 and these transistors Q3. A differential amplifier circuit comprising: a variable constant current source that forms an emitter current of Q4. 2. The variable constant current source includes a plurality of resistive elements in series, and a Zener diode that is provided in parallel with each resistive element and selectively short-circuited. Differential amplifier circuit described in Section 1. 3. The above transistor Q3. A transistor Q whose base is supplied with a constant voltage is connected between Q4 and the variable constant current source circuit.
5. 3. A differential amplifier circuit according to claim 1 or 2, characterized in that Q6 is provided respectively.