JPS60198649A - Loop detection control system - Google Patents

Abstract

PURPOSE:To detect quickly a faulty loop and to prevent a secondary fault by comparing the contents of a node under execution with the input information given previously and at the same time starting a loop detection mechanism for each prescribed period of time. CONSTITUTION:A loop detecting part 5 consists of a comparison part 5-1, a loop check mode part 5-2, an input information memory part 5-3 and a node searching part 5-4. The part 5-1 check whether or not the input information stored in the part 5-3 is coincident with the present node detected by the part 5-4. The result of this comparison is informed to a control mechanism 4. The part 5-2 sets a loop mode according to the time counting signal informed from a time counting mechanism 6 when a prescribed period of time elapses. Then a node that is executed at that time point is stored to the part 5-3.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field of the Invention) The present invention relates to a loop detection control method, and particularly to a loop detection control method that uses hardware to detect destruction of a queue of an operating system or the like.

(Technical background and problems) If the operating system queue in a data processing device etc. is destroyed, the operating system may form an infinite loop and no longer execute normal jobs, or the secondary queue may destroy other areas. May cause damage.

For this purpose, a timer is provided, the timer forcibly activates an interrupt to the operating system at fixed intervals, and after the activation, software for detecting the infinite loop etc. described above is executed. , a method of detecting queue destruction, etc. can be considered. However, since this method detects queue destruction etc. using software, it is necessary to activate the interrupt frequently to perform prompt detection, resulting in a large overhead time.

There was a problem that the operating system could not tolerate.

(Objective and Structure of the Invention) An object of the present invention is to solve the above-mentioned problems, and by checking each node using hardware, there is no overhead required when using software. The objective is to quickly detect queue destruction, etc. Therefore, 1. the loop detection control method of the present invention is a loop detection control method for detecting queue destruction in an operating system, in which the first node address specified by the first node address and subsequently executed/or immediately before storing the first node address of the previously executed A node consisting of at least a direction/backward pointer, a node identifier for checking its own validity, and node selection information for displaying mutual relationships, and receiving various information for detecting an abnormal state. a timekeeping mechanism that sends out a timekeeping signal every predetermined period of time based on information from the control mechanism; a node search unit that sequentially detects the contents of the node being executed from the operating system; and the control mechanism. The information received by the node search unit compares the information received by the node search unit with the contents of the nodes sequentially detected by the node search unit, and when the clock signal is sent from the clock mechanism, the content of the predetermined node that was being executed at the time of sending the clock signal and the node The present invention is characterized in that it includes a comparison section that compares the contents of the nodes sequentially detected by the search section, and activates an interrupt to the operating system based on information from the comparison section.

(Example of the invention) A detailed description of the present invention will be given below with reference to the drawings.

FIG. 1 is a system configuration diagram of an embodiment of the present invention, FIG. 2 is a configuration diagram of an embodiment of the present invention, and FIGS. 3 and 4 are diagrams for explaining the configuration of an embodiment of the present invention. An explanatory diagram is shown.

In the figure, 1 is a loop detection mechanism, 2 is a positioning information section, 3 is a node address section, 4 is a control mechanism, 5 is a loop detection section,
5-1 is a comparison section, 5-2 is a loop check mode section, 5
-3 represents an input information storage unit, and 5-4 represents a node search unit.

In FIG. 1, numeral 1 in FIG. 2 is a loop detection mechanism, which is related to the present invention. When the loop detection mechanism 1 detects a predetermined node from an operating system (not shown) based on the input information (2) notified from the positioning information section 2, or when it detects a termination condition, the loop detection mechanism 1 converts the address of the node into the illustrated node address. 3 (for example, by setting a flag in a predetermined bit). On the other hand, if an infinite loop or the like is detected as will be described later, the illustrated program interrupt is executed. Then, in response to the interrupt, the operating system executes predetermined processing 2, such as loop detection and recovery.

FIG. 2 shows a specific configuration diagram of the loop detection mechanism 1 shown in FIG. 1.

The control mechanism 4 in the figure receives the input information (■) notified from the illustrated positioning information unit 2 (FIG. 1), performs various controls, and sends out instructions (■) for interrupting the program as described above or for normal termination. .

In the figure, the loop detection section 5 includes the comparison section 5-1. Loop check mode section 5-2. It is composed of an input information storage section 5-3 and a node search section 5-4.

The comparison unit 5-1 compares whether or not the input information stored in the input information storage unit 5-3 matches the current node detected by the node search unit 5-4. The comparison result (result of node detection or abnormal state detection, etc.) is notified to the control mechanism 4.

The loop check mode section 5-2 sets a so-called loop mode, which will be described later, based on a clock signal (2) notified from the clock mechanism 6 when a predetermined period of time has elapsed. By setting a predetermined node, for example, the clock signal ■
The node being executed at the time of notification is stored in the input information storage section 5-3, and the stored node and the nodes sequentially detected by the node search section 5-4 are compared to the comparison section 5.
-1 and the result is notified to the control mechanism 4.

The timing mechanism 6 receives the measurement start signal notified from the control mechanism 4.
After a predetermined period of time has elapsed, the clock signal (2) is notified to the loop check mode section 5-2 in the loop detection section 5. The loop mode is set by the notification as described above.

In this way, the present invention prevents an infinite loop, etc. by comparing the nodes that are being executed sequentially with the predetermined nodes based on the input information (■) or the nodes that were being executed when the clock mechanism 6 notified the clock signal (■). Since the system detects abnormalities in the software, problems such as overhead time that occur when using conventional software can be solved. The operation will be explained in detail below.

FIG. 3 shows an example of a node configuration for explaining the operation of the configuration of one embodiment of the present invention shown in FIG.

The illustrated nodes 1 to 3 are each specified by the illustrated first node address. Each node is composed of a forward pointer, a backward pointer, a node identifier, node selection information, etc., and is located a predetermined distance from the start address.

That is, "01", "02", "03" and "04" shown in the figure.
are stored in each. The lengths of each node identifier and node selection information are shown as "It3" and "1", respectively.
4″.

Each forward pointer stores the first node address of the node on the right side in the figure, which will be processed next. In addition, each backward pointer stores the start node address of the node on the left side of the figure that was processed immediately before. By adopting such a node configuration, queue destruction can be easily detected using the hardware according to the present invention.

FIG. 4 is an explanatory diagram illustrating the operation of one embodiment of the present invention shown in FIG. 2 using the node configuration shown in FIG. 3.

■ in the figure indicates a state in which it is determined whether the content stored in the backward pointer in the first node (node 1 shown in Figure 3) is the same as "A2" given in advance as input information ■. . In the case of YF and S, it is normal, so the condition is ■
Run the following: N.

In this case, the contents of the backward pointer are incorrect, so the illustrated program is interrupted and then terminated.

Then, the operating system causes predetermined processing (abnormal state detection and repair processing) to be executed.

In the figure, ■ indicates a state in which it is determined whether the contents of the node identifier in the detected node 1 are the same as the contents "A5" given in advance as input information. If YES, it is normal, so execute the following steps. If NO, the contents of the node identifier in node 1 are incorrect, so the program is interrupted and then terminated. The node identifier is used to check the validity of the node itself.

In the figure, ■ indicates a state in which a comparison method of node selection information is determined. That is, it shows a state in which it is determined whether the content "A7" of the node selection information previously given as input information (2) is "1", "2" or "3". For example, “A
In the case of "A7-1", the state B [phase] is executed, in the case of "A7-2", the state ■ is executed, and in the case of "A7=3", the state @ is executed.

For example, state 1 [phase] indicates a state in which it is determined whether the value of the node selection information in the node currently being executed is smaller than the node selection information "A6" which is input information (2) given in advance. If YES (A6>node selection information)
Since predetermined node selection information (such as a code given to a series of related nodes) is detected, the current top node address is set in the output node register according to "A", that is, the state [phase] shown in the diagram. Reset flag (CC=O
) to end the series of processing. On the other hand, in the case of NO, the following steps are executed in state ①. The process is similarly executed for the cases of state @ (A6 = content of node selection information) and state - (A6 = content of node selection information).

``■'' in the figure indicates that the contents of the forward pointer in the detected node 3 in Figure 3 are previously given as input information ``A''.
3". If YES, the current head node address is set in the output node register (as shown in the figure).

Set the flag to 7) (CC=1) and end the series of processing. In the case of No, the following steps are executed for the state [phase].

In the figure, [phase] indicates a state in which processing is sequentially executed in the forward direction by setting the content indicated by the forward pointer as the value of the current head node address. And state @ is when executed in the above state [phase].

This shows a state in which it is determined whether the contents of the backward pointer within a node match the start node address of the node executed immediately before (immediately). If YES, execute the following steps for state [phase]. If NO, it is abnormal and the program is interrupted after the above-mentioned program interrupt.

In the figure, [phase] indicates the state in which the loop check mode is set. The loop check mode is set by notifying the loop check mode section 5-2 in the loop detecting section 5 of the clock signal (2) from the clock mechanism 6 shown in FIG. YES
In the case of , a check is performed to see if an abnormal loop or the like below the state [phase] has occurred. If No, the predetermined time has not yet passed and there is no need to perform a loop check.

Input information previously notified from the positioning information unit 2 shown in FIG. 1 to the control mechanism 4 shown in FIG. 2 in the loop detection mechanism 1
State ■ or [phase] is repeatedly executed based on.

In the figure, [phase] indicates a state in which it is determined whether the current node is equal to the loop check node. That is, the clock signal ■ is notified from the timing mechanism 6 shown in FIG. 2 to the loop check mode unit 5-2, and the node (loop check node) is equal to the currently executing node. If YES, a loop has been formed and the process ends after the above-mentioned program interrupt is performed. In the case of NO, no loop is detected, so that the state ① and subsequent steps are repeatedly executed as described above.

(Effects of the Invention) As explained above, according to the present invention, the content of the node being executed is compared with the input information input in advance using the hardware, and the hardware The timekeeping mechanism activates the loop detection mechanism and uses hardware to detect abnormal loops by comparing the contents of the node at the time of activation with the contents of the currently running node. It is possible to eliminate the overhead when detecting such things. Therefore, secondary failures can be prevented by quickly detecting abnormal loops and the like, and the operating system can be repaired at an early stage.

[Brief explanation of the drawing]

FIG. 1 is a system configuration diagram of an embodiment of the present invention, FIG. 2 is a configuration diagram of an embodiment of the present invention, and FIGS. 3 and 4 are diagrams for explaining the configuration of an embodiment of the present invention. An explanatory diagram is shown. In the figure, 1 is a loop detection mechanism, 2 is a positioning information section, 3 is a node address section, 4 is a control mechanism, 5 is a loop detection section,
5-1 is a comparison section, 5-2 is a loop check mode section, 5
-3 represents an input information storage unit, and 5-4 represents a node search unit. Patent applicant Fujitsu Limited

Claims (1)

[Claims] In a loop detection control method that detects queue corruption in an operating system, a forward/backward pointer that is specified by the start node address and stores the start node address of the next/previously executed item, A node configured of at least a node identifier for checking and node selection information for displaying mutual relationships, a control mechanism for receiving various information for detecting an abnormal state, and information from the control mechanism. a clock mechanism that sends out a clock signal every predetermined time based on the lapse of time; a node search unit that sequentially detects the contents of the node being executed from the operating system; and information received by the control mechanism and the node search unit. The contents of the nodes sequentially detected are compared, and when the clock signal is sent from the clock mechanism, the contents of the predetermined node being executed at the time of the transmission are compared with the contents of the nodes sequentially detected by the node search unit. and a comparison section for comparing the values, and activating an interrupt to the operating system based on information from the comparison section.