JPS60196087A - Video signal transmitter - Google Patents

Abstract

PURPOSE:To attain correction with extremely reduced deterioration in picture quality by means of approximate picture elements by forming a sub-block after interleaving to provide an error detecting function for each sub-block and therefore dispersing the correcting picture elements in case an error remains. CONSTITUTION:An error correcting coder 4, an error correcting decoder 8 and a correcting part are added newly. The output data of a record side processor 3 is supplied to an interleaving device 46 via an input terminal 45. The device 46 interleaves the input data after changing their orders and impresses them to a subblock producer 47. The producer 47 divides the impressed data for each prescribed number and also produces an error detecting word and then a sub-block. The output of the producer 47 is impressed to a parity block producer 48 to produce the parity data to the prescribed sub-block length. Thus a parity block is produced. In such a way, the error corrected/coded data is applied to a modulator 5 via an output terminal 49.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a video signal transmission device for transmitting video signals, particularly for taking measures against errors occurring during transmission.

Conventional configurations and their problems Various types of deterioration occur in the process of transmitting and processing information. In order to avoid these deteriorations, various digital processing methods are being researched and developed. The same is true for video signals, and the transition to digital processing is being supported by the rapid development of semiconductor technology in recent years.

Therefore, a conventional example in which a video signal is digitally processed and transmitted will be described below.

FIG. 1 is a block diagram of a conventional example. In the same figure,
1 is an input terminal, 2il-j is an analog-to-digital converter (hereinafter referred to as ``A/D'', and is also referred to as ``'A/D'' in Fig. 1), 3 is a recording side processor, and 4 is an error correction code. 5 is a modulator, 6 is a transmission line, 7 is a decoder, 8 is an error correction decoder, 9 is a reproduction side processor, 1Q is a digital-to-analog converter (
(hereinafter referred to as “D/A”; also referred to as “D/A” in Figure 1),
11 is an output terminal. A video signal to be transmitted is applied to the A/D 2 via the input terminal 1. The A/D 2 digitizes the applied analog video signal.

The output of the A/D 2 is subjected to processing such as planking processing and band compression in a recording side processor 3, and then supplied to an error correction encoder 4. In the error correction encoder 4, preprocessing is performed so that errors occurring during the transmission process can be corrected on the reproduction side. The output of the error correction encoder 4 is digitally modulated by a modulator 5. As the modulation method, the optimum modulation method is selected based on the characteristics of the data string sent out from the error correction encoder 4 and the transmission characteristics of the transmission path 6 to be used. Note that many modulation methods such as FM, MFM, and block coding have been devised. The output of modulator 5 is guided to decoder 7 via transmission line 6. The decoder 7 performs the opposite operation to the modulator 6. Therefore, the output data string of the decoder γ will be equal to the data string input to the modulator 6 if no error occurs during the transmission process. The output of the decoder 7 is subjected to error correction by an error correction decoder 8, so that errors occurring between the modulator 5 and the decoder 7 are corrected. The playback side processor 9 performs the opposite processing to the recording side processor 3, and after processing the output of the error correction decoder 8, it is restored to an analog video signal by the D/A 10, and is sent to the output terminal 11. A reproduced video signal is sent out via the .

By the way, we have already mentioned that by digitizing information, the deterioration during the transmission process is reduced, but on the other hand, if an error occurs in the state of digital information, unlike analog information, it will cause extremely large signal deterioration. . Therefore, error correction is important in transmitting digital information.

Therefore, conventional examples of the error correction encoder 4 and error correction decoder 8 shown in FIG. 1 are shown in FIGS. 2 and 3.

FIG. 3 is a diagram showing waveforms and data strings showing a conventional example of an error correction encoder. In the same figure, 18p video signal,
24 is a horizontal synchronization signal, 26 is a horizontal planking period, 2
During the 5th transmission period, 19th to 23rd are the lines of the 1st month (2nd
27 to 31 are pixel blocks of the first line to pixel blocks of the sixth line, respectively.
32 is the output data of the error correction encoder, 39 to 43 are the first to fifth subblocks, 44 is the parity block, 33 to 38 are the error detection data, and x (1. 1) to x (s.s) are the first pixel data of the first line to the last pixel data of the fifth line, respectively, and P1 to P5 are the first data of the parity blocks 44 to the last pixel data of the parity blocks, respectively. Last data, 0
1 to CP are error detection data of the first sub-block 39 to error detection data of the parity block 44, respectively. The video (8) signal 18 corresponds to the video signal applied to the input terminal 1 and records fl+! Various processes are performed by the l processor 3, data in the horizontal blanking period 26 is removed, and pixel blocks 27 to 31 are applied to the error correction encoder 4.

Incidentally, in order to simplify the explanation, it is assumed that the number of lines in one field is five, and the number of pixels to be transmitted is five pixels per line.

Based on the above assumption, six pixels x(1.1) to X(1.6) from the first line 19 are sent to the error correction encoder 4VC. The error correction encoder 4 generates error detection data C1, which is redundant data to enable error detection, based on the input pixel data x(1.1) to X(1.6).
33 to configure the first subblock 39.

Thereafter, processing is performed in the same manner up to the fifth line 23. 033 to C37 are inserted as redundant data, but the data for water 15,000 planking period 26 has been removed, so
Furthermore, there is room to insert a parity block 44.

Various methods have been devised to create parity, but to simplify the explanation, we will assume simple parity. The first word '゜P1' of the parity block 44 is the first word X (1.1), X (2.1) of each sub-block.
，! (3.1),! For the simple parity of (4.1) and x (5.1), that is, for an integer n that satisfies 1≦n≦6 (however, the addition is for each bit in x(n,k))
P1 to P6 that satisfy addition modulo 2 are created. An error detection word Cp38 is added to these P1 to P5 to form a nokriti process 44. The data string 32 configured in this way becomes the output of the error correction encoder 4 ~ The error correction mechanism when an error occurs during the transmission process after being error-corrected encoded in this way will be explained next. .

Assume that an error occurs in the data input to the error correction decoder 8, that is, x(2.2) of the data string 32 in FIG. Since x(2.2) is incorrect, error detection is performed by the error correcting decoder 8, and as a result, it is detected that an error exists only in the second sub-block 40. Meanwhile, the calculation shown in equation (2) is executed.

As a result, only S2 becomes non-zero. As a result, it is found from S2 and the above-mentioned error detection result that an error exists in the second word x (2.2) of the second sub-block 40, and at the same time, the error is 82! (2.2) is completely corrected.

When the frequency of occurrence of errors is low, the errors are completely corrected as described above. However, as the frequency of occurrence of errors increases, multiple errors begin to occur within the same field. For example, if the error increases and errors exist in x(2.2) and the third word x(3.3) of the third sub-block 41, and if the second sub-block It is detected that errors exist in subblock 4o and third subblock 41. On the other hand, in the calculation result shown in equation (2), S2 and S3 are non-zero. However, in the case of erasure correction as in this example, even if errors can be detected, if errors are detected in a plurality of blocks, correction becomes impossible.

As described above, if error correction cannot be performed, a serious deterioration in the image quality will occur as the image reduction signal sent from the output terminal 11 is displayed on the monitor. Therefore, if the error is not completely corrected, it is necessary to correct the remaining error so that it does not become a visual problem.

The best method for correction is to use the correlation of the video signal, and in reality, it is usually a method that uses information on the immediately previous line or a method that uses information on the immediately previous field (or frame).

Next, the state of error correction and correction in the conventional example shown in FIGS. 1 and 3 will be described below with reference to the screen shown in FIG. 2. Figure 2 shows the screen on the monitor, with 12
is a screen, and 13 to 17 are the first to fifth lines, respectively.

As already mentioned, in this explanation, in order to simplify the explanation,
Since the number of lines in the field is limited to six lines, there are five lines 13 to 17 on the screen 12.

By the way, the case where error correction becomes impossible has already been explained with reference to FIG.
X (2.2) and x (3.
If an error exists in 3) at the same time, error detection is possible in both cases, but error correction is impossible. Therefore, in Fig. 2, deterioration occurs in the second pixel from the left on the second line 14 and the third pixel from the left on the third line 16, making it impossible to actually correct the errors. I don't get it. the result,
On the screen 12 in FIG. 2, the second lines 14 and 3
Here, the th line 16 will be modified.
Assuming that a method is adopted in which the information of the immediately preceding line is used for correction, the information of the first line 13 will be embedded in the second line 14, and the third line 15 will be embedded with the information of the second line 13. In-14 information (actually, the second line 14 is corrected with the first 2-in-13 information, so the third line/16 is also embedded with the first line 13 information) embedded.

Incidentally, since there is generally a strong correlation between adjacent lines, the correction effect is great, but if the correlation is low, an unnaturalness will occur on the reproduced screen, and new image quality deterioration will occur. This is a serious drawback of the conventional method. Therefore, there is a strong demand for a method that does not cause such deterioration.

Purpose of the Invention The present invention solves the above-mentioned conventional problems, and when correcting residual errors that could not be corrected by an error correction decoder,
By applying error correction coding so that the pixels that are corrected due to residual errors are distributed on the monitor screen, it is possible to interpolate with nearby images, and there is almost no new deterioration due to correction. The object of the present invention is to provide a video signal transmission device.

Structure of the Invention The present invention includes an interleaving means for rearranging and interleaving digitalized image information on the transmitting side, and an output from the in-speed one-leaving means, which divides the output into predetermined units and adds an error detection code to the sub. It is equipped with a sub-block creation means for creating a block, and a parity block creation means for creating a parity block by creating parity for the sub-block, and as a receiving side, detects an error.
a gap detecting means, a correcting means for correcting an error i by calculating an undromone and referring to the result of the error detecting means, a de-interleaving means for rearranging the outputs of the correcting means in the original order, and a de-interleaving means. This is a video signal transmission device characterized in that it is equipped with a correction means for performing correction. Furthermore, the above-mentioned correction method creates interpolated pixel data based on neighboring pixels. Select one of the outputs of the matrix and the output of the above-mentioned deinterleaving means. This is a video transmission system characterized by comprising a switch and a controller that generates a control signal based on the output of the error detection means and controls the switch.

Description of Examples - Examples of actual winding of the present invention will be described below. The present invention is intended to improve the drawbacks of the conventional method, that is, the deterioration that occurs when correcting errors, and the present invention is
The difference from the conventional example shown in the figure lies in the error correction encoder 4, error correction decoder 8, and correction section. Therefore, the present invention will be explained below with emphasis on these points with reference to FIGS. 4 to 9. First, FIG. 4 shows an embodiment of the error correction encoder in the present invention. It is a block diagram. In FIG. 4, 45 is an input terminal, 46 is an interleaper, 47 is a sub-block creator, 48 is a utility block creator, and 49 is an output terminal. The output data of the recording side processor 3 shown in FIG. 1 is input to the interleaver 46 via the input terminal 45. of the data input by the interleaver 46? After changing the order and interleaving, the signals are applied to the sub-brod generator 47. The sub-block creator 47 divides the applied data into a predetermined number of blocks, simultaneously creates error detection words, and creates sub-blocks. 48, parity data for a predetermined subblock length is created, and a parity block is created.The data encoded in this manner is sent to the modulator shown in FIGS. − is added to.

Next, FIG. 7 shows the relationship between waveforms and data strings used in one embodiment of the error correction encoder shown in FIG. 4. 7th tooth k
In, '62 to '66 are interleaved pixel blocks,
18 to 44 are the same as those in FIG. 3, so their explanation will be omitted.

The data strings of pixel blocks 2'7 to 31 are inputted to the input terminal 46 in FIG.
Convert from 2 to 66. Also, Saf'pu Rec Creator 47
Now, in response to interlinip pixel blocks 62-66,
Error detection data 33 to 38 are added at intervals of a predetermined number of pixels to create subblocks 39 to 43.

The parity block generator 48 creates a parity block '44 based on the output of the sub-block generator 4'7.
Create ゛. ′? Furthermore, in order to correlate the error correction encoding method shown in FIG. 4 with the pixels on the screen, a screen is shown in FIG. In this practical example, in order to simplify the explanation, we will use 1 as in Figure 3.
The number of lines in the field is 5 lines, and the number of transmitted pixels in one line is 5 pixels.

That is, in FIG. 8, there are five pixels in the horizontal direction and five lines in the vertical direction.

'(m,n)' written in each pixel means that it is sent as the nth word in the mth subblock in the output data 32 of FIG. 7. Pixels (1.1), (1.2) + (1
．． 3)+(1.4)l and (1.5) are respectively 1 in Figure 7.
These are the first to fifth signals in the second sub-block 39. That is, after being interleaved, the first sub-block 39 is one of the first lines 19.
the fourth pixel of the second line 20,
It is composed of the second pixel of the third line 21, the fifth pixel of the fourth line 22, and the third IWj element of the fifth line 23.

Next, a block diagram of an example of an error correction decoder according to the present invention is shown in FIG. In FIG. 6, 50 is an input terminal, 51 is an error detector, 62 is a pad corrector, 53 is a pad interleaver, and 54 is an output terminal. The output of the decoder 7 in FIG.
is applied to

The error detector 51 detects errors in one subblock of the input data string, determines whether or not an error exists in each subblock, and creates a pointer indicating the presence or absence of an error. Furthermore, the corrector 52 calculates syndromes for each subblock and parity block, and the error detector 5
The error is corrected by referring to the error detection result in step 1, that is, the state of the pointer. Further, the deinterleaver 53 performs reverse conversion to the original order. Of course, deinterleaver 53 performs the opposite operation to interleaver 46. As a result, the data string 32 of the seventh garden is input to the input terminal 50, and the output of the corrector 62 is sent to the interleaved pixel blocks 62 to 66, and the deinterleaver 63
The outputs become pixel processors 27-31.

Next, in an actual example of the present invention, the situation when an error occurs is shown below.
If an error exists only in the subblock, it is completely possible to correct the error, and no problem occurs. However, when the probability of error occurrence is high (h), the frequency with which errors occur simultaneously in a plurality of subblocks increases. If errors occur in multiple subblocks, they cannot be corrected and must be resorted to error correction.

Therefore, as an example of a case where error correction is impossible, assume that an error exists in the second pixel of the second sub-block and the third pixel of the third sub-block. In other words, "x'(2.2)'" in FIG.
3.3) Assume that an error exists in the location marked '''. Even if error correction decoding processing is executed in this state, the two errors cannot be corrected. By the way, if the second sub The second word x' (2.2) of the block 40 is the second pixel X (2.2) of the second line 2o, the third word X' (3.3) of the third sub-block 41 is the third pixel x (3.3) of the third line 21. Therefore, if these two errors remain uncorrected,
On the monitor screen, deterioration occurs in "(2.2)" and ゜'(3.3)''' in Figure 8.In order to reduce this deterioration, it is necessary to correct the book. In the explanation, since there is an error in the second sub-block 4o and the third sub-block 41, the pixels belonging to these two blocks are shown on the screen as the oval area in Fig. 8. These pixels with diagonal lines are not connected within the line, but rather are scattered throughout the screen.In other words, the pixels with diagonal lines are scattered among the pixels without diagonal lines. (In this explanation, it is assumed that the number of pixels and the number of lines constituting a sub-block are small values, so the pixels in the shaded area are relatively close to each other, but in reality they are not this close.) Therefore, the pixels in the shaded area can be interpolated using adjacent pixels.In this explanation, the modification will be explained below, assuming that the modification is performed by interpolating the immediately preceding pixel and the immediately succeeding pixel.

FIG. 6 is a block diagram showing an example of the configuration of a modification section in the present invention. In FIG. 6, 65 is the previous pixel data input terminal, 66 is the next pixel data input terminal, 58 I/i pixel data input terminal, 59 is a pointer input terminal, 67 is a matrix, 60 is a switch, 61 is a controller, 62 is a pixel data output terminal. In FIG. 1, a correction section is provided in the reproduction side processor 9, and it is necessary to perform correction before the D/A 10 restores the signal to an analog signal.

The data input to the modification section shown in FIG. 6 corresponds to pixel blocks 27 to 31 in FIG. Now, 2
Considering the moment when the third pixel X (2.3) of the pixel block 28 is applied to the pixel data input terminal 68,
The immediately preceding pixel data input terminal 55 has x(2.2'), and the immediately following pixel data input terminal 66 has x(2.2')! (2.4) is applied. Both of these are calculated by a matrix 57 to create pixel data for interpolation. If the picture gap signal we are dealing with is a black and white signal, then X(2.2)! (2.
The average value of 4) should be approximately equal to x(2.3).

Therefore, it is assumed that the average value of two pixels is calculated as the matrix 57. On the other hand, the error detector 51 shown in FIG. 5 determines whether or not an error exists, and as a result, a pointer is created and supplied to the corrector 62K. Mark this pointer on the controller 61 via the pointer input terminal 69? Add. The controller 61 distributes the input pointers at predetermined timings to create a control signal,
Controls switch 6o. The switch 6o is controlled by the controller 61 and selects the output of the matrix 57 at the timing of the pixel that requires modification, and at other times it is applied to the pixel data input terminal 58 and selects one of the outputs. The output of the switch 6o becomes modified data and is sent out via the pixel data output terminal 64.

The operation of this modification section will be further explained with reference to FIG.

FIG. 9 is a timing diagram showing the process of error correction decoding and modification, where 32 is a data string input to the error correction decoder 8, 62 to 66 are the outputs of the corrector 62 in FIG.
7 to 31 are the outputs of the deinterleaver 63, 67 is a pointer sent from the error detector 61, and 68 is a control signal generated by the controller 61 in FIG. It is assumed that there are errors in x'(2.2) and x'(3.3) in the data string 32, and in this case it is impossible to correct the error. Therefore, the interleaved pixel block 63 and interleaved pixel block 64 will be modified. Therefore, the pixels that require modification in the output data of the deinterleaver 63 are the shaded areas in the pixel blocks 27 to 31. On the other hand, the error detector 61 detects the presence of errors in the second and third subblocks, and outputs a pointer 67. The controller 61 distributes the pointer 67 and outputs a control signal 6 that becomes high level at the timing corresponding to the shaded portion of the pixel blocks 27 to 31.
Create 8. The switch 6o in FIG. 6 is controlled by the control signal 68, and when the control signal is 1:1-L/H, no correction is made, but only when it is at a high level, correction is performed.

Effects of the Invention As is clear from the above explanation, by configuring subblocks after interleaving and providing an error detection function in each subblock, pixels to be corrected in the event that errors remain are distributed. By using adjacent pixels, it is possible to perform retouching with extremely little deterioration in image quality.

In the description of the embodiments of the present invention, various assumptions are made to simplify the explanation, but the present invention does not only hold true under these assumptions; This makes it possible to perform very high-quality corrections with little deterioration when correcting errors that remain. Therefore, as a matter of course, the error correction encoding is not limited to erasure correction using simple parity and error detection as shown in FIGS. 7 and 9. Furthermore, although the range of interleaving is shown in a simplified manner in this explanation, it should be appropriate to the characteristics of the actual system, and of course, in reality, the number of lines in one field, etc. The number of pixels in one line is larger, which improves the effectiveness of the correction in the present invention. Furthermore, regarding the interpolation method during retouching, in this explanation we assume a black and white signal and use the average value of the preceding and following pixels, but it is important to ensure that the matrix has characteristics suitable for the video signal actually handled. . Further, the controller 61 in FIG. 6 can be configured by, for example, a memory element such as a RAM.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a conventional example of a video signal transmission device.
Figure 2 is a 7-clean diagram for explaining the conventional example;
The figure shows a waveform diagram and a data time chart to explain error correction in the conventional example, Fig. 4 is a block diagram showing an example of the error correction encoder in the present invention, and Fig. 5 6 is a block diagram showing an example of an error correction decoder according to the present invention, FIG. 6 is a block diagram showing an example of an actual defect in the correction section according to the present invention, and FIG. A waveform diagram and a data time chart are used to explain the figures, FIG. 8 is a screen diagram used to explain the embodiment of the present invention, and FIG.
It is a time chart of data for explaining the figure. 46. Old... Interleaver, 47... Sub block creator, 48... Parity block creator, 51... Error detector, 52... River corrector, 6
3... Song/deinterleaver, 57... Matrix, 6o... Switch, 61/ Song/control device. -4801

Claims (2)

[Claims] (1) Interleaving means for rearranging and interleaving digitized video information as a transmitting side;
subblock creation means for creating subblocks by dividing the output of the interleaving means every predetermined number and adding error detection data; and parity block creation means for creating a parity block for a plurality of the subblocks. On the receiving side, an error detection means for detecting an error, a correction means for calculating a syndrome and correcting the error by referring to the result of the error detection means, and converting the output of the correction means into original video information. A video signal transmission device comprising: a deinterleaving means for rearranging the order; and a modifying means for modifying the output of the deinterleaving means. (2) The modification means includes a matrix for creating interpolated pixel data based on adjacent pixels, a switch for selecting either the output of the deinterleaving means or the output of the matrix, and the output of the error detection means. 2. The image-exclusion signal transmission device according to claim 1, further comprising a controller that creates a control signal based on the control signal and controls the switch.