JPS60148022A - リレ−試験方法 - Google Patents

リレ−試験方法

Info

Publication number
JPS60148022A
JPS60148022A JP444184A JP444184A JPS60148022A JP S60148022 A JPS60148022 A JP S60148022A JP 444184 A JP444184 A JP 444184A JP 444184 A JP444184 A JP 444184A JP S60148022 A JPS60148022 A JP S60148022A
Authority
JP
Japan
Prior art keywords
relay
switch
reed
matrix
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP444184A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0510784B2 (enrdf_load_stackoverflow
Inventor
充 横山
加茂 公朗
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hewlett Packard Japan Inc
Original Assignee
Yokogawa Hewlett Packard Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Hewlett Packard Ltd filed Critical Yokogawa Hewlett Packard Ltd
Priority to JP444184A priority Critical patent/JPS60148022A/ja
Publication of JPS60148022A publication Critical patent/JPS60148022A/ja
Publication of JPH0510784B2 publication Critical patent/JPH0510784B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Testing Electric Properties And Detecting Electric Faults (AREA)
  • Relay Circuits (AREA)
JP444184A 1984-01-13 1984-01-13 リレ−試験方法 Granted JPS60148022A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP444184A JPS60148022A (ja) 1984-01-13 1984-01-13 リレ−試験方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP444184A JPS60148022A (ja) 1984-01-13 1984-01-13 リレ−試験方法

Publications (2)

Publication Number Publication Date
JPS60148022A true JPS60148022A (ja) 1985-08-05
JPH0510784B2 JPH0510784B2 (enrdf_load_stackoverflow) 1993-02-10

Family

ID=11584295

Family Applications (1)

Application Number Title Priority Date Filing Date
JP444184A Granted JPS60148022A (ja) 1984-01-13 1984-01-13 リレ−試験方法

Country Status (1)

Country Link
JP (1) JPS60148022A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2441788A (en) * 2006-09-15 2008-03-19 Studor Sa Method and apparatus for detecting seal leaks in drainage and venting systems for buildings

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2441788A (en) * 2006-09-15 2008-03-19 Studor Sa Method and apparatus for detecting seal leaks in drainage and venting systems for buildings
GB2441788B (en) * 2006-09-15 2011-11-09 Studor Sa Method and equipment for detecting sealing deficiencies in drainage and vent systems for buildings
US8336368B2 (en) 2006-09-15 2012-12-25 Heriot Watt University Method and equipment for detecting sealing deficiencies in drainage and vent systems for buildings

Also Published As

Publication number Publication date
JPH0510784B2 (enrdf_load_stackoverflow) 1993-02-10

Similar Documents

Publication Publication Date Title
EP2064562B1 (en) Testable integrated circuit and ic test method
JP2983938B2 (ja) Iddqを求める装置及び方法
US6031386A (en) Apparatus and method for defect testing of integrated circuits
CN101363895A (zh) 检测直流回路故障的方法及系统
US6043662A (en) Detecting defects in integrated circuits
US6541983B2 (en) Method for measuring fuse resistance in a fuse array
US5432460A (en) Apparatus and method for opens and shorts testing of a circuit board
US5670892A (en) Apparatus and method for measuring quiescent current utilizing timeset switching
JPS60148022A (ja) リレ−試験方法
JP4259692B2 (ja) 回路基板検査装置
US7127690B2 (en) Method and system for defect evaluation using quiescent power plane current (IDDQ) voltage linearity
Yilmaz et al. Defect-based test optimization for analog/RF circuits for near-zero DPPM applications
US6230293B1 (en) Method for quality and reliability assurance testing of integrated circuits using differential Iddq screening in lieu of burn-in
JPH11142471A (ja) バーンイン試験方法及びバーンイン試験装置
JP2907278B2 (ja) 半導体装置及びその試験方法
JPH01240873A (ja) 半導体集積回路の試験方法
JP4863786B2 (ja) 接触試験装置および接触試験方法
JP2963234B2 (ja) 高速デバイス試験方法
JPH03229171A (ja) 半導体装置の試験装置
JPH08226942A (ja) 試験用プローブピンの接触不良判断方法およびインサーキットテスタ
JPH07130813A (ja) 半導体装置の絶縁膜試験装置
JPH06109806A (ja) 半導体評価用テスタ
CN119846433A (zh) 芯片高电压加压测试判定方法及装置
Satoh Improvement of degradation detection in ESD test for semiconductor products
JPH02210271A (ja) 多ピンプローブの短絡チェック装置