JPS60147178A - Led array - Google Patents

Led array

Info

Publication number
JPS60147178A
JPS60147178A JP59001820A JP182084A JPS60147178A JP S60147178 A JPS60147178 A JP S60147178A JP 59001820 A JP59001820 A JP 59001820A JP 182084 A JP182084 A JP 182084A JP S60147178 A JPS60147178 A JP S60147178A
Authority
JP
Japan
Prior art keywords
led chips
substrate
sections
led
projecting sections
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59001820A
Other languages
Japanese (ja)
Inventor
Tatsuto Kawai
達人 川合
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP59001820A priority Critical patent/JPS60147178A/en
Publication of JPS60147178A publication Critical patent/JPS60147178A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Abstract

PURPOSE:To prevent interruption in the case, when a reflecting means is mounted adjoining to LED chips, of bonding wires for the LED chips by connecting a plurality of the LED chips rectilinearly disposed on a substrate by a noncontacting connecting means to the substrate. CONSTITUTION:Electrodes 2 are formed on both side sections of a substrate 1 in two rows in a beltlike manner along the longitudinal direction of the substrate 1, and projecting sections 6a, 6b are shaped at several positions. Island sections 6c in the electrodes are formed among the projecting sections 6a and the projecting sections 6b. LED chips 2a are formed to the projecting sections 6a so that the P type crystal sides of the LED chips 2a are brought into contact with the projecting sections 6a, LED chips 2b are shaped to the island sections 6c so that the N type crystal sides of the LED chips 2b are brought into contact with the island sections 6c, the LED chips 2a are further formed to the island sections 6c, and the LED chips 2b are formed to the projecting sections 6b. The adjacent LED chips 2a and 2b are paired two by two, and connected by bonding wires 7 as connecting means. When reflecting means 5 are mounted to the substrate 1 having such constitution, the reflecting means 5 are adjoined sufficiently to the LED chips 2 and can be disposed thereon.

Description

【発明の詳細な説明】 〔技術分野〕 本発明はファクシミリ装置、複写機等の画像読取装置の
原稿面の照明に用いるLEDアレイに係り、特にIJD
チッゾ同志金接続するデンディングワイヤ等の接続手段
が、反射手段等の障害とならないよう々IJDアレイに
関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to an LED array used for illuminating the document surface of an image reading device such as a facsimile machine or a copying machine, and in particular,
The present invention relates to an IJD array so that connection means such as dending wires for connection do not interfere with reflection means or the like.

〔従来技術〕[Prior art]

近年、ファクシミリ装置、複写機、又はそれに類する画
像読取装置において、小型化の要求が高まり、それに伴
って原稿面の照明に、従来用いられていた螢光灯を廃し
、新たK LEDチップを多数個並べたLEDアレイが
採用されることが多い。しかるにIJDアレイは螢光灯
に較べて小型でしかも耐久性に富む長所があるが、反面
、絶対光量が少なくミ原稿の読取りに十分な光量を得る
ために集光レンズ及びIJDチップの近傍に反射手段を
設けることが考案されている。
In recent years, there has been an increasing demand for miniaturization in facsimile machines, copying machines, and similar image reading devices.As a result, the conventional fluorescent lamps used for illuminating the document surface have been eliminated, and a large number of new K LED chips have been used to illuminate the document surface. A side-by-side LED array is often employed. However, IJD arrays have the advantage of being smaller and more durable than fluorescent lights, but on the other hand, the absolute amount of light is low and in order to obtain enough light to read the original, the IJD array needs to be reflected near the condenser lens and IJD chip. It has been devised to provide means.

第1図はこの様なLEDアレイの構成を示すもので、基
板1上にLEDチ、プ2が等間隔に設けられ、基板1の
両側部罠円筒状の集光レンズ3を支持する為の支持体4
,4が互い罠対岐して設けられる。
FIG. 1 shows the configuration of such an LED array, in which LED chips and chips 2 are provided at equal intervals on a substrate 1, and a cylindrical condensing lens 3 is placed on both sides of the substrate 1. Support 4
, 4 are provided with traps facing each other.

第2図は基板1とLEDチッグ2部のみの拡大説明図で
おり、図に示す如く基板1にプリントされた電極6とL
EDチ、7’ 2 u デンディングワイヤ7によって
互いに接続される。該がンディングワイヤ7は基板1と
平行な平面内において、基板1の長手方向と垂直な方向
に設けられる。この様な構成を有するLEDアレイにお
いて、原稿面上の広範囲に渡り高照度の光を照射する為
LEDチッグ2近傍に反射手段5(第1図(C))を設
けることが考案されている。しかるに?ンデイングワイ
ヤ775;第2図に示す如く設けられているLEDプレ
イでは、ボンディングワイヤ7が設けられた側では該デ
ンディングワイヤ7が障害となり反射手段5をLEDチ
ッゾ2に十分近接させて設けることが出来なかった(第
1図(C))。この為第3図に示す如くデンディングワ
イヤ7ft基板1の長手方向に沿って設けることも考え
られるが、この場合LEDチツゾ2の間隔が狭い場合に
はデンディングが困難となる。
Figure 2 is an enlarged explanatory diagram of only the board 1 and the LED chip 2, and as shown in the figure, the electrodes 6 and L parts printed on the board 1.
EDchi, 7' 2 u are connected to each other by a ending wire 7. The bonding wire 7 is provided in a plane parallel to the substrate 1 in a direction perpendicular to the longitudinal direction of the substrate 1. In an LED array having such a configuration, it has been devised to provide a reflecting means 5 (FIG. 1(C)) near the LED tip 2 in order to irradiate high-intensity light over a wide area on the document surface. But? Ending wire 775: In the LED play provided as shown in FIG. 2, the reflecting means 5 should be provided sufficiently close to the LED chip 2 because the end wire 7 becomes an obstacle on the side where the bonding wire 7 is provided. was not possible (Figure 1 (C)). For this reason, it is conceivable to provide a 7-ft dending wire along the longitudinal direction of the substrate 1 as shown in FIG. 3, but in this case, if the distance between the LED chips 2 is narrow, the dending becomes difficult.

〔目的〕〔the purpose〕

そこで本発明の目的は前記欠点を解消すべくLEDチ、
ゾのボンディングワイヤが反射手段をLEDチ、fに近
接させて設ける際の障害とならない様に配設することに
ある。
Therefore, an object of the present invention is to solve the above-mentioned drawbacks by using an LED chip.
The purpose is to arrange the bonding wires so that they do not become an obstacle when the reflecting means is provided close to the LEDs Q and F.

〔構成〕〔composition〕

前記目的を達成すべく本発明は、基板に直線上に配設さ
れた複数個のLEDチップを、前記基板と非接触の接続
手段で接続することを特徴とする。
In order to achieve the above object, the present invention is characterized in that a plurality of LED chips arranged in a straight line on a substrate are connected to the substrate by a non-contact connecting means.

〔実施例〕〔Example〕

以下図面に基づいて本発明の実施例を具体的かつ詳細に
説明する〇 第4図は本発明の実施例を示すもので、基板1に電極2
が図のようにプリントされる。即ち、電極2は基板1の
両側部に基板1の長手方向に沿って帯状に2本設けられ
、数ケ所に突起部6a 、 6bが形成される。該突起
部6aと突起部6bとの間には電極の高部6cが形成さ
れる。突起部6aにはLEDチッ7’2aを、そのP型
結晶側が突起部6&に接触する様にして設け、高部6c
にはLEDチップ2bを、そのN型結晶側が高部6Cに
接触する様にして設け、該高部6Cに更にLEDチッゾ
2aを設け、突起部6bにLEDチッグ2bを設ける。
Embodiments of the present invention will be explained in detail below based on the drawings. 〇 Figure 4 shows an embodiment of the present invention, in which a substrate 1 has an electrode 2
is printed as shown. That is, two electrodes 2 are provided in a strip shape along the longitudinal direction of the substrate 1 on both sides of the substrate 1, and protrusions 6a and 6b are formed at several locations. A high portion 6c of the electrode is formed between the protrusion 6a and the protrusion 6b. An LED chip 7'2a is provided on the protrusion 6a so that its P-type crystal side is in contact with the protrusion 6&;
An LED chip 2b is provided so that its N-type crystal side contacts the high portion 6C, an LED chip 2a is further provided on the high portion 6C, and an LED chip 2b is provided on the protrusion 6b.

この隣接するIJDチップ2aと2bとを2個ずつ組と
して接続手段たるビンディングワイヤ7で接続する。 
2 このような構成を有する基板1に反射手段5t−設ける
場合は、第5図に示す如(、IJ:Dチッ:762に反
射手段5を充分近接させて配設することができる。
These adjacent IJD chips 2a and 2b are connected in pairs by a binding wire 7 serving as a connecting means.
2. When the reflecting means 5t is provided on the substrate 1 having such a structure, the reflecting means 5 can be arranged sufficiently close to the IJ:D chip 762 as shown in FIG.

〔効果〕〔effect〕

以上詳細かつ具体的に説明した如く本発明によれば、反
射手段をIJDチップに十分近接して設ける事が出来る
為、LEDチップから放射される光束をより有効に利用
する事が可能となる。更に本発明によるLEDアレイと
類似のIJDチッゾの実装方線は、単にIJDチップ側
方に反射面を設ける場合のみならず、一般にLEDチ、
プの周辺に他の構造物が存在し、LEDチップから基板
へワイヤデンディングを行う事が困難な場合や、IJD
アレ(の大きさをコンパクトにまとめるため、IJDア
レイ基板の電極・ぐターンを単純化したい場合に有効で
ある。
As described above in detail and concretely, according to the present invention, since the reflecting means can be provided sufficiently close to the IJD chip, it is possible to use the luminous flux emitted from the LED chip more effectively. Furthermore, the mounting method of IJD chips similar to the LED array according to the present invention is not limited to simply providing a reflective surface on the side of the IJD chip, but is generally applicable to LED chips,
If there are other structures around the LED chip and it is difficult to wire the LED chip to the board, or if there are other structures around the IJD
This method is effective when it is desired to simplify the electrodes and patterns of the IJD array substrate because it makes the size of the array compact.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のIJDアレイの概略構成図、第2図及び
第3図は従来のLEDアレイにおける基板とLEDチッ
ゾの平面図(a)及び正面図(b)、第4図社本実施例
のIJDアレイにおける基板とLEDチッグの平面図(
、)及び正面@(b)、第5図は本実施例のLEDアレ
イの概略構成図である。 図において l・・・基板、2・・・LEDチップ、7・・・ボンデ
ィングワイヤ で卆る。 第1図 箪 (C)
Figure 1 is a schematic configuration diagram of a conventional IJD array, Figures 2 and 3 are plan views (a) and front views (b) of the substrate and LED chips in a conventional LED array, and Figure 4 is this embodiment. Top view of the board and LED chip in the IJD array (
, ) and front view @(b), FIG. 5 is a schematic configuration diagram of the LED array of this embodiment. In the figure, 1...substrate, 2...LED chip, 7...bonding wire. Figure 1: Chest (C)

Claims (2)

【特許請求の範囲】[Claims] (1) 基板に直線上に配設された複数個のLEDチッ
プを、前記基板と非接触の接続手段で接続してなるLE
Dアレイ。
(1) An LE formed by connecting a plurality of LED chips arranged in a straight line on a substrate to the substrate using a non-contact connection means.
D array.
(2)接続手段としてボンディングワイヤを用い、隣接
するLEDチ、ゾ同志を2個ずつ組として前記デンディ
ングワイヤで接続してなる特許請求の範囲第1項記載の
LEDプレイ。
(2) The LED playback according to claim 1, wherein a bonding wire is used as a connecting means, and adjacent LEDs 1 and 2 are connected in pairs by the bonding wire.
JP59001820A 1984-01-11 1984-01-11 Led array Pending JPS60147178A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59001820A JPS60147178A (en) 1984-01-11 1984-01-11 Led array

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59001820A JPS60147178A (en) 1984-01-11 1984-01-11 Led array

Publications (1)

Publication Number Publication Date
JPS60147178A true JPS60147178A (en) 1985-08-03

Family

ID=11512195

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59001820A Pending JPS60147178A (en) 1984-01-11 1984-01-11 Led array

Country Status (1)

Country Link
JP (1) JPS60147178A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62190777A (en) * 1986-01-24 1987-08-20 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ Surface mount optoelectric device
EP1465256A1 (en) * 2003-04-03 2004-10-06 Micro Photonics Technology A method of producing a light source and a light source assembly
US6841931B2 (en) 2001-04-12 2005-01-11 Toyoda Gosei Co., Ltd. LED lamp
JP2008532299A (en) * 2005-02-28 2008-08-14 オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング Modules with semiconductors that emit radiation

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62190777A (en) * 1986-01-24 1987-08-20 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ Surface mount optoelectric device
US6841931B2 (en) 2001-04-12 2005-01-11 Toyoda Gosei Co., Ltd. LED lamp
EP1465256A1 (en) * 2003-04-03 2004-10-06 Micro Photonics Technology A method of producing a light source and a light source assembly
JP2008532299A (en) * 2005-02-28 2008-08-14 オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング Modules with semiconductors that emit radiation
US8154031B2 (en) 2005-02-28 2012-04-10 Osram Opto Semiconductors Gmbh Module comprising radiation-emitting semiconductor bodies

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