JPS5991774A - Coding circuit - Google Patents

Abstract

PURPOSE:To detect easily the completion of coding by forming an instruction code representing the end of a page, storing it in an intermediate buffer memory and reading this instruction code from the intermediate buffer memory. CONSTITUTION:When a control circuit 3 detects the end of a page, that is, an ''L'' level of a page signal, the information whether it is the run length number of a while signal or a black signal and a value of a counter 2 are written at first in an intermediate memory (FIFO)5, an instruction code commanding a selector 4 to form a line synchronizing signal is selected and the instruction code is written in the FIFO memory 5 about 6 times consecutively, the selector 4 selects the instruction code representing the end of the page and writes the instruction code to the FIFO memory 5. The end of coding is detected easily by reading the instruction code from the FIFO memory 5.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention compresses image signals such as facsimile signals at high speed.
This invention relates to an encoding circuit that performs encoding.

Conventional configuration and its problems In order to shorten the transmission time of an image signal and to reduce the capacity of a memory that stores image information, an encoding method is used that suppresses the redundancy of the image signal. for example,
For facsimile group ■ equipment, the one-dimensional encoding method is the Modify Huffman (MH) encoding method, and the two-dimensional encoding method is the Modify Read (MH) encoding method.
MR) encoding method is adopted.

The MH encoding method calculates the number of consecutive run lengths of white runs or black runs in the image signal, and uses a "makeup code" that codes up to 1728 pixels every 64 pixels for each white run and black run, and from O to This is a method of encoding and compressing an arbitrary number of run lengths by combining "terminating codes" which are coded by cutting each pixel up to 63.

The MR encoding method calculates the position information of a changed pixel on a coding line by referring to the position information of a changed pixel that has already been encoded on the coding line and the position information of a changed pixel in the previous line that has already been encoded. This method determines the different modes (lotus mode, vertical mode, horizontal mode) and sequentially encodes the encoded lines.

In addition, a line synchronization signal (EOL signal) is added after each line of encoded data and before the first data of one page, and after the last line of one page, an EOL signal is added continuously six times as a page end signal. Add times.

When performing this type of encoding at high speed, instead of converting code elements into serial codes at once each time the code is determined, an intermediate method is used between the block that determines the code and the block that converts it to serial code. An encoding method in which a first in/first out memory (F4FO) memory is provided in the buffer memory, an instruction code instructing to generate a determined code is written in the FIFO memory, and this instruction code is read out and converted into a serial code. I'm worried.

In the encoding method using the intermediate buffer memory as described above, the code generation instruction code is created up to the last line of one page, and the EOL signal is continuously sent 6 times as the end signal of the page.
Create six EOL signal generation instruction codes so that the EOL signal generation instruction codes are generated twice, and even after writing all the code generation instruction codes and EOL signal generation instruction codes to the FIFO, the encoding is not completed and the code generation instruction is stored in the FIFO memory. The code remains, and this amount is variable. Therefore, in order to read out the instruction codes remaining in the FIFO memory, convert them into serial codes, and complete encoding, it is necessary to memorize the number of instruction codes remaining in the FIFO memory. Attempting to grasp this amount using an external circuit has the drawback of increasing the circuit scale and complicating control.

OBJECTS OF THE INVENTION An object of the invention is to provide an encoding circuit that can easily detect the completion of encoding in an encoding system using an intermediate buffer memory.

Structure of the Invention In order to achieve the above object, an instruction code representing the end of a page is created, and this is stored in an intermediate buffer memory (F
The instruction code is stored in an intermediate panzer memory (FIFO), and the completion of encoding is detected by reading this instruction code from an intermediate panzer memory (FIFO).

Description of examples FIG. 1 shows an embodiment of the inventive encoding circuit.

FIG. 2 is a diagram showing the relationship between a page signal, a synchronization signal, and an image signal. (2L) in Fig. 2 is a page signal, (b
) is a synchronization signal indicating synchronization of each line, (C) is an image signal, data for one page is sent in the "H" level section of page signal (a), and Hl+ level of synchronization signal (b) One line of image data is sent in each section.

Therefore, the image data is sent out during the HI+ level section of the page signal (a) and the "H, I+ level section of the synchronizing signal (b)."

In FIG. 1, 1 is a change point detection circuit, 2 is a counter,
3 is a control circuit, 4 is a selector, 5 is a FIFO memory,
The change point detection circuit 1 receives input 2 in synchronization with the clock.
A change in the value of the image signal from a white signal to a black signal or from a black signal to a white signal is detected. The counter 2 counts the number of continuous bits of the white signal or black signal. When the change point detection circuit 1 detects a change in the signal, the control circuit 3 selects the value of the counter 2 with the selector 4 and stores it in the FIFO memory. 5, the information on the number of run lengths of the white signal or the number of run lengths of the black signal and the value of the counter 2 are written, and then the counter 2 is cleared.In addition, the control circuit 3 writes the end of the line, that is, the L of the synchronization signal (b). When I+ level is detected, first F:
[Writes the information on the number of run lengths of the white signal or the number of run lengths of the black signal and the value of counter 2 to the FO memory 5, then clears the counter 2, also clears the change point detection circuit 1, and writes the information of the run length of the next line. Prepare for encoding. Thereafter, the selector 4 selects an instruction code that instructs to create an EOL signal, and writes that instruction code into the FIFO memory 5.

When this series of operations is repeated, the FIFO memory 6 stores the run length numbers of the white signal and black signal of each line, and the EOL.
Instruction codes instructing the generation of signals are stored in sequence. Furthermore, when the control circuit 3 detects the end of the page, that is, the "L" level of the page signal (a), first the F'IFO
The information on the number of run lengths of the white signal or the number of run lengths of the black signal and the value of the counter 2 are stored in the memory 6, and then the selector 4 selects an instruction code that instructs to create an EOL signal, and stores the information in the FIFO memory 5. Continuing the instruction code
After the i-ko process is completed six times, the selector 4 selects an instruction code indicating the end of the page, and stores the instruction code in the FIFO memory 5. By the above operation, FIF, O memory 5
The number of run lengths of the white signal, the number of run lengths of the black signal, the MOL signal generation command code, and the page end command code of each line are stored in order.

6 is a ROM, 7 is a P/S shift register, 8 is a register, 9 is a clock generation circuit, 10 is a memory, 11 is a page end detection circuit, ) (0M6 is the number of run lengths of the white signal and the run length of the black signal. The code corresponding to the number, its code length, and the code corresponding to the kOL signal generation instruction code (MH
The code is ○00000000001”) and its code length (
In the MH code, a code length of 12) is stored. The code read from the ROM 6 is temporarily stored in the P/S noft register 7, and the code length read from the IROM 6 is temporarily stored in the register 8. The clock generation circuit 9 generates a clock corresponding to the code length stored in the register 8, converts the parallel code stored in the P/S shift register 7 into a serial code, and inputs the serial code to the memory 10. Assuming that the FIFO memory 5 stores the number of white signal run lengths, the number of black signal run lengths, the FOL signal generation command code, or the page end command code, the oldest data is read out and stored in the ROM 6. The code is converted into a corresponding code and code length, the code is input into the P/S shift register 7, the code length is input into the register 8, the clock generation circuit 9 generates a clock corresponding to the code length, and the clock is input into the memory 10. After this operation FI
The FO memory 5 is checked, and if data is stored, the oldest data is read out and the same operation is performed. Through the above operations, the code and synchronization (XOL) signal corresponding to the image signal of each line are stored in the memory 10. When the page end detection circuit 11 detects the page end instruction code, it is known that encoding for one page has already been completed, so it is sufficient to terminate the encoding operation.

Although the above embodiment has been described in the case of a one-dimensional encoding method, it can also be easily applied to the case of a two-dimensional encoding method, such as an MR encoding method.

Effects of the Invention The present invention provides the following effects: - It is sufficient to simply store the page end instruction code in the FIFO memory at the end of one page, making it easy to detect the completion of encoding.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an encoding circuit according to an embodiment of the present invention, and FIG. 2 is a timing diagram showing the relationship between a page signal, a synchronization signal, and an image signal. 1... Poor point detection circuit, 2... Counter, 3...9.・Control circuit, 4...Selector, 5...FIFO memory, 6...RO
M, 7...P/S shift register, 8...
...Register, 9...Clock generation circuit, 10
...Memory, 11...Page end detection circuit.

Claims (1)

[Claims] An instruction code is generated that instructs to calculate the run length number of the read image signal and create a code corresponding to the counted number, and stores the instruction codes in the first-in/first-out memory in the order of generation. An instruction code that indicates the end of a page in an encoding circuit such as a Modified Huffman (Ml() code) that sequentially extracts instruction codes from first-in/first-out memory and creates a code corresponding to the instruction code for encoding. A means for storing the instruction code in a first-in/first-out memory, and a means for detecting the instruction code indicating the end of the page are provided, so that the completion of encoding can be easily detected. Characteristic encoding circuit.