JPS5989031A - Substrate bias generating circuit - Google Patents

Abstract

PURPOSE:To attain an external compensation for the variance in substrate bias voltage due to the variance of production processes, by varying the load capacity of an inverter constituting a ring oscillator. CONSTITUTION:A charge pump is driven by giving waveform shaping to the output signal of a ring oscillator. The output voltage of the charge pump is set at the substrate bias voltage of a 64K-bit dynamic memory, for example. A linear relation is obtained between the substrate bias voltage and the oscillation frequency of the ring oscillator. A capacitor is connected between inverters constituting a ring oscillator via a fuse element. The load capacity of an inverter is varied by cutting the fuse element. Then the oscillation frequency changes.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a substrate bias generation circuit capable of adjusting a generated substrate bias voltage.

[Technical background of the invention]

In recent years, semiconductor memory has made remarkable progress, especially dynamic random access memory (RAM).
) The improvement in the degree of integration is remarkable. Also,
At the same time, new specifications were being added in terms of functionality, and among these, the most important consideration for users was the switch to a single 5V power supply. A 64-bit dynamic RAM, which is currently becoming mainstream, has a 5V single power supply as its standard specification. The most important development element in the development of this 5V single-voltage was the built-in substrate bias circuit.

The reason why the substrate bias is required to be narrow in the dynamic R crystal 1 is for the reasons described below. First, high-speed operation can be achieved by reducing the number of bonding chambers. Second
This enables stable operation that can withstand input waveform undershoot. Thirdly, stability in circuit operation can be obtained by reducing the substrate effect of the threshold voltage. Furthermore, fourthly, isolation between elements can be facilitated. The substrate bias generation circuit is a circuit for generating the substrate bias that is integrated on-chip with a single 5V power supply.

By the way, in the case of a 64-bit dynamic RAM,
In most cases, the power supply voltage VC8 = 5 V, and the substrate bias voltage ■. is generally constructed as shown in FIG. 1. That is, the clock signal Q output from the ring oscillator 1.

The page is supplied to an amplifier circuit 12 which acts as a waveform shaping circuit to shape the waveform, and the waveform shaped output of this amplifier circuit 12 is supplied to a charge pump circuit 13.

The charge pump circuit 13 has one electrode supplied with the output of the amplifier circuit 12 and the other electrode connected to a diode. It consists of a diode-connected MOS transistor Tr2 connected between the other electrode of M and the power supply V8B, and
A substrate bias voltage VBBf: is obtained from one end of the OS transistor TrH.

FIG. 2 shows a specific configuration example of the ring oscillator 11 shown in FIG.
4m are connected in a ring shape, and the oscillation output Q is sent from the inverter circuit 14m to the inverter circuit 14.
Obtain the oscillation output page from n-1.

[Problems with background technology]

However, in a configuration like the above TFE, the oscillation frequency of the ring oscillator 1, the capacitance of the capacitor C of the charge pump circuit 13, etc. largely depend on the manufacturing process, and due to manufacturing process variations, the substrate bias voltage VIIB
changes, and as a result, the power consumption of the substrate bias generation circuit also changes.

In particular, the oscillation frequency of the ring oscillator has a linear relationship with the substrate bias voltage, as shown in FIG. 3, and as the oscillation frequency increases, the substrate bias voltage decreases. However, leakage current (impact current) to the substrate tends to occur within the chip during circuit operation, and since this leakage current also differs depending on each chip, it affects the substrate bias voltage vB11.

The above-mentioned variation in the substrate bias voltage VBB leads to a variation in the threshold voltage of the internal transistor, which affects circuit operation. Still, the power consumption of the board/guinea force generation circuit accounts for most of the standby current of dynamic RAM, and is an important factor that influences product specifications.
[Object of the invention] This invention was made in view of the above circumstances.
The purpose of this is to be able to externally compensate for variations in substrate bias voltage due to variations in the manufacturing process, to obtain the desired substrate bias voltage set in advance even with variations in the manufacturing process, and to reduce unnecessary power consumption while reducing internal circuitry. It is an object of the present invention to provide a substrate bias generation circuit that can perform stable operation.

[Summary of the invention]

That is, in the present invention, a load capacitor is arranged in parallel at the output stage of each inverter circuit of the ring oscillator in FIG. 2, and this load capacitor is selectively connected to the output end of the inverter circuit. Alternatively, the oscillation frequency is changed to compensate for variations in the substrate noise pressure due to variations in the manufacturing process.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 4 shows the configuration of the inverter circuits 141, 142, . . . in the circuit shown in FIG. ...1
Each 4m output stage has a load capacity fikc+*C
2*Cs*-Cn are arranged in parallel, and one electrode of the load capacitance CIpC2+C3, . . . Cn is connected to fuse elements F, , F2, F3, .
It is connected to the output stage of the inverter circuit via Fn, and the other electrode is connected to the power supply Vss. The above load capacity C1y
As C2pC3,...Cn, a MOS canopy is used, and a fuse element Fl#F2'#F3
As r...Fn, a polysilicon wiring on a field oxide film may be used.

Next, in the above configuration, the substrate bias voltage v
The method for adjusting BB will be explained in detail.

First, all the manufacturing processes are completed [7] The power supply voltage VCC is applied to the completed wafer, and each input signal is supplied to operate the memory chip.

This work is carried out using, for example, a wafer probe and a tester. At this time, the substrate bias generation circuit operates,
A substrate bias voltage VIIB is generated on the wafer substrate.

Generally, the oscillation frequency of the ring oscillator and the substrate bias voltage VBB have a linear relationship as shown in FIG. 3, so the oscillation frequency is designed to be in a linear region. Further, the variation width of the substrate bias voltage vRB is estimated in advance, and a combination of load capacitances is designed in such a way that even when the variation is the largest, the substrate bias voltage vIIB does not exceed the predetermined substrate bias voltage vIIB. A substrate bias generation circuit designed with the above considerations in mind usually has a low oscillation frequency and a low substrate bias voltage VBB. While measuring this substrate bias voltage vBB with a voltmeter, the 7-use element F+ r F2 p Fs p ”' F
yl %, "The load capacitance is reduced by sequentially cutting with a radar etc., and the oscillation frequency is raised to a constant substrate bias voltage. Therefore, the substrate bias voltage due to manufacturing process variations can compensate for fluctuations in
Optimum substrate and insulator pressure can be obtained.

Also, since the substrate bias voltage can be set to the optimum value,
No unnecessary power is consumed.

By combining the above voltmeter and laser device into a system, it is possible to automate the above operations.
In addition, in the redundant circuit memories that are being used recently, we search for defective bits, cut the fuse elements with a laser, and replace them with spare lines.
If this is done at the same time, the number of work steps will not increase.

In the above embodiment, the load capacitance was reduced by cutting the fuse element with a laser, and a constant bias voltage was obtained. The substrate-to-guinea pressure may be set by adding a load capacitance by making the conductive element conductive. That is, as a fuse element to be used, a polysilicon layer (N+-I
-N+ type, ■=region in which no impurity is implanted) is irradiated with laser light, etc., to diffuse the high concentration impurity region (N') and connect both ends of the fuse element to make it conductive. In this case, set the load capacitance to a small value in advance, measure the substrate bias voltage, and then sequentially turn on the fuse elements using a laser, etc., increase the load capacitance, lower the oscillation frequency of the oscillator, and lower the substrate bias voltage. and set it to a predetermined value.

Furthermore, the above-mentioned two types of fuse elements, the cutting type and the conducting type, may be combined. in this case,
First, measure the substrate bias voltage of the completed step, and if the substrate bias voltage is lower than the design value, cut the cut-off type fuse element with a laser etc. to increase the oscillation frequency of the oscillator. ;Raise the pressure to a predetermined value. On the other hand, if the substrate bias voltage is higher than the design value, the oscillation frequency is lowered by irradiating the equi-connected fuse elements with a laser or the like to make them conductive, increasing the load capacitance, and lowering the oscillation frequency.
Reduce substrate bias voltage. Therefore, the substrate bias voltage can be freely adjusted up and down.

In each of the above embodiments, a case has been described in which the substrate bias voltage is set to a predetermined value designed in advance, but it may also be used to adjust variations in threshold voltage of MOS transistors in the manufacturing process. . This is to/
It utilizes the substrate voltage effect of the threshold voltage of the IOS transistor, and by changing the substrate voltage, the rtos
Transistor threshold voltage can be adjusted.

〔Effect of the invention〕

As explained above, according to the present invention, fluctuations in the substrate bias voltage due to variations in the manufacturing process can be corrected externally, so even if there are variations in the manufacturing process, a desired substrate bias voltage set in advance can be obtained, thereby eliminating wasteful power consumption. An excellent substrate bias generation circuit can be obtained in which the internal circuit can operate stably without any distortion.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the configuration of a conventional substrate bias generation circuit.
Figure 2 is a circuit diagram showing a specific example of the configuration of the ring oscillator in Figure 1 above, and Figure 3 is a characteristic diagram showing the relationship between the oscillation frequency of the ring oscillator in Figure 1 and the output substrate bias voltage. , FIG. 4 is a circuit diagram of a ring oscillator in a substrate bias generation circuit according to an embodiment of the present invention. 11... Ring oscillator, 12... Amplifier circuit (waveform shaping circuit), 13... Charge pump circuit, 141e
14tp...-14m...Inverter circuit, CI
# C21C3+ "・+ Cn"' Capacitor (load capacitance), Fl # F2 + Fs + "'
r Fl - Fuse element. Applicant's Representative Patent Attorney Takehiko Suzue (Figure 1, Figure 2, Figure 3) - Figure 4

Claims (4)

[Claims] (1) In a substrate bias generation circuit comprising an oscillator, a waveform shaping circuit that shapes the oscillation output of the oscillator, and a charge pump circuit that converts the output of the waveform shaping circuit into a DC substrate bias, the oscillator is The inverter circuit includes an inverter circuit connected in an odd number of stages in a ring shape, and load capacitances arranged in parallel to the output stage of this inverter circuit via fuse elements, and the fuse elements are selectively turned on or off to generate an inverter. A substrate bias generation circuit characterized in that the oscillation frequency can be controlled from the outside by changing the load capacitance of the output stage of the circuit. (2) The substrate according to claim 1, wherein the fuse element is made of a polysilicon layer formed on a field oxide film and is selectively cut by a laser. Ias generation circuit. (3) The fuse element is formed from a polysilicon layer formed on a field oxide film having highly-concentrated impurity regions at both ends, and is selectively made conductive by a laser. The substrate bias generation circuit according to item 1. (4) The fuse element is formed from a polysilicon layer formed on a field oxide film and a polysilicon layer having high concentration impurity regions at both ends, and is selectively cut or made conductive by a laser. A substrate bias generation circuit according to claim 1.