JPS5979481A - Memory interleave control system - Google Patents

Memory interleave control system

Info

Publication number
JPS5979481A
JPS5979481A JP19011982A JP19011982A JPS5979481A JP S5979481 A JPS5979481 A JP S5979481A JP 19011982 A JP19011982 A JP 19011982A JP 19011982 A JP19011982 A JP 19011982A JP S5979481 A JPS5979481 A JP S5979481A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
address
way
significant digit
s30
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19011982A
Inventor
Junichi Kihara
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Abstract

PURPOSE:To simplify the constitution of an address selecting circuit by switching an interleave number only with a partial shift of a system bus address. CONSTITUTION:In a 2-way state an S30 is positioned at the least significant digit of a memory bus addresses, i.e., at the least significant digit of the address within a board in a conventional address. In this example, however, the S30 is positioned at the bit 4 of the memory bus addresses, i.e., at the most significant digit of the address within the board. In such a way, just a difference exists between ''S0, S1, S2, S3 and S30'' and ''0, S1, S2, S3 and S4'' with 5 bits 0-4, i.e., 5 bits higher than the most significant digit within the board for memory address in 2-way and 4-way states respectively. Therefore the constitution is extremely simplified for the address selecting circuit 302.
JP19011982A 1982-10-29 1982-10-29 Memory interleave control system Pending JPS5979481A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19011982A JPS5979481A (en) 1982-10-29 1982-10-29 Memory interleave control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19011982A JPS5979481A (en) 1982-10-29 1982-10-29 Memory interleave control system

Publications (1)

Publication Number Publication Date
JPS5979481A true true JPS5979481A (en) 1984-05-08

Family

ID=16252698

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19011982A Pending JPS5979481A (en) 1982-10-29 1982-10-29 Memory interleave control system

Country Status (1)

Country Link
JP (1) JPS5979481A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62190540A (en) * 1986-01-22 1987-08-20 Texas Instruments Inc Variable selection data processing system for memory bank
JPH05120129A (en) * 1991-05-15 1993-05-18 Internatl Business Mach Corp <Ibm> Memory system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62190540A (en) * 1986-01-22 1987-08-20 Texas Instruments Inc Variable selection data processing system for memory bank
JPH05120129A (en) * 1991-05-15 1993-05-18 Internatl Business Mach Corp <Ibm> Memory system

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