JPS595626A - Forming method of electrode wiring - Google Patents

Forming method of electrode wiring

Info

Publication number
JPS595626A
JPS595626A JP11485582A JP11485582A JPS595626A JP S595626 A JPS595626 A JP S595626A JP 11485582 A JP11485582 A JP 11485582A JP 11485582 A JP11485582 A JP 11485582A JP S595626 A JPS595626 A JP S595626A
Authority
JP
Japan
Prior art keywords
film
insulating film
wiring
metallic
difference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11485582A
Other languages
Japanese (ja)
Inventor
Yoshihiro Todokoro
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP11485582A priority Critical patent/JPS595626A/en
Publication of JPS595626A publication Critical patent/JPS595626A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268

Abstract

PURPOSE:To remove the disconnection of a second layer wiring by evaporating and lifting off a metal while using an insulating film as a spacer to form an electrode wiring film, removing one part of the surface of the insulating film through etching to thin the insulating film and decreasing difference between the thickness of the insulating film and a metallic film. CONSTITUTION:An SiO2 film 5 is formed onto a semiconductor substrate 1, a photo-resist 6 is applied, and a predetermined pattern is formed. A prescribed opening section is formed to the SiO2 film 5 through dry etching, and the photo- resist 6 is also thinned and the one part remains. A metallic film 7 is formed into the opening section by evaporating and lifting off the Al metal. The SiO2 film 5 is etched by using a Freon group gas containing no chlorine up to approximately the same thickness as the metallic film 7. A flat surface with no stepped difference is realized because Al is not etched, and the wiring of a second layer Al electrode is not disconnected. Difference between the thickness of the insulating film 5 and the metallic film 7 is kept within 0.3mum.
JP11485582A 1982-07-01 1982-07-01 Forming method of electrode wiring Pending JPS595626A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11485582A JPS595626A (en) 1982-07-01 1982-07-01 Forming method of electrode wiring

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11485582A JPS595626A (en) 1982-07-01 1982-07-01 Forming method of electrode wiring

Publications (1)

Publication Number Publication Date
JPS595626A true JPS595626A (en) 1984-01-12

Family

ID=14648382

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11485582A Pending JPS595626A (en) 1982-07-01 1982-07-01 Forming method of electrode wiring

Country Status (1)

Country Link
JP (1) JPS595626A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51113478A (en) * 1975-03-28 1976-10-06 Fujitsu Ltd The manufacturing method of semiconductor device
JPS5240968A (en) * 1975-09-29 1977-03-30 Toshiba Corp Process for production of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51113478A (en) * 1975-03-28 1976-10-06 Fujitsu Ltd The manufacturing method of semiconductor device
JPS5240968A (en) * 1975-09-29 1977-03-30 Toshiba Corp Process for production of semiconductor device

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