JPS5944851A - Package mounted with multi-layer chip - Google Patents

Package mounted with multi-layer chip

Info

Publication number
JPS5944851A
JPS5944851A JP57156205A JP15620582A JPS5944851A JP S5944851 A JPS5944851 A JP S5944851A JP 57156205 A JP57156205 A JP 57156205A JP 15620582 A JP15620582 A JP 15620582A JP S5944851 A JPS5944851 A JP S5944851A
Authority
JP
Japan
Prior art keywords
bonded
wire
chip
leadout
cover
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57156205A
Other languages
Japanese (ja)
Inventor
Masahiro Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP57156205A priority Critical patent/JPS5944851A/en
Publication of JPS5944851A publication Critical patent/JPS5944851A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/074—Stacked arrangements of non-apertured devices
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/162—Disposition
    • H01L2924/1627—Disposition stacked type assemblies, e.g. stacked multi-cavities
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Abstract

PURPOSE:To realize high integration density through mounting of two chips in one cavity by securing a second semicondutor element on a shield covering a first semiconductor element and by wire-bonding it to a second wire leadout part. CONSTITUTION:A first chip 203 is bonded to a base 201 of ceramic package and it is wire-bonded 204 to a first leadout part 202. A recessed ceramic cover 205 incuding the first leadout part 202 is bonded to a ceramic package. A second chip 207 is then bonded to the upper part of cover 205. The second leadout part 206 is wire-bonded 208 to the second chip 207. A second cover 210 is bonded to the upper part 209 of package.
JP57156205A 1982-09-07 1982-09-07 Package mounted with multi-layer chip Pending JPS5944851A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57156205A JPS5944851A (en) 1982-09-07 1982-09-07 Package mounted with multi-layer chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57156205A JPS5944851A (en) 1982-09-07 1982-09-07 Package mounted with multi-layer chip

Publications (1)

Publication Number Publication Date
JPS5944851A true JPS5944851A (en) 1984-03-13

Family

ID=15622661

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57156205A Pending JPS5944851A (en) 1982-09-07 1982-09-07 Package mounted with multi-layer chip

Country Status (1)

Country Link
JP (1) JPS5944851A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4943844A (en) * 1985-11-22 1990-07-24 Texas Instruments Incorporated High-density package
JPH02193528A (en) * 1989-01-21 1990-07-31 Giichiro Kato Lightning arrestor for high-sensitivity, large-capacity and low-pressure circuit
US5856915A (en) * 1997-02-26 1999-01-05 Pacesetter, Inc. Vertically stacked circuit module using a platform having a slot for establishing multi-level connectivity
US6026325A (en) * 1998-06-18 2000-02-15 Pacesetter, Inc. Implantable medical device having an improved packaging system and method for making electrical connections
KR100368607B1 (en) * 2000-04-17 2003-01-24 주식회사 케이이씨 semiconductor package
KR100399724B1 (en) * 2000-12-29 2003-09-29 앰코 테크놀로지 코리아 주식회사 Semiconductor package
US7211884B1 (en) 2002-01-28 2007-05-01 Pacesetter, Inc. Implantable medical device construction using a flexible substrate

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4943844A (en) * 1985-11-22 1990-07-24 Texas Instruments Incorporated High-density package
JPH02193528A (en) * 1989-01-21 1990-07-31 Giichiro Kato Lightning arrestor for high-sensitivity, large-capacity and low-pressure circuit
US5856915A (en) * 1997-02-26 1999-01-05 Pacesetter, Inc. Vertically stacked circuit module using a platform having a slot for establishing multi-level connectivity
US6026325A (en) * 1998-06-18 2000-02-15 Pacesetter, Inc. Implantable medical device having an improved packaging system and method for making electrical connections
KR100368607B1 (en) * 2000-04-17 2003-01-24 주식회사 케이이씨 semiconductor package
KR100399724B1 (en) * 2000-12-29 2003-09-29 앰코 테크놀로지 코리아 주식회사 Semiconductor package
US7211884B1 (en) 2002-01-28 2007-05-01 Pacesetter, Inc. Implantable medical device construction using a flexible substrate

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