JPS5943826B2 - Semiconductor device and its manufacturing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device including a plurality of chips made of different materials, and particularly to a semiconductor device including a plurality of chips made of a semiconductor material and a piezoelectric material.

Recently, surface wave amplifiers that perform linear operations such as attenuation or amplification by combining surface acoustic waves and carriers in semiconductors, and surface convolvers that perform nonlinear operations such as convolution or correlation have been developed. Research and development of semiconductor devices such as these are actively being conducted.

This requires a surface acoustic wave element to generate surface acoustic waves and a semiconductor element to generate carriers in the semiconductor, the former being made of piezoelectric materials such as LlNbO3 and LiTaO3, and the latter being made of silicon or intermetallic compounds The pixel elements are arranged on a common substrate and electrically connected.

FIG. 1 is a perspective view showing the conventional structure of the semiconductor device as described above, in which 1 is a chip A forming a surface acoustic wave element, 2 is a chip B forming a semiconductor element, and 3 is both the above chips A'.
, a package substrate for arranging B, 4 is a lead terminal provided on the package substrate 3, 5 and 6 are chip A3B
The electrodes provided on the surface, T are bonding wires connected between the electrodes 5 and 6, and 8 is a bonding wire connected between the electrodes 5 and 6 and the lead terminal 4.

By the way, since the surface acoustic wave element 1 and the semiconductor element 2 are made of different materials, there are many problems in the manufacturing method when combining the pixel elements to form one semiconductor device. For example, when electrically connecting pixel elements, a large number of striped electrodes 5 such as At, 1 to 2 μ wide, called transducers, are formed on the surface of the surface acoustic wave element 1 to input and output electrical signals. However, it is necessary to connect this micro-width electrode 5 to the electrode 6 on the surface of the semiconductor element by a wire bonding method using Aj of about 25 μm and an Au wire T. However, since the minute 1D electrode 5 is formed by processing using a photolithography method, the micro 1D electrode 5 is formed by processing using a photolithography method.
△ke? 7: In order to perform Yue 1 ringing, a reliable connection cannot be obtained unless the thickness is 1μ or more. In addition, wires connected using the wire bonding method are connected to pixel elements through the air, which increases lead capacitance and feedthrough when handling high-frequency signals, significantly deteriorating the characteristics of the device. There is.

The present invention has been made in order to solve the above problems, and consists of arranging a plurality of chips made of different materials on one plane through insulating connections, and using metal to closely fit the surfaces between the plurality of chips. It is an object of the present invention to provide a semiconductor device and a method for manufacturing the same, which are configured to eliminate the conventional drawbacks by providing wiring and electrodes of the chip itself that are integrally formed at the same time.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a cross-sectional view showing a semiconductor device according to an embodiment of the present invention. The same parts as in FIG. The insulating connection portion is provided so as to be flush with both chips A and B, and is made of a polymer compound such as polyimide or epoxy resin. Reference numeral 10 denotes another insulating connection part provided between the back surface of the chip A and the package substrate 3, and is made of a flexible material having elasticity such as silicone thread or epoxy resin.

Reference numeral 11 denotes a conductive connection part provided on the back surface of chip B and three parts of the package board, which is made of various resin materials containing metal powder, and is maintained in an excellent electrical and heat dissipating state.

Reference numeral 12 denotes metal wiring such as At, AU, etc., which is provided so as to be in close contact with the back surfaces of chips A and B.

The metal wiring 12 is formed by first depositing a metal material on the entire surface of the chips A, B and the insulating adhesive 9 using a vapor deposition method, etc., and then processing it into a desired shape using a photolithography method. . At the same time as this metal wiring 12 is formed, an electrode of the chip itself, for example, a minute width electrode 5 on the surface of the chip A is formed. This can be easily achieved by simply changing the pattern of the mask used in photolithography. FIG. 3 is a cross-sectional view showing a manufacturing method for obtaining the structure shown in FIG. 2, which will be explained in the order of the steps below. First, as shown in FIG. 3a, chips A and B are placed horizontally on the surface of the vacuum chuck 13 with the surface (electrode forming surface) facing downward, with a gap 14 provided therebetween.

The vacuum chuck 13 is made of a material that does not adhere to the insulating adhesive 9 to be used next, such as fluororesin, polyethylene, silicone resin, etc., and has a smooth surface. While the surfaces of chips A and B are suctioned by the vacuum chuck 13, the gap 14 between the chips A and B is filled with a polymer compound such as polyimide or epoxy resin in a fluid state to completely fill the gap 14. do it like this.

Subsequently, a predetermined hardening process is performed to form an insulating connection part 9, and then the chips A and B integrated by this insulating connection part 9 are removed from the surface of the vacuum chuck 13. Chip A, depending on the smoothness of the vacuum chuck 13 surface.
B and the insulating connection portion 9 are arranged on the same plane. Next, as shown in Fig. 3b, chips A and B are placed on a package substrate 3 made of a metal plate or an insulating plate on which a conductive layer is formed. An adhesive is applied and the chip B is placed on the back surface with a conductive adhesive such as a conductive resin applied thereto.

Subsequently, a desired curing treatment is performed to form other insulating connecting portions 10 and conductive connecting portions 11. The combination of the insulating adhesive and the conductive adhesive is not limited to the above, but other materials may be used depending on the materials and structure of the chips A and B. Next, as shown in FIG. 3c, a metal material such as At or AU is deposited on the surfaces of the chips A and B fixed on the package substrate 3 by a known vapor deposition method or sputtering method.

Subsequently, by removing unnecessary portions using a photolithography method, metal wiring 12 extending over the surfaces of chips A and B processed into a desired shape is formed. When this metal wiring 12 is processed by a photolithography method, at the same time, the electrodes 5 or 6 of the chip A or B itself, or both 5,
form 6. Through the above steps, the structure shown in FIG. 2 can be obtained.

FIG. 4 is an enlarged perspective view particularly showing the structure near the metal wiring 12. FIG. As is clear from the above description, according to the present invention, a plurality of chips made of different materials are arranged on one plane via insulating connection parts, and metal wiring is placed in close contact with the surface between the plurality of chips. At the same time, since the chip itself is configured to have electrodes that are integrally formed, there is no need to connect the metal wiring by bonding, and the chip can be connected without directly relating to the thickness of the metal wiring. Since an electrical connection can be made between the two, a reliable connection can be obtained.

Furthermore, since metal wiring does not exist in the air between chips, an increase in lead capacitance and feedthrough is prevented even when handling high frequency signals, and the characteristics of the device do not deteriorate.

The number of chips does not need to be limited to two as shown in the embodiment, and the present invention can also be applied to the case where three or more chips are used.

According to the present invention, it is easy to improve the characteristics of semiconductor devices including surface acoustic wave elements that require micro-width electrodes on the surface.
It can be expected to be applied to a wide range of applications.

[Brief explanation of the drawing]

1 and 4 are perspective views showing a conventional device and an embodiment of the present invention, and FIG. 2 and FIGS. 3 a to 3 c are all sectional views showing an embodiment of the present invention. 1... Chip A (surface acoustic wave device), 2...
... Chip B (semiconductor element), 3 ... Package substrate, 5, 6 ... Chip electrode, 9, 10.
...Insulating connection part, 11... Conductive connection part, 12 ... Metal wiring.

Claims (1)

[Scope of Claims] 1. A plurality of chips made of different materials arranged on one plane, an insulating connection portion filled between these chips and forming the same surface as the chips, and 1. A semiconductor device comprising: metal wiring provided on interchip surfaces; and an electrode of the chip itself provided simultaneously with the metal wiring and integrally with at least one chip surface. 2. The semiconductor device according to claim 1, wherein the plurality of chips are made of a semiconductor material and a piezoelectric material. 3. The semiconductor device according to claim 1 or 2, wherein the chip made of the piezoelectric material is a surface acoustic wave element. 4 A step of arranging a plurality of chips made of different materials on one plane, a step of filling an insulating adhesive between the plurality of chips, and a step of providing metal wiring across the surfaces between the plurality of chips. a step of providing an electrode of the chip itself on the surface of at least one chip integrally with the metal wiring;
A method for manufacturing a semiconductor device, comprising the steps of: