JPS5930470A - 配線基板のハンダ付方法 - Google Patents

配線基板のハンダ付方法

Info

Publication number
JPS5930470A
JPS5930470A JP13972082A JP13972082A JPS5930470A JP S5930470 A JPS5930470 A JP S5930470A JP 13972082 A JP13972082 A JP 13972082A JP 13972082 A JP13972082 A JP 13972082A JP S5930470 A JPS5930470 A JP S5930470A
Authority
JP
Japan
Prior art keywords
furnace
wiring board
solder
soldering
inert gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13972082A
Other languages
English (en)
Japanese (ja)
Other versions
JPS641233B2 (enrdf_load_stackoverflow
Inventor
Masaru Sakaguchi
勝 坂口
Muneo Oshima
大島　宗夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13972082A priority Critical patent/JPS5930470A/ja
Publication of JPS5930470A publication Critical patent/JPS5930470A/ja
Publication of JPS641233B2 publication Critical patent/JPS641233B2/ja
Granted legal-status Critical Current

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00—Soldering, e.g. brazing, or unsoldering
    • B23K1/005—Soldering by means of radiant energy
    • B23K1/0053—Soldering by means of radiant energy soldering by means of I.R.
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3494—Heating methods for reflowing of solder

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Die Bonding (AREA)
JP13972082A 1982-08-13 1982-08-13 配線基板のハンダ付方法 Granted JPS5930470A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13972082A JPS5930470A (ja) 1982-08-13 1982-08-13 配線基板のハンダ付方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13972082A JPS5930470A (ja) 1982-08-13 1982-08-13 配線基板のハンダ付方法

Publications (2)

Publication Number Publication Date
JPS5930470A true JPS5930470A (ja) 1984-02-18
JPS641233B2 JPS641233B2 (enrdf_load_stackoverflow) 1989-01-10

Family

ID=15251828

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13972082A Granted JPS5930470A (ja) 1982-08-13 1982-08-13 配線基板のハンダ付方法

Country Status (1)

Country Link
JP (1) JPS5930470A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0691679A3 (en) * 1994-06-07 1996-05-01 Texas Instruments Inc Method of manufacturing a semiconductor device unit
US6590283B1 (en) * 2000-02-28 2003-07-08 Agere Systems Inc. Method for hermetic leadless device interconnect using a submount

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0691679A3 (en) * 1994-06-07 1996-05-01 Texas Instruments Inc Method of manufacturing a semiconductor device unit
KR100377981B1 (ko) * 1994-06-07 2003-05-27 텍사스 인스트루먼츠 인코포레이티드 성형화합물큐어링방법
US6590283B1 (en) * 2000-02-28 2003-07-08 Agere Systems Inc. Method for hermetic leadless device interconnect using a submount

Also Published As

Publication number Publication date
JPS641233B2 (enrdf_load_stackoverflow) 1989-01-10

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