JPS5927863B2 - Eddy current flaw detection equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an eddy current flaw detection device for detecting defects in materials.

Conventionally, this type of device changes the relative position of the test material and the coil, applying self-induction or mutual induction to generate eddy current in the test material, and when the eddy current changes at a defective part of the test material, a secondary Since the impedance of the coil changes,
Flaws are identified by vectorial analysis of changes in impedance.

Generally, changes in coil impedance are detected as changes in voltage or current using a bridge or equivalent circuit, amplified, and processed. At this time, since the coil impedance constantly changes due to temperature and other factors, the balance of the bridge is lost over time. On the other hand, since changes in impedance due to defects are rapid over time, the bridge is automatically balanced so that the equilibrium speed has a time constant, so that the bridge is configured to respond only to changes in impedance due to defects. There is. An AC bridge with such a configuration has two adjusting arms.

That is, there are two arms, one for adjusting the amplitude of the bridge output voltage and the other for adjusting the phase of the bridge output voltage, and these two independent operations are required to achieve balance. FIG. 1 is a circuit diagram showing the configuration of an example of a conventional system. In the figure, it is necessary to keep the balance of the bridge 1 in the initial state. In this initial state, the output voltage D of the bridge has indefinite amplitude and phase, so
When the phase detector 6 is adjusted so that the phase difference between A and b in the phase detector 3 is 90, the output of the phase detector 3 is adjusted by adjusting the inductance of the coil L1 of the phase adjustment arm. Make the phases of bridges A and B equal.
However, there is a problem in that adjusting the inductance at this time also causes a change in the amplitude between A and B. Also, the phase between A and c in the phase detector 5 is the previous A,
The phase is maintained in the same phase by setting 905 between
1, the voltage amplitudes between A and B are made equal. However, at this time, a problem occurs that involves a slight phase change. In other words, in the conventional method, a pair of phase detectors are used to detect the amplitude difference and phase difference of the bridge output voltage.
The phase detector has the disadvantage that it is difficult to completely separate and process two signals in order to extract output signals corresponding to the amplitude difference and phase difference between the two signals. Furthermore, if the output voltage of the bridge can be taken out at a large value, the signal-to-noise ratio can be improved, thereby making it possible to reduce the size of the device by omitting various noise countermeasure measures. The present invention has been made to solve the above problems, and includes a bridge circuit that efficiently extracts the impedance change of the coil based on flaw detection, and easily balances the amplitude change and phase change of the bridge circuit output voltage. With the aim of providing an eddy current flaw detection device realized by a circuit, a series circuit consisting of an alternating current oscillator with equal amplitude and phase and a constant current and a resistor having the same value is connected to each of the two arms, and the remaining Connect a coil with the same physical constant to each of the two arms, or connect a coil to one arm and a resistor to the other arm, and ground the connection point of these two coils. a bridge circuit 101 consisting of a bridge circuit 101, and an amplitude constant circuit 102 which makes the amplitudes of the two output voltages of the bridge circuit 101 with respect to the ground terminal E the same, and delays the adjustment operation of the output voltage by an integrating circuit; The bridge circuit 101 is provided with a phase stabilization circuit 103 which makes the phases of the two output voltages to the ground terminal TE the same through the amplitude stabilization circuit and delays the adjustment operation to the output voltage by an integrator circuit. The unbalance in the amplitude (of the output voltage) that occurs inadvertently in the circuit 101 is corrected by adjusting the voltage corresponding to the amplitude difference in voltage between the output terminals in the amplitude constant circuit 102. The phase unbalance is detected by the phase matching circuit 10.
This is done by adjusting the output signal of the phase detector used in 3.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram showing the configuration of this embodiment, and the bridge circuit 101 is a series circuit of two arms, each having AC oscillators 0SC1 and 0SC2 with the same amplitude and phase, and resistors Rl and R2 with the same value. The remaining two arms are provided with coils Ll and L2 having the same physical constants, respectively, and the connection point between the two coils L1 and L2 is grounded E. Also Vl,
V2 is a voltage detector that detects the voltage drop across resistors Rl and R2, and operational amplifier Al and A2 take out the difference voltage between this detected voltage and the reference voltage source 20 and output it to the AC oscillator 0SC1.
,0SC2 is a device that makes the current constant. The amplitude stabilization circuit 102 is a circuit that makes the amplitudes of two output voltages A and B relative to the ground terminal E of the bridge circuit 101 the same, and is connected to the automatic gain control amplifier 11 connected to one output A of the bridge circuit 101. , the output C of the automatic gain control amplifier 11
and the other output B of the bridge circuit 101, and the output difference between these two rectifier circuits 12 and 13 is taken out and the automatic gain control amplifier 11 is controlled by this difference voltage. A subtracter 1 that controls the output voltage via an integrating circuit provided inside the automatic gain control amplifier.
It consists of 4. The integrating circuit is inserted between the automatic gain control amplifier 11 and the rectifier circuit 12, between the rectifier circuit 12 and the subtracter 14, or further between the subtracter 14 and the automatic gain control amplifier 11. It is something. The phase stabilization circuit 103 includes a phase circuit 15 connected to the output C of the automatic gain control amplifier 11, and an output D of the phase circuit 15 and the bridge circuit 101.
a phase detector 17 which receives the other output B of the phase detector 17 as an input and controls the phase of the phase circuit 15 according to the output voltage via an integrating circuit built in the phase circuit; and the output D of the phase circuit 15 and the bridge circuit. 101 and a subtracter 18 that extracts the voltage difference between the output B and the other output B of the output terminal 101. The integrating circuit is phase circuit 1
5 and the phase detector 17, or between the phase detector 17 and the phase circuit 15. FIG. 3 is a diagram showing an example of a specific circuit of the amplitude constant circuit 102 for explaining adjustment of the amplitude imbalance intentionally generated in the bridge circuit 101.

In the figure, the automatic gain control amplifier 11 is composed of an operational amplifier, and the subtracter 14 is composed of a differential amplifier 21 and a field effect transistor FET1 which drives the operational amplifier 11 to which the output of the differential amplifier is applied. Note that 22 is a variable resistor connected between the offset adjustment terminals of the differential amplifier 21. Integrating circuit 25 is inserted between rectifying circuit 12 and differential amplifier 21 in the illustrated example.
Further, FIG. 4 is a diagram showing an example of a specific circuit of the phase circuit 15 in the phase stabilizing circuit 103 for explaining the adjustment of the phase imbalance intentionally generated in the bridge circuit 101.

In the figure, the output voltage of the phase detector 17 is applied to one input of the operational amplifier 23, and the other input is supplied from the variable terminal of a variable resistor 24 whose both ends are connected to a DC power supply.

The output of the operational amplifier 23 is a field effect transistor FET2
The phase circuit 15 is driven through. It is assumed that the operational amplifier 23 and the EFT 2 are built into the phase circuit 15. Integrating circuit 26 is inserted between phase detector 17 and operational amplifier 23 in the illustrated example. The operation of this embodiment having the above configuration will be described next.

In FIG. 2, AC oscillators 0SC1 and 0SC2 have the same phase and amplitude, and are constant current, and resistor Rl
, R2 are equal in phase, and the coils L, , L2 are a pair of coils with equal physical constants, so the voltages at the output terminals A and B of the bridge circuit 101 are in phase and have the same amplitude. L1 or L2
When the impedance changes, a difference occurs in the phase and amplitude of the voltage between terminals A and B. Regarding the amplitude, terminal B
, C is rectified by the rectifiers 13 and 12, and then the difference voltage is extracted by the subtracter 14, so this difference voltage is a positive or negative direct current of a magnitude corresponding to the amplitude difference between terminals B and C. voltage. This voltage is controlled by the automatic gain control amplifier 11.
It acts to equalize the voltage amplitudes of terminals B and C. Regarding the phase, the phase detector 17 applies the voltage at the B terminal to one input and the voltage at the D terminal to the other input. Since the amplitudes of the voltages at terminals B and D are already equal, the phase detector 17 outputs a DC voltage proportional to the phase difference between these two signals.

Therefore, this output voltage is controlled by the phase circuit 15 to
It acts so that the voltage at each terminal is always in phase. Since the two signals having the same amplitude and the same phase are input to the subtracter 18, the output 19 of this subtracter becomes zero. Also, subtractor 14
The output of the phase detector 17 is passed to the automatic gain control amplifier 1 via a suitable integrating circuit which also functions as a low-pass filter.
1 and the phase circuit 15, the output 19 becomes zero when the impedance changes slowly over time due to noise, etc., and the output 19 outputs a signal corresponding to a rapid non-pedance change due to flaw detection. In other words, fluctuations in amplitude and phase between the signals output from the bridge circuit 101 due to reasons other than flaw detection are caused by temperature or the like, and therefore the changes are gradual. Therefore, the output of the automatic gain control amplifier 11 and the bridge circuit 1 have different amplitudes.
After rectifying the output of the automatic gain controller 11 in the rectifier circuit 12 when processing the other output of 01 in the subtracter 14,
Even if the output of the rectifier circuit 12 is delayed by an integrator circuit with respect to the other output of the bridge circuit 101 by a time determined by the time constant of the integrator circuit, and is input to the subtracter 14, the result is still within the delay time. It has never been reported that the output of the automatic gain control amplifier 11 of the bridge circuit 101 changes significantly.
The amplitudes of both outputs are adjusted to be substantially the same at all times. On the other hand, during flaw detection, the balance of the bridge circuit 101 is disrupted, and a flaw detection signal whose amplitude or phase changes rapidly is output from the bridge circuit 101 and input to the amplitude stabilization circuit 102. The amplitude constant circuit 102 includes the bridge circuit 10
1 is delayed by the integrating circuit 25. Therefore, the amplitude between the signal output from the automatic gain control amplifier 11 controlled by the subtracter 14 and the other output signal of the bridge circuit 101 remains in a different state without any adjustment operation. The signal is input to the phase stabilization circuit 103. The phase stabilization circuit 103 has an integrating circuit 26 interposed in the same way as the amplitude stabilization circuit 102, but since the phase variation between each signal due to temperature etc. other than during flaw detection is gradual, the phase stabilization circuit 15 There has never been a case where the phase of the output from the signal changes significantly, so the phase between each signal is adjusted to be substantially the same at all times. During flaw detection, since the phase between each signal changes rapidly, the adjustment operation is delayed due to the intervention of the integrating circuit, so the adjustment operation for equalizing the phases does not work within the delay time. Therefore, during flaw detection, flaw detection signals corresponding to rapidly changing amplitudes and phases between signals are output from the multiplier 18. In addition, in the initial state before eddy current detection, for example, the oscillators 0SC1, 0SC2
, when the bridge circuit 101 is not balanced due to changes in the coils Ll, L2 and the resistors Rl, R2,
Regarding the amplitude change of the output voltage of the bridge circuit 101,
As shown in FIG. 3, when the variable resistor 22 between the offset adjustment terminals of the differential amplifier 21 used as the subtracter 14 is adjusted, the field effect transistor FETl becomes an element whose internal resistance changes with voltage changes. Therefore, the current flowing through FETl changes, and this current change changes the gain of automatic gain control amplifier 11, so that the output amplitude of bridge circuit 101 becomes constant. Regarding the phase change of the output voltage of the bridge circuit 101, as shown in FIG.
By adjusting 4, the output voltage of the operational amplifier 23 changes, and the current of the field effect transistor FET2 changes.
Therefore, the phase of the phase circuit 15 changes, and the phases of the input and output voltages of the phase circuit can be kept constant. As explained above, in this embodiment, two phase detectors are not used as in the conventional method to detect the amplitude difference between the output voltages of the bridge circuit 101, and the phase is irrelevant to the detection of the amplitude difference.

Further, since the phase detector 17 already handles signals having the same amplitude, the amplitude and phase of the signal components can be processed completely independently, so the circuit design is extremely simple. Furthermore, as shown in FIG. 2, in the bridge circuit 101 of this embodiment, the amplitude and phase of the output voltage of the AC oscillators 0SC1 and 0SC2 are set to be equal, so that the output current of the AC oscillators 0SC1 and 0SC2 is Rl, R2
through coils Ll and L2: ÷J゜:゛Lt? Luxury:;I. --:"Voltage detector Vl, across Rl and R2,
Since V2 is provided, the output voltages of 0SC1 and 0SC2 are made variable to make the current constant so that the detection voltage becomes a constant voltage.

On the other hand, in the conventional bridge 1 shown in Fig. 1, there is only one AC oscillator, and impedance changes in coils L1 and L2 due to flaw detection do not necessarily occur at the same time. Since there is no such thing, Ll, L by flaw detection
A change in 2 will change the current for L2 and Ll. Therefore, in the conventional method, even with constant current excitation, Z
The current flowing through I and Z2 cannot be made constant.
FIG. 5 is a diagram showing the bridge output voltage ratio with respect to the rate of change (expressed in %) of the impedance Z1 of the flaw detection coil in the bridge circuit 101 of this embodiment and the conventional bridge 1 with constant voltage and constant current. . As is clear from this figure, in the conventional method, when using constant current dynamic excitation, the output characteristics are improved to be more linear than when using constant voltage excitation, but the output voltage of the bridge is smaller than in this example. . In other words, the bridge circuit of this embodiment can be said to be an element with good sensitivity to changes in impedance due to flaw detection. In this embodiment, in order to make the oscillators 0SC1 and 0SC2 in the bridge circuit 101 constant current, the operational amplifiers Al and A2 and the voltage detectors Vl and V
2. The reference voltage source 20 is used, but instead of these circuit elements, an oscillator is used in which the internal resistance of the oscillators 0SC1 and 0SC2 is much larger than the impedance of the bridge component resistors Rl and R2 and the coils Ll and L2. It may also be used as a constant current source.

Further, as a means for balancing the bridge circuit 101 in the initial state, as shown in FIG. 3, FETl is used as an element that changes internal resistance in response to changes in voltage; however, the present invention is not limited to this. Not. The same applies to the FET 2 shown in FIG. Further, in this embodiment, a self-induction coil was described as the flaw detection coil, but it goes without saying that a mutual induction coil may be used.
Furthermore, in this embodiment, the flaw detection coil in the bridge circuit 101 is provided with coils having the same physical constants in two arms, but the flaw detection coil is used in one arm, and a resistor is used in the other arm. Good too. In short,
The present invention has a configuration in which the output voltage of the bridge circuit is connected to the phase stabilization circuit via the amplitude stabilization circuit, and changes in impedance are determined by flaw detection of the bridge circuit.
In detecting the amplitude difference of the bridge output voltage, the phase difference becomes irrelevant, and since the phase difference detector already handles signals with equal amplitude, the amplitude and phase of the signal components can be processed completely independently. .

Therefore, the effect is that the circuit design is extremely simple. Furthermore, as a result of improving the bridge circuit of the present invention, the output sensitivity of the bridge circuit to changes in impedance due to flaw detection is improved, and the signal-to-noise ratio can be improved.
This has a practically important effect of reducing the size of the device by omitting the noise prevention means.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the configuration of a conventional eddy current flaw detection device, Fig. 2 is a block diagram showing the configuration of an embodiment of the present invention, and Fig. 3 is a block diagram showing the configuration of an embodiment of the bridge circuit according to the present invention. FIG. 4 is an explanatory circuit diagram of a means for adjusting an unbalance of an output voltage amplitude that is intentionally generated; FIG. FIG. 5 is a characteristic diagram showing the relationship between the impedance change of the flaw detection coil and the bridge circuit output voltage in the present invention and the conventional method. 11... Sentence gain control amplifier, 12, 13...
... Rectifier, 14 ... Subtractor, 15 ...
...Phase circuit, 17...Phase detector, 18...
...Subtractor, 19...Output, 20...
・・Reference voltage source, 21 ・・Differential amplifier, 22・
...variable resistor, 23... operational amplifier,
24... Variable resistor, 101... Bridge circuit, 102... Amplitude constant circuit, 103
...Phase stabilization circuit, Al, A2...
Voltage detector, 0SC1, 0SC2...Oscillator,
Ll, L2... Coil for flaw detection.

Claims (1)

[Claims] 1. Balancing bridge circuit 10 incorporating a flaw detection coil
1, an amplitude constant circuit 102 that adjusts the amplitudes of the two output signals of the bridge circuit 101 to be the same, and 2 of the bridge circuit 101 that is input via the amplitude constant circuit 102.
Phase stabilization circuit 1 that adjusts the phases of two output signals to be the same
03, and an integrating circuit is provided in each of the amplitude constant circuit 102 and the phase constant circuit 103 to delay the respective adjustment operations so as to be able to extract the flaw detection signal that changes instantaneously during flaw detection. Imbalance in the amplitude of the output signal that occurs in the bridge circuit 101 other than flaw detection is corrected by adjusting the voltage corresponding to the amplitude difference of the signal between the output terminals in the amplitude constant circuit 102.
The phase imbalance caused by flaw detection in 1 is fixed by the phase circuit of the phase constant circuit 103, and the amplitude constant circuit 1
An eddy current flaw detection apparatus characterized in that the eddy current flaw detection apparatus is configured to perform phase adjustment to match the phase of one signal output from the other signal with respect to the phase of the other signal. 2. The balancing bridge circuit 101 equipped with a flaw detection coil is a series circuit in which each of the two arms has an AC oscillator with the same amplitude and phase and a constant current, and a resistor having the same value. 2. The eddy current flaw detection apparatus according to claim 1, wherein each of the two arms is provided with a flaw detection coil having the same physical constant. 3. The balancing bridge circuit 101 equipped with a flaw detection coil is a series circuit consisting of an alternating current oscillator with the same amplitude and phase and constant current in each of the two arms, and a resistor of the same value. The eddy current flaw detection device according to claim 1, wherein one arm is a flaw detection coil and the other arm is a resistor.