JPS5922320B2 - Storage device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a storage device, and particularly to a storage device that is composed of a group of chips that include a defective part in a predetermined sector within the chip.
The present invention relates to a storage device that can be converted into a complete chip to operate normally.

The progress of IC technology in recent years has been remarkable.
The main memory for computers has shifted from core memory to IC memory, and recently it is expected to become even higher density - wafer memory is being considered, and 16Kbit, 64Kbit
t/chip (7) IC memory is also being realized. 1
When realizing 6Kbit, 64Kbit/chip (DIC memory), the most important issue is how to improve yield.

It is natural to solve the problem by making efforts in process technology and circuit technology, but by changing the way of thinking and actively using defective chips, we can improve the yield as a result. That is also one method. Because 16
This is because as the degree of integration increases to Kbit and 64 Kbit/chip, it is uneconomical to discard chips that are only partially defective as defective products. However, in the conventional thinking, the system was configured on the condition that the chips were 100% non-defective.
It is necessary to consider a new system configuration that allows the existence of defects.

Various proposals have already been made regarding this, including the adoption of ECC (Error Correcting Code).

However, in this case, the normal SEC-DED code is not practical due to its insufficient ability, and requires the ability to correct 2-bit and 3-bit errors. There are generally many difficulties in implementing this multi-bit error correction code in hardware, and therefore there is not much merit in adopting ECC. Another method is on-unit switching.

Specifically, various methods have been proposed. For example, in the method described in Japanese Patent Application Laid-open No. 47-7060 and Japanese Patent Application Laid-open No. 48-16536, as shown in FIG. Divide into sectors, classify the defective chips in advance according to which sector contains the defective part, and then arrange them at predetermined positions on the unit printed board 1 according to the classification, When a sector containing a defective part is accessed from the outside, it is switched to a complete chip 3 so that it can operate normally as a unit. The memory consists of a plurality of unit printed boards 1. For example, each printed board 1 is one unit in the three-dimensional memory.
Contains one bit position of the word. In this way, there is a method in which one type of unit printed board 1 is prepared and all types of defective chips are mounted on it to form a unit, and a method in which several types of unit printed boards 1 are prepared and a specific There are two possible methods: configuring the unit by mounting only the chips on each printed board. When comparing these two, the former seems to be more advantageous due to the higher mass productivity of chips than units, confusion at unit manufacturing sites, and confusion in arranging parts. However, for example, if the chip 2 is divided into four sectors as shown in FIG.
) to (4), F in Figure 2 during chip manufacturing.
As shown in Figure 2, if the occurrence of defects is concentrated in a specific sector (in Figure 2, it is concentrated in chip 2), only a specific type of chip will be supplied in large quantities, and the configuration of the unit will change. The disadvantage is that it becomes impossible.

In order to eliminate such drawbacks, the present invention aims to uniformly supply defective chips to each sector in any case.An address conversion circuit is provided on the chip, and the address conversion circuit is provided with a predetermined number of defective chips. Set the data,
The feature is that defective parts concentrated in a specific sector are equivalently dispersed to other sectors.

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

FIG. 3 is a block diagram of the program, and FIG. 4 is an explanatory diagram of address conversion in four types of chips. In Figure 3, chip 2 is divided into four sectors, and the defective chip is divided into four sectors.
This shows the cases in which they are classified and used. When divided into four sectors, each sector within the chip can be addressed using the upper two bits of the external address.

An address conversion circuit 4 is provided between the external address input terminal and the chip 2, and the upper two bits An, Anl of the external address are
is converted into the upper two bits An' and An'1 of the internal address. As the address conversion circuit 4, for example,
Consists of two exclusive OR circuits (EOR).
The data can be set in the address conversion circuit 4 by bonding BND when the chip 2 is packaged.

As an example, let us consider a case where defects are concentrated in a sector where the upper 2 bits of the address are 10. In order to uniformly give defective chips 2 to each sector, the defective chips 2 are divided into four types, and in three of them, predetermined data is set in the address conversion circuit 4 on the chip to convert the internal address. By doing so, the defective portion is distributed to the other three sectors.

In the remaining defective chip of type b, no data is set in the address conversion circuit 4, and the internal address is made the same as the external address. That is, as shown in FIG. 4, a large number of chips with defective parts concentrated in the sector of the external address 10 are divided into four types A, B, C, and D, and the address conversion circuit 4 for each type is divided into 01 and 01 chips respectively. ,10,
Set the data of 11,00.

It should be noted that chips of type D do not need to be set with any particular data and can be left in their original state. In this way, the internal addresses for the three types of chips A, B, and C will be converted, and the defective parts will have their respective external addresses (11
), (00), (01) sectors. Of course,
Since the chip of D remains the same, the external address (10
) is a bad sector. In this way, the present invention can evenly supply four types of chips with defective parts distributed as shown in G in FIG. Note that the present invention is of course applicable to cases where one chip is divided into sectors other than four.

According to the present invention, even when defects are concentrated in a specific sector, defective chips can be uniformly supplied to each sector, so that all defective memory elements that would normally be discarded can be used. Yield is significantly improved. In addition, since various types of defective chips are mounted on one unit printed board, it is possible to unify the manufacturing process, eliminating confusion at one site and the complexity of arranging parts.

[Brief explanation of the drawing]

Figure 1 is a layout diagram of chips in a conventional storage device;
The figure is a distribution diagram of defects occurring during chip manufacturing, and Figure 3 is a connection diagram on a chip of a storage device showing an embodiment of the present invention.
FIG. 4 is an address conversion diagram of the four types of chips in FIG. 1...Unit printed board, 2...
Defective chip, 3...Complete chip, 4...
・Address conversion circuit, BND...Pounding point, EOR...Exclusive OR circuit, An, An-1...External address, An', A
n'-1...Internal address.

Claims (1)

[Claims] 1 Consisting of at least one complete chip and a plurality of incomplete chips including a defective part in a predetermined sector within the chip, and placing the group of incomplete chips at a predetermined position on the memory unit with respect to the sector. However, if a sector containing a defective part is accessed from the outside, the memory device can be operated normally by switching to a complete chip, but if defects are concentrated in a specific sector on an incomplete chip during manufacturing, An address conversion circuit is installed on an incomplete chip,
By setting predetermined data in the address conversion circuit, addresses of specific sectors where defects are concentrated are converted to other sectors within the defective chip, including defective chips in which defective parts are equally distributed. A storage device characterized by comprising: